Patch to implement rotates by zero

Richard Sandiford rsandifo@redhat.com
Mon Aug 19 07:27:00 GMT 2002


Paul Koning <pkoning@equallogic.com> writes:
> I think the point is this: it's an across-the-board rule in MIPS that
> 32 bit operands in 64-bit registers MUST be properly sign-extended or
> the result is unpredictable.
>
> There's just one single exception to that, which is sll.

Yeah, I know.  The impression seems to have gathered that I submitted
this patch because I wanted "rol $4,$2,0" to act as a sign extension
instruction.  Not so!

The point is that, at the moment, we generate no instructions at all.
And, when it came to deciding what instruction to use, I thought "sll"
was a better choice than "srl" because in general it is "more defined".
If the consensus is that being "more defined" makes it worse than "srl"
(because it makes ror-by-zero well-defined in circumstances that ror by
non-zero wouldn't be) then I'm happy to use "srl" instead.

Richard



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