Bug in operands to IA32 cvtps2dq instruction in gnu as

[Andreas Jaeger]

Phil Karn <karn@ka9q.net> writes:

> Hi. I found another bug in gas version 2.11.90.0.7 in the handling of
> the operands to an IA32 SSE/SSE2 instruction.
> 
> The IA32 SSE2 "cvtps2dq" instruction converts four 32-bit floats to four
> 32-bit ints. It therefore requires that its operands be one of the
> 128-bit SSE registers %xmm0-7 or a 128-bit memory locations. However,
> GNU as emits an error if you give xmm registers as operands.  It
> allows only MMX registers, which is incorrect.
> 
> A quick programmer workaround is to specify the corresponding MMX
> register, i.e., if you want "cvtps2dq %xmm0,%xmm1" you can say
> "cvtps2dq %mm0,%mm1". I verified that this produces the intended code.
> 
> The operand table for this instruction probably needs fixing.

Thanks, here's a patch.

Ok to commit?
Andreas

2001-05-12  Andreas Jaeger  <aj@suse.de>

	* i386.h: Second operand for cvtps2dq is XMM register.

============================================================
Index: include/opcode/i386.h
--- include/opcode/i386.h	2001/05/04 11:10:53	1.32
+++ include/opcode/i386.h	2001/05/12 10:00:48
@@ -1254,7 +1254,7 @@
 {"cvtpd2pi",  2, 0x660f2d,  X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegMMX, 0 } },
 {"cvtpd2ps",  2, 0x660f5a,  X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtps2pd",  2, 0x0f5a,    X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegXMM, 0 } },
-{"cvtps2dq",  2, 0x660f5b,  X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegMMX, 0 } },
+{"cvtps2dq",  2, 0x660f5b,  X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtsd2si",  2, 0xf20f2d,  X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ RegXMM|LLongMem, Reg32|Reg64, 0 } },
 {"cvtsd2ss",  2, 0xf20f5a,  X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtss2sd",  2, 0xf30f5a,  X, CpuSSE2, FP|Modrm,	{ RegXMM|LLongMem, RegXMM, 0 } },


-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de
   private aj@arthur.inka.de
    http://www.suse.de/~aj