arc fixup bug

[Peter.Target@arccores.com]

Hi,

Since the new updates for arc-elf32 I cannot assemble code like (generated
during gcc build):

          st   .L11@h30,[r12,4]
     .L11:

The assembler complains that this is an "invalid section for operation". The
fixup seems to work in the version of binutils (2.9.1) that I directly used to
make the patches that are now in 2.10.91:

     Disassembly of section .text:

     00000000 <.text>:
        0:   04 7c 06 10     10067c04     st         2,[r12,4]
        4:   02 00 00 00

Any clues about how I can figure out whats going on would be helpful - or how
this should be implemented instead; the code around this feature seems pretty
messy.

Cheers,

Peter