mipsisa32 checkin
Eric Christopher
echristo@redhat.com
Fri Aug 31 03:15:00 GMT 2001
Here's the binutils for mipsisa32. I've removed a bunch of old mips3264
stuff and added support for lots of stuff :)
I'll add the gcc support tomorrow. gdb is currently hating me so I'll
worry about that later.
Attached are the diffs. I'm going to get some sleep now and look over
them in the morning and check them in then.
-eric
--
Look out behind you!
2001-08-30 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* bfd/archures.c: Add mipsisa32 and mipsisa64. Remove mips32,
mips32_4k and mips64.
* bfd/aoutx.h: Remove bfd_mach_mips32, bfd_mach_mips32_4k,
bfd_mach_mips64. Add bfd_mach_mipsisa32, bfd_mach_mipsisa64.
* bfd/cpu-mips.c: Ditto.
* bfd/elf32-mips.c (_bfd_mips_elf_final_write_processing): Ditto.
* bfd/bfd-in2.h: Regenerate.
2001-08-30 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* config/tc-mips.c (mips_cpu_info): Add support for mipsisa32,
5kc, and 20kc. Clean up old entries.
2001-08-30 Eric Christopher <echristo@redhat.com>
* mips.h: Remove E_MIPS_MACH_MIPS32_4K.
2001-08-31 Eric Christopher <echristo@redhat.com>
* mips.h: Remove CPU_MIPS32_4K.
2001-08-30 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* ldmain.c (get_emulation): Add support for -mips32 and -mips64.
2001-08-30 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* mips-dis.c: Add support for bfd_mach_mipsisa32 and
bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
bfd_mach_mips64.
2001-08-31 Eric Christopher <echristo@redhat.com>
* readelf.c (get_machine_flags): Remove E_MIPS_MACH_MIPS32_4K.
Index: bfd/aoutx.h
===================================================================
RCS file: /cvs/src/src/bfd/aoutx.h,v
retrieving revision 1.22
diff -u -p -w -r1.22 aoutx.h
--- aoutx.h 2001/08/23 15:45:19 1.22
+++ aoutx.h 2001/08/31 10:13:56
@@ -779,10 +779,9 @@ NAME(aout,machine_type) (arch, machine,
case bfd_mach_mips10000:
case bfd_mach_mips12000:
case bfd_mach_mips16:
- case bfd_mach_mips32:
- case bfd_mach_mips32_4k:
+ case bfd_mach_mipsisa32:
case bfd_mach_mips5:
- case bfd_mach_mips64:
+ case bfd_mach_mipsisa64:
case bfd_mach_mips_sb1:
/* FIXME: These should be MIPS3, MIPS4, MIPS16, MIPS32, etc. */
arch_flags = M_MIPS2;
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.36
diff -u -p -w -r1.36 archures.c
--- archures.c 2001/05/23 17:26:35 1.36
+++ archures.c 2001/08/31 10:13:56
@@ -137,11 +137,10 @@ DESCRIPTION
.#define bfd_mach_mips10000 10000
.#define bfd_mach_mips12000 12000
.#define bfd_mach_mips16 16
-.#define bfd_mach_mips32 32
-.#define bfd_mach_mips32_4k 3204113 {* 32, 04, octal 'K' *}
.#define bfd_mach_mips5 5
-.#define bfd_mach_mips64 64
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
+.#define bfd_mach_mipsisa32 32
+.#define bfd_mach_mipsisa64 64
. bfd_arch_i386, {* Intel 386 *}
.#define bfd_mach_i386_i386 0
.#define bfd_mach_i386_i8086 1
Index: bfd/cpu-mips.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-mips.c,v
retrieving revision 1.9
diff -u -p -w -r1.9 cpu-mips.c
--- cpu-mips.c 2001/05/23 17:26:35 1.9
+++ cpu-mips.c 2001/08/31 10:13:56
@@ -57,10 +57,9 @@ enum
I_mips10000,
I_mips12000,
I_mips16,
- I_mips32,
- I_mips32_4k,
I_mips5,
- I_mips64,
+ I_mipsisa32,
+ I_mipsisa64,
I_sb1,
};
@@ -84,10 +83,9 @@ static const bfd_arch_info_type arch_inf
N (64, 64, bfd_mach_mips10000,"mips:10000", false,
NN(I_mips10000)),
N (64, 64, bfd_mach_mips12000,"mips:12000", false,
NN(I_mips12000)),
N (64, 64, bfd_mach_mips16, "mips:16", false, NN(I_mips16)),
- N (32, 32, bfd_mach_mips32, "mips:mips32", false, NN(I_mips32)),
- N (32, 32, bfd_mach_mips32_4k,"mips:mips32-4k", false,
NN(I_mips32_4k)),
N (64, 64, bfd_mach_mips5, "mips:mips5", false, NN(I_mips5)),
- N (64, 64, bfd_mach_mips64, "mips:mips64", false, NN(I_mips64)),
+ N (32, 32, bfd_mach_mipsisa32, "mips:isa32", false,
NN(I_mipsisa32)),
+ N (64, 64, bfd_mach_mipsisa64, "mips:isa64", false,
NN(I_mipsisa64)),
N (64, 64, bfd_mach_mips_sb1, "mips:sb1", false, 0),
};
Index: bfd/elf32-mips.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-mips.c,v
retrieving revision 1.108
diff -u -p -w -r1.108 elf32-mips.c
--- elf32-mips.c 2001/08/30 21:26:26 1.108
+++ elf32-mips.c 2001/08/31 10:13:57
@@ -1886,9 +1886,6 @@ elf_mips_mach (flags)
case E_MIPS_MACH_4650:
return bfd_mach_mips4650;
- case E_MIPS_MACH_MIPS32_4K:
- return bfd_mach_mips32_4k;
-
case E_MIPS_MACH_SB1:
return bfd_mach_mips_sb1;
@@ -1917,11 +1914,11 @@ elf_mips_mach (flags)
break;
case E_MIPS_ARCH_32:
- return bfd_mach_mips32;
+ return bfd_mach_mipsisa32;
break;
case E_MIPS_ARCH_64:
- return bfd_mach_mips64;
+ return bfd_mach_mipsisa64;
break;
}
}
@@ -2412,25 +2409,20 @@ _bfd_mips_elf_final_write_processing (ab
val = E_MIPS_ARCH_4;
break;
- case bfd_mach_mips32:
- val = E_MIPS_ARCH_32;
- break;
-
- case bfd_mach_mips32_4k:
- val = E_MIPS_ARCH_32 | E_MIPS_MACH_MIPS32_4K;
- break;
-
case bfd_mach_mips5:
val = E_MIPS_ARCH_5;
break;
- case bfd_mach_mips64:
- val = E_MIPS_ARCH_64;
- break;
-
case bfd_mach_mips_sb1:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
break;
+
+ case bfd_mach_mipsisa32:
+ val = E_MIPS_ARCH_32;
+ break;
+
+ case bfd_mach_mipsisa64:
+ val = E_MIPS_ARCH_64;
}
elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.70
diff -u -p -w -r1.70 tc-mips.c
--- tc-mips.c 2001/08/27 18:48:27 1.70
+++ tc-mips.c 2001/08/31 10:13:58
@@ -9372,7 +9372,6 @@ MIPS options:\n\
show (stream, "8000", &column, &first);
show (stream, "10000", &column, &first);
show (stream, "12000", &column, &first);
- show (stream, "mips32-4k", &column, &first);
show (stream, "sb-1", &column, &first);
fputc ('\n', stream);
@@ -12068,17 +12067,20 @@ static const struct mips_cpu_info mips_c
/* MIPS32 ISA */
{ "MIPS32", 1, ISA_MIPS32, CPU_MIPS32, },
+ { "mipsisa32", 0, ISA_MIPS32, CPU_MIPS32, },
{ "Generic-MIPS32", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "4kc", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "4km", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "4kp", 0, ISA_MIPS32, CPU_MIPS32, },
-#if 1
- /* XXX for now, MIPS64 -> MIPS3 because of history */
- { "MIPS64", 1, ISA_MIPS3, CPU_R4000 }, /* XXX! */
-#else
+ /* For historical reasons. */
+ { "MIPS64", 1, ISA_MIPS3, CPU_R4000, },
+
/* MIPS64 ISA */
- { "MIPS64", 1, ISA_MIPS64, CPU_MIPS64 },
-#endif
- { "mips64isa", 1, ISA_MIPS64, CPU_MIPS64 },
+ { "mipsisa64", 1, ISA_MIPS64, CPU_MIPS64, },
{ "Generic-MIPS64", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "5kc", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "20kc", 0, ISA_MIPS64, CPU_MIPS64, },
/* R2000 CPU */
{ "R2000", 0, ISA_MIPS1, CPU_R2000, },
@@ -12181,15 +12183,6 @@ static const struct mips_cpu_info mips_c
{ "rm5721", 0, ISA_MIPS4, CPU_R5000, },
{ "r5k", 0, ISA_MIPS4, CPU_R5000, },
{ "r7000", 0, ISA_MIPS4, CPU_R5000, },
-
- /* MIPS32 4K CPU */
- { "MIPS32-4K", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "4kc", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "4km", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "4kp", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "mips32-4kc", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "mips32-4km", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "mips32-4kp", 0, ISA_MIPS32, CPU_MIPS32_4K, },
/* SiByte SB-1 CPU */
{ "SB-1", 0, ISA_MIPS64, CPU_SB1, },
Index: include/elf/mips.h
===================================================================
RCS file: /cvs/src/src/include/elf/mips.h,v
retrieving revision 1.15
diff -u -p -w -r1.15 mips.h
--- mips.h 2001/05/07 09:18:52 1.15
+++ mips.h 2001/08/31 10:13:58
@@ -172,12 +172,10 @@ END_RELOC_NUMBERS (R_MIPS_maxext)
the rest are open. */
#define E_MIPS_MACH_3900 0x00810000
-
#define E_MIPS_MACH_4010 0x00820000
#define E_MIPS_MACH_4100 0x00830000
#define E_MIPS_MACH_4650 0x00850000
#define E_MIPS_MACH_4111 0x00880000
-#define E_MIPS_MACH_MIPS32_4K 0x00890000
#define E_MIPS_MACH_SB1 0x008a0000
/* Processor specific section indices. These sections do not actually
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.18
diff -u -p -w -r1.18 mips.h
--- mips.h 2001/08/16 19:24:33 1.18
+++ mips.h 2001/08/31 10:13:58
@@ -361,7 +361,6 @@ struct mips_opcode
#define CPU_R12000 12000
#define CPU_MIPS16 16
#define CPU_MIPS32 32
-#define CPU_MIPS32_4K 3204113 /* 32, 04, octal 'K'. */
#define CPU_MIPS5 5
#define CPU_MIPS64 64
#define CPU_SB1 12310201 /* octal 'SB', 01. */
Index: ld/ldmain.c
===================================================================
RCS file: /cvs/src/src/ld/ldmain.c,v
retrieving revision 1.31
diff -u -p -w -r1.31 ldmain.c
--- ldmain.c 2001/08/30 12:19:49 1.31
+++ ldmain.c 2001/08/31 10:13:58
@@ -539,6 +539,8 @@ get_emulation (argc, argv)
else if (strcmp (argv[i], "-mips1") == 0
|| strcmp (argv[i], "-mips2") == 0
|| strcmp (argv[i], "-mips3") == 0
+ || strcmp (argv[i], "-mips32") == 0
+ || strcmp (argv[i], "-mips64") == 0
|| strcmp (argv[i], "-mips4") == 0
|| strcmp (argv[i], "-mips5") == 0)
{
Index: opcodes/mips-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-dis.c,v
retrieving revision 1.20
diff -u -p -w -r1.20 mips-dis.c
--- mips-dis.c 2001/08/21 08:42:28 1.20
+++ mips-dis.c 2001/08/31 10:13:58
@@ -369,26 +369,23 @@ mips_isa_type (mach, isa, cputype)
*cputype = CPU_MIPS16;
*isa = ISA_MIPS3;
break;
- case bfd_mach_mips32:
- *cputype = CPU_MIPS32;
- *isa = ISA_MIPS32;
- break;
- case bfd_mach_mips32_4k:
- *cputype = CPU_MIPS32_4K;
- *isa = ISA_MIPS32;
- break;
case bfd_mach_mips5:
*cputype = CPU_MIPS5;
*isa = ISA_MIPS5;
break;
- case bfd_mach_mips64:
- *cputype = CPU_MIPS64;
- *isa = ISA_MIPS64;
- break;
case bfd_mach_mips_sb1:
*cputype = CPU_SB1;
*isa = ISA_MIPS64;
break;
+ case bfd_mach_mipsisa32:
+ * cputype = CPU_MIPS32;
+ * isa = ISA_MIPS32;
+ break;
+ case bfd_mach_mipsisa64:
+ * cputype = CPU_MIPS64;
+ * isa = ISA_MIPS64;
+ break;
+
default:
*cputype = CPU_R3000;
*isa = ISA_MIPS3;
Index: binutils/readelf.c
===================================================================
RCS file: /cvs/src/src/binutils/readelf.c,v
retrieving revision 1.116
diff -u -p -w -r1.116 readelf.c
--- readelf.c 2001/08/27 10:33:19 1.116
+++ readelf.c 2001/08/31 10:13:59
@@ -1639,7 +1639,6 @@ get_machine_flags (e_flags, e_machine)
case E_MIPS_MACH_4100: strcat (buf, ", 4100"); break;
case E_MIPS_MACH_4650: strcat (buf, ", 4650"); break;
case E_MIPS_MACH_4111: strcat (buf, ", 4111"); break;
- case E_MIPS_MACH_MIPS32_4K: strcat (buf, ", mips32-4k"); break;
case E_MIPS_MACH_SB1: strcat (buf, ", sb1"); break;
default: strcat (buf, " UNKNOWN"); break;
}
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