[PATCH] D10V simulator trace output fixes
Jason Eckhardt
jle@cygnus.com
Thu Apr 19 17:41:00 GMT 2001
Almost obvious.
We were outputting incorrect mnemonics for mvf0f and mvf0t.
Also, too many operands were printed for slx and srx.
2000-04-19 Jason Eckhardt <jle@redhat.com>
* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
(OP_4401): Output "mvf0t" instead of "mf0t".
(OP_460B): Do not output a flag register.
(OP_4609): Do not output a flag register.
Index: simops.c
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/d10v/simops.c,v
retrieving revision 1.78.2.6
diff -c -3 -p -r1.78.2.6 simops.c
*** simops.c 2000/02/09 05:08:49 1.78.2.6
--- simops.c 2001/03/28 02:38:24
*************** void
*** 1972,1978 ****
OP_4400 ()
{
int16 tmp;
! trace_input ("mf0f", OP_REG_OUTPUT, OP_REG, OP_VOID);
if (PSW_F0 == 0)
{
tmp = GPR (OP[1]);
--- 1972,1978 ----
OP_4400 ()
{
int16 tmp;
! trace_input ("mvf0f", OP_REG_OUTPUT, OP_REG, OP_VOID);
if (PSW_F0 == 0)
{
tmp = GPR (OP[1]);
*************** void
*** 1988,1994 ****
OP_4401 ()
{
int16 tmp;
! trace_input ("mf0t", OP_REG_OUTPUT, OP_REG, OP_VOID);
if (PSW_F0)
{
tmp = GPR (OP[1]);
--- 1988,1994 ----
OP_4401 ()
{
int16 tmp;
! trace_input ("mvf0t", OP_REG_OUTPUT, OP_REG, OP_VOID);
if (PSW_F0)
{
tmp = GPR (OP[1]);
*************** void
*** 2604,2610 ****
OP_460B ()
{
int16 tmp;
! trace_input ("slx", OP_REG, OP_FLAG, OP_VOID);
tmp = ((GPR (OP[0]) << 1) | PSW_F0);
SET_GPR (OP[0], tmp);
trace_output_16 (tmp);
--- 2604,2610 ----
OP_460B ()
{
int16 tmp;
! trace_input ("slx", OP_REG, OP_VOID, OP_VOID);
tmp = ((GPR (OP[0]) << 1) | PSW_F0);
SET_GPR (OP[0], tmp);
trace_output_16 (tmp);
*************** void
*** 2726,2732 ****
OP_4609 ()
{
uint16 tmp;
! trace_input ("srx", OP_REG, OP_FLAG, OP_VOID);
tmp = PSW_F0 << 15;
tmp = ((GPR (OP[0]) >> 1) | tmp);
SET_GPR (OP[0], tmp);
--- 2726,2732 ----
OP_4609 ()
{
uint16 tmp;
! trace_input ("srx", OP_REG, OP_VOID, OP_VOID);
tmp = PSW_F0 << 15;
tmp = ((GPR (OP[0]) >> 1) | tmp);
SET_GPR (OP[0], tmp);
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