RFA: command line switches for QED series of MIPS processors.

Nick Clifton nickc@cygnus.com
Thu Jun 15 12:12:00 GMT 2000


Hi Gavin, Hi Ulf,

  I would like to get approval to check in the patch below.  It adds
  command line switches for the QED series of MIPS processors to both
  GCC and GAS.  (These processors are r5000 variants).

Cheers
	Nick


2000-06-15  Nick Clifton  <nickc@cygnus.com>

	* config/mips/mips.c (override_options): Accept RM5200,
	RM5230, RM5231, RM5261, RM5721 and RM7000 as r5000 cpu
	variants.

	* invoke.texi: Document newly accepted cpu variants.

Index: gcc/config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/mips/mips.c,v
retrieving revision 1.90
diff -p -r1.90 mips.c
*** mips.c	2000/06/14 22:47:56	1.90
--- mips.c	2000/06/15 19:01:43
*************** override_options ()
*** 4776,4782 ****
  	  break;
  	}
      }
- 
    else
      {
        const char *p = mips_cpu_string;
--- 4776,4781 ----
*************** override_options ()
*** 4851,4856 ****
--- 4850,4873 ----
  	  if (!strcmp (p, "orion"))
  	    mips_cpu = PROCESSOR_R4600;
  	  break;
+ 	  
+ 	case 'm':
+ 	case 'M':
+ 	  switch (atoi (p + 1))
+ 	    {
+ 	    case 5200:
+ 	    case 5230:
+ 	    case 5231:
+ 	    case 5261:
+ 	    case 5721:
+ 	    case 7000:
+ 	      target_flags |= MASK_MAD;
+ 	      mips_cpu = PROCESSOR_R5000;
+ 	      break;
+ 	      
+ 	    default:
+ 	      break;
+ 	    }
  	}
  
        if (seen_v
  
Index: gcc/invoke.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/invoke.texi,v
retrieving revision 1.196
diff -p -r1.196 invoke.texi
*** invoke.texi	2000/06/09 16:26:21	1.196
--- invoke.texi	2000/06/15 19:01:43
*************** These @samp{-m} options are defined for 
*** 5656,5669 ****
  Assume the defaults for the machine type @var{cpu type} when scheduling
  instructions.  The choices for @var{cpu type} are @samp{r2000}, @samp{r3000},
  @samp{r3900}, @samp{r4000}, @samp{r4100}, @samp{r4300}, @samp{r4400},
! @samp{r4600}, @samp{r4650}, @samp{r5000}, @samp{r6000}, @samp{r8000},
! and @samp{orion}.  Additionally, the @samp{r2000}, @samp{r3000},
! @samp{r4000}, @samp{r5000}, and @samp{r6000} can be abbreviated as
! @samp{r2k} (or @samp{r2K}), @samp{r3k}, etc.  While picking a specific
! @var{cpu type} will schedule things appropriately for that particular
! chip, the compiler will not generate any code that does not meet level 1
! of the MIPS ISA (instruction set architecture) without a @samp{-mipsX}
! or @samp{-mabi} switch being used.
  
  @item -mips1
  Issue instructions from level 1 of the MIPS ISA.  This is the default.
--- 5656,5671 ----
  Assume the defaults for the machine type @var{cpu type} when scheduling
  instructions.  The choices for @var{cpu type} are @samp{r2000}, @samp{r3000},
  @samp{r3900}, @samp{r4000}, @samp{r4100}, @samp{r4300}, @samp{r4400},
! @samp{r4600}, @samp{r4650}, @samp{r5000}, @samp{rm5200}, @samp{rm5230},
! @samp{rm5231}, @samp{rm5261}, @samp{rm5721}, @samp{r6000},
! @samp{rm7000}, @samp{r8000}, and @samp{orion}.  Additionally, the
! @samp{r2000}, @samp{r3000}, @samp{r4000}, @samp{r5000}, and @samp{r6000}
! can be abbreviated as @samp{r2k} (or @samp{r2K}), @samp{r3k}, etc.
! While picking a specific @var{cpu type} will schedule things
! appropriately for that particular chip, the compiler will not generate
! any code that does not meet level 1 of the MIPS ISA (instruction set
! architecture) without a @samp{-mipsX} or @samp{-mabi} switch being
! used. 
  
  @item -mips1
  Issue instructions from level 1 of the MIPS ISA.  This is the default.


2000-06-15  Nick Clifton  <nickc@cygnus.com>

	* config/tc-mips.c (md_parse_option): Accept RM5200,RM5230,
	RM5231, RM5261, RM5721 and RM7000 as r5000 cpu variants.

	* doc/c-mips.texi: Document newly accepted cpu variants.

Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src//src/gas/config/tc-mips.c,v
retrieving revision 1.17
diff -p -r1.17 tc-mips.c
*** tc-mips.c	2000/06/09 00:00:03	1.17
--- tc-mips.c	2000/06/15 19:01:59
*************** md_parse_option (c, arg)
*** 9041,9048 ****
  		if (strcmp (p, "orion") == 0)
  		  mips_cpu = 4600;
  		break;
- 	      }
  
  	    if (sv
  		&& (mips_cpu != 4300
  		    && mips_cpu != 4100
--- 9041,9063 ----
  		if (strcmp (p, "orion") == 0)
  		  mips_cpu = 4600;
  		break;
  
+ 	      case 'm':
+ 	      case 'M':
+ 		switch (atoi (p + 1))
+ 		  {
+ 		  case 5200:
+ 		  case 5230:
+ 		  case 5231:
+ 		  case 5261:
+ 		  case 5721:
+ 		  case 7000:
+ 		    mips_cpu = 5000;
+ 		  default:
+ 		    break;
+ 		  }
+ 	      }
+ 	    
  	    if (sv
  		&& (mips_cpu != 4300
  		    && mips_cpu != 4100

Index: gas/doc/c-mips.texi
===================================================================
RCS file: /cvs/src//src/gas/doc/c-mips.texi,v
retrieving revision 1.4
diff -p -r1.4 c-mips.texi
*** c-mips.texi	2000/02/26 01:48:35	1.4
--- c-mips.texi	2000/06/15 19:01:59
*************** understood.  Valid @var{cpu} value are:
*** 132,138 ****
--- 132,144 ----
  4600,
  4650,
  5000,
+ rm5200,
+ rm5230,
+ rm5231,
+ rm5261,
+ rm5721,
  6000,
+ rm7000,
  8000,
  10000
  @end quotation


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