GAS for ARM: Reject ASR/LSR/ROR with immediate of 0

[Nick Clifton]

Hi Guys,

  It was just pointed out to me that GAS for the ARM accepts an
  immediate value of 0 for the ASR, LSR and ROR versions of addressing
  mode 1, whereas ARM's own assembler does not.  Since the ARM ARM
  also implies that a value of zero is incorrect I have developed the
  patch below.  Will this break anything in your worlds if I apply it ?

Cheers
	Nick

2000-08-14  Nick Clifton  <nickc@redhat.com>

	* tc-arm.c (decode_shift): Disallow a shift immediate value of
	0 for ASR, LSR and ROR modes.


Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src//src/gas/config/tc-arm.c,v
retrieving revision 1.52
diff -p -r1.52 tc-arm.c
*** tc-arm.c	2000/08/02 01:00:15	1.52
--- tc-arm.c	2000/08/14 20:40:23
*************** decode_shift (str, unrestrict)
*** 2555,2562 ****
  	    {
  	      unsigned num = inst.reloc.exp.X_add_number;
  
! 	      /* Reject operations greater than 32, or lsl #32.  */
! 	      if (num > 32 || (num == 32 && shft->value == 0))
  		{
  		  inst.error = _("Invalid immediate shift");
  		  return FAIL;
--- 2555,2564 ----
  	    {
  	      unsigned num = inst.reloc.exp.X_add_number;
  
! 	      /* Reject operations greater than 32, or lsl #32 or asr #0.  */
! 	      if (num > 32
! 		  || (num == 0  && shft->value != 0)
! 		  || (num == 32 && shft->value == 0))
  		{
  		  inst.error = _("Invalid immediate shift");
  		  return FAIL;