d30v bsr bundling problem

Richard Henderson rth@cygnus.com
Thu Apr 20 16:37:00 GMT 2000


        bsr.s/fx        foo
        ldw.s           r34, @(sp+, r0)

The assembler was bundling this as

	bsr.s/fx -> ldw.s

which doesn't work, as the link register receives the address
of the next bundle.  This patch fixes it, but I'm uncertain 
what case the removed code was supposed to be handling.  The
comment doesn't seem to cover it.

Thoughts?


r~


	* config/tc-d30v.c (write_2_short): Disregard opcode1->ecc when
	bundling a non-delayed branch type instruction.

Index: config/tc-d30v.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-d30v.c,v
retrieving revision 1.9
diff -c -p -d -r1.9 tc-d30v.c
*** tc-d30v.c	2000/04/02 08:24:54	1.9
--- tc-d30v.c	2000/04/20 23:30:31
*************** write_2_short (opcode1, insn1, opcode2, 
*** 814,821 ****
  	    }
  	}
        else if ((opcode1->op->flags_used & (FLAG_JMP | FLAG_JSR)
! 		&& ((opcode1->op->flags_used & FLAG_DELAY) == 0)
! 		&& ((opcode1->ecc == ECC_AL) || ! Optimizing))
  	       || opcode1->op->flags_used & FLAG_RP)
  	{
  	  /* We must emit (non-delayed) branch type instructions
--- 814,820 ----
  	    }
  	}
        else if ((opcode1->op->flags_used & (FLAG_JMP | FLAG_JSR)
! 		&& ((opcode1->op->flags_used & FLAG_DELAY) == 0))
  	       || opcode1->op->flags_used & FLAG_RP)
  	{
  	  /* We must emit (non-delayed) branch type instructions


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