R_MIPS_PC16 relocation handling, a proposal

Geoff Keating geoffk@ozemail.com.au
Tue Oct 12 22:34:00 GMT 1999


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> Date: Tue, 12 Oct 1999 18:41:07 +0200 (MET DST)
> From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
> Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
> Organization: Technical University of Gdansk
> 
> Hi,
> 
>  Guessing from MIPS ISA and ABI documents it seems there is no much use of
> R_MIPS_PC16 relocations.  On the other hand, the b* branch opcode family
> uses a shifted by two bits 16-bit PC-relative field that is not handled by
> any of MIPS relocations.  I think the authors of ABI might just missed the
> fact of the shift when documenting R_MIPS_PC16.
> 
>  Anyway, I propose using R_MIPS_PC16 for BFD_RELOC_16_PCREL_S2 relocations
> which would allow object modules to contain external references from b*
> opcodes.  As R_MIPS_PC16 is pretty unusable at the moment, nothing should
> break.  Otherwise, we might create a BFD-specific extension (just like
> e.g. R_386_PC8 for i386).

I have already implemented this as a GNU-specific extension which does
include the shift, as part of more general work to make embedded-pic
work on MIPS.  I had to add other relocs anyway, so there was no
benefit on trying to be tricky for just this one.

I'm pretty sure your patch wouldn't work with the current assembler.
My testcase looked like:

# Check GNU-specific embedded relocs, for ELF.

	.text
	.set noreorder
	nop
l2:	jal	g1		# R_MIPS_GNU_REL16_S2	g1   -1
	nop
	b	g2		# R_MIPS_GNU_REL16_S2	g2   -1
	nop
	b	g2		# R_MIPS_GNU_REL16_S2	g2   -1
	nop
	jal	l1		# R_MIPS_GNU_REL16_S2	.foo 4
	nop
	jal	l2		# -9
	nop
	b	l1+8		# R_MIPS_GNU_REL16_S2	.foo C
	nop
l3:	
	b	l2		# -D
	nop

	.section ".foo","ax",@progbits
	nop
l1:
	nop

This is a cut-down version, I hope I've updated the comments
correctly; the numbers are the addend as stored in the file.

The assembler was doing the pcrel handling wrong.  IMHO, the
assembler's generic pcrel handling is broken, or at least very
suboptimal for ELF, but it's possible to work around it.

I will be submitting a patch for this work Real Soon Now.

-- 
Geoffrey Keating <geoffk@cygnus.com>


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