[binutils-gdb] bpf: use %t after the remaining mnemonics in the opcode table
Vineet Gupta
vineetg@sourceware.org
Thu Sep 10 03:52:26 GMT 2026
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=c8b5c0f50e2e909296e601525808ab735862bcc2
commit c8b5c0f50e2e909296e601525808ab735862bcc2
Author: Vineet Gupta <vineet.gupta@linux.dev>
Date: Thu Sep 10 09:14:22 2026 +0530
bpf: use %t after the remaining mnemonics in the opcode table
The PR gas/34558 fix introduced %t and used it after `goto', the only
mnemonic involved in that bug. Every other literal mnemonic in the table
has the same latent problem, and it will bite the next time an instruction
is added whose mnemonic extends an existing one.
Convert the remaining 65 sites: `if', `lock', `gotol', `call', `callx',
`may_goto', `le16'/`le32'/`le64', `be16'/`be32'/`be64' and
`bswap16'/`bswap32'/`bswap64'.
Only mnemonics get %t. A %w that follows an operand tag stays a %w: the
operand parsers already reject input that runs a register or an immediate
into the next token, and a tag such as %i32 merely happens to end in a
name character, so treating it as a boundary would reject
`if r1 == 5goto+1', which the pseudo-C dialect's flexible spacing accepts.
Converting `lock' also needs %t to stop treating '*' as a mnemonic
character, or `lock*(u64 *) (r1 + 0) += r2' would no longer assemble.
This does tighten two cases that assembled before the PR gas/34558 fix,
`ifr1>r2 goto+1' and `callxr1', both of which run a mnemonic into its
first operand with no separating white space.
gas/
* config/tc-bpf.c (md_assemble): Do not let '*' end a mnemonic
for %t.
* testsuite/gas/bpf/spacing-pseudoc.s: Cover mnemonics followed
by an operand that cannot extend them.
* testsuite/gas/bpf/spacing-pseudoc.d: Likewise.
* testsuite/gas/bpf/spacing-mnemonic-pseudoc.s: New test.
* testsuite/gas/bpf/spacing-mnemonic-pseudoc.d: New test.
* testsuite/gas/bpf/spacing-mnemonic-pseudoc.l: New test.
* testsuite/gas/bpf/bpf.exp: Run it.
opcodes/
* bpf-opc.c (bpf_opcodes): Use %t rather than %w after the
remaining literal mnemonic text.
Signed-off-by: Vineet Gupta <vineet.gupta@linux.dev>
Diff:
---
gas/config/tc-bpf.c | 9 +-
gas/testsuite/gas/bpf/bpf.exp | 1 +
gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.d | 4 +
gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.l | 5 +
gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.s | 6 ++
gas/testsuite/gas/bpf/spacing-pseudoc.d | 3 +
gas/testsuite/gas/bpf/spacing-pseudoc.s | 5 +
opcodes/bpf-opc.c | 130 +++++++++++------------
8 files changed, 96 insertions(+), 67 deletions(-)
diff --git a/gas/config/tc-bpf.c b/gas/config/tc-bpf.c
index 76283a635ce..e2472546aa6 100644
--- a/gas/config/tc-bpf.c
+++ b/gas/config/tc-bpf.c
@@ -1521,8 +1521,13 @@ md_assemble (char *str ATTRIBUTE_UNUSED)
If the input continues the mnemonic instead, the
template has only matched a prefix of a longer mnemonic
and does not apply. Rejecting it here lets a subsequent
- template have a go at the whole mnemonic. */
- if (!is_whitespace (*s) && is_name_beginner (*s))
+ template have a go at the whole mnemonic.
+
+ '*' is excluded because md_begin makes it a name
+ beginner, so that a pseudo-C store can start a line, but
+ it never continues a mnemonic: `lock*(u64 *) (r1 + 0) +=
+ r2' has the operand of `lock%t%w' right after it. */
+ if (!is_whitespace (*s) && *s != '*' && is_name_beginner (*s))
{
PARSE_ERROR ("expected white space, got '%s'", s);
break;
diff --git a/gas/testsuite/gas/bpf/bpf.exp b/gas/testsuite/gas/bpf/bpf.exp
index bcedb0c98f7..ff52481cda4 100644
--- a/gas/testsuite/gas/bpf/bpf.exp
+++ b/gas/testsuite/gas/bpf/bpf.exp
@@ -78,6 +78,7 @@ if {[istarget bpf*-*-*]} {
run_dump_test jcond-be-pseudoc
run_dump_test spacing-pseudoc
+ run_dump_test spacing-mnemonic-pseudoc
# Overflow tests
run_dump_test offset16-overflow
diff --git a/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.d b/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.d
new file mode 100644
index 00000000000..5f64b137cb0
--- /dev/null
+++ b/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.d
@@ -0,0 +1,4 @@
+#as: -EL -mdialect=pseudoc
+#source: spacing-mnemonic-pseudoc.s
+#error_output: spacing-mnemonic-pseudoc.l
+#name: spacing does not run a mnemonic into a longer one, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.l b/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.l
new file mode 100644
index 00000000000..8a1686788cf
--- /dev/null
+++ b/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:5: Error: unrecognized instruction `ifr1>r2 goto\+1'
+.*:5: Error: expected white space, got 'r1>r2 goto\+1'
+.*:6: Error: unrecognized instruction `callxr1'
+.*:6: Error: expected white space, got 'r1'
diff --git a/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.s b/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.s
new file mode 100644
index 00000000000..639fcf501d6
--- /dev/null
+++ b/gas/testsuite/gas/bpf/spacing-mnemonic-pseudoc.s
@@ -0,0 +1,6 @@
+ /* Flexible spacing stops at the end of a mnemonic: the input may
+ not run a mnemonic into something that reads as the rest of a
+ longer one. See the %t tag in the opcode templates. */
+ .text
+ ifr1>r2 goto+1
+ callxr1
diff --git a/gas/testsuite/gas/bpf/spacing-pseudoc.d b/gas/testsuite/gas/bpf/spacing-pseudoc.d
index 48ea4d9a1a9..52d181c7b59 100644
--- a/gas/testsuite/gas/bpf/spacing-pseudoc.d
+++ b/gas/testsuite/gas/bpf/spacing-pseudoc.d
@@ -16,3 +16,6 @@ Disassembly of section .text:
28: 05 00 01 00 00 00 00 00 goto 0x1
30: 16 03 01 00 03 00 00 00 if w3==0x3 goto 0x1
38: 16 03 01 00 03 00 00 00 if w3==0x3 goto 0x1
+ 40: 15 01 01 00 05 00 00 00 if r1==0x5 goto 0x1
+ 48: 85 00 00 00 05 00 00 00 call 0x5
+ 50: db 21 00 00 00 00 00 00 lock \*\(u64\*\)\(r1\+0x0\)\+=r2
diff --git a/gas/testsuite/gas/bpf/spacing-pseudoc.s b/gas/testsuite/gas/bpf/spacing-pseudoc.s
index 5aff93dcf33..8e7ecd8917a 100644
--- a/gas/testsuite/gas/bpf/spacing-pseudoc.s
+++ b/gas/testsuite/gas/bpf/spacing-pseudoc.s
@@ -7,3 +7,8 @@
goto1
if w3==3 goto+1
if w3==3 goto1
+ /* A mnemonic may still run into an operand that cannot be
+ mistaken for the rest of a longer mnemonic. */
+ if r1 == 5goto+1
+ call5
+ lock*(u64 *)(r1 + 0) += r2
diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c
index 96c663d1522..15fe5dfd116 100644
--- a/opcodes/bpf-opc.c
+++ b/opcodes/bpf-opc.c
@@ -165,25 +165,25 @@ const struct bpf_opcode bpf_opcodes[] =
BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_MOV|BPF_SRC_K},
/* Endianness conversion instructions. */
- {BPF_INSN_ENDLE16, "endle%W%dr , 16", "%dr = le16%w%dr",
+ {BPF_INSN_ENDLE16, "endle%W%dr , 16", "%dr = le16%t%w%dr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_END16},
- {BPF_INSN_ENDLE32, "endle%W%dr , 32", "%dr = le32%w%dr",
+ {BPF_INSN_ENDLE32, "endle%W%dr , 32", "%dr = le32%t%w%dr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_END32},
- {BPF_INSN_ENDLE64, "endle%W%dr , 64", "%dr = le64%w%dr",
+ {BPF_INSN_ENDLE64, "endle%W%dr , 64", "%dr = le64%t%w%dr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_END64},
- {BPF_INSN_ENDBE16, "endbe%W%dr , 16", "%dr = be16%w%dr",
+ {BPF_INSN_ENDBE16, "endbe%W%dr , 16", "%dr = be16%t%w%dr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_X|BPF_IMM32_END16},
- {BPF_INSN_ENDBE32, "endbe%W%dr , 32", "%dr = be32%w%dr",
+ {BPF_INSN_ENDBE32, "endbe%W%dr , 32", "%dr = be32%t%w%dr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_X|BPF_IMM32_END32},
- {BPF_INSN_ENDBE64, "endbe%W%dr , 64", "%dr = be64%w%dr",
+ {BPF_INSN_ENDBE64, "endbe%W%dr , 64", "%dr = be64%t%w%dr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_X|BPF_IMM32_END64},
/* Byte-swap instructions. */
- {BPF_INSN_BSWAP16, "bswap%W%dr , 16", "%dr%w=%wbswap16%w%dr",
+ {BPF_INSN_BSWAP16, "bswap%W%dr , 16", "%dr%w=%wbswap16%t%w%dr",
BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU64|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_BSWAP16},
- {BPF_INSN_BSWAP32, "bswap%W%dr , 32", "%dr%w=%wbswap32%w%dr",
+ {BPF_INSN_BSWAP32, "bswap%W%dr , 32", "%dr%w=%wbswap32%t%w%dr",
BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU64|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_BSWAP32},
- {BPF_INSN_BSWAP64, "bswap%W%dr , 64", "%dr%w=%wbswap64%w%dr",
+ {BPF_INSN_BSWAP64, "bswap%W%dr , 64", "%dr%w=%wbswap64%t%w%dr",
BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU64|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_BSWAP64},
/* 64-bit load instruction. */
@@ -250,119 +250,119 @@ const struct bpf_opcode bpf_opcodes[] =
/* Compare-and-jump instructions (reg OP reg). */
{BPF_INSN_JAR, "ja%W%d16", "goto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JA|BPF_SRC_K},
- {BPF_INSN_JEQR, "jeq%W%dr , %sr , %d16", "if%w%dr == %sr%wgoto%t%w%d16",
+ {BPF_INSN_JEQR, "jeq%W%dr , %sr , %d16", "if%t%w%dr == %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JEQ|BPF_SRC_X},
- {BPF_INSN_JGTR, "jgt%W%dr , %sr , %d16", "if%w%dr > %sr%wgoto%t%w%d16",
+ {BPF_INSN_JGTR, "jgt%W%dr , %sr , %d16", "if%t%w%dr > %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JGT|BPF_SRC_X},
- {BPF_INSN_JSGTR, "jsgt%W%dr, %sr , %d16", "if%w%dr s> %sr%wgoto%t%w%d16",
+ {BPF_INSN_JSGTR, "jsgt%W%dr, %sr , %d16", "if%t%w%dr s> %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSGT|BPF_SRC_X},
- {BPF_INSN_JGER, "jge%W%dr , %sr , %d16", "if%w%dr >= %sr%wgoto%t%w%d16",
+ {BPF_INSN_JGER, "jge%W%dr , %sr , %d16", "if%t%w%dr >= %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JGE|BPF_SRC_X},
- {BPF_INSN_JSGER, "jsge%W%dr , %sr , %d16", "if%w%dr s>= %sr%wgoto%t%w%d16",
+ {BPF_INSN_JSGER, "jsge%W%dr , %sr , %d16", "if%t%w%dr s>= %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSGE|BPF_SRC_X},
- {BPF_INSN_JLTR, "jlt%W%dr , %sr , %d16", "if%w%dr < %sr%wgoto%t%w%d16",
+ {BPF_INSN_JLTR, "jlt%W%dr , %sr , %d16", "if%t%w%dr < %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JLT|BPF_SRC_X},
- {BPF_INSN_JSLTR, "jslt%W%dr , %sr , %d16", "if%w%dr s< %sr%wgoto%t%w%d16",
+ {BPF_INSN_JSLTR, "jslt%W%dr , %sr , %d16", "if%t%w%dr s< %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSLT|BPF_SRC_X},
- {BPF_INSN_JLER, "jle%W%dr , %sr , %d16", "if%w%dr <= %sr%wgoto%t%w%d16",
+ {BPF_INSN_JLER, "jle%W%dr , %sr , %d16", "if%t%w%dr <= %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JLE|BPF_SRC_X},
- {BPF_INSN_JSLER, "jsle%W%dr , %sr , %d16", "if%w%dr s<= %sr%wgoto%t%w%d16",
+ {BPF_INSN_JSLER, "jsle%W%dr , %sr , %d16", "if%t%w%dr s<= %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSLE|BPF_SRC_X},
- {BPF_INSN_JSETR, "jset%W%dr , %sr , %d16", "if%w%dr & %sr%wgoto%t%w%d16",
+ {BPF_INSN_JSETR, "jset%W%dr , %sr , %d16", "if%t%w%dr & %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSET|BPF_SRC_X},
- {BPF_INSN_JNER, "jne%W%dr , %sr , %d16", "if%w%dr != %sr%wgoto%t%w%d16",
+ {BPF_INSN_JNER, "jne%W%dr , %sr , %d16", "if%t%w%dr != %sr%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JNE|BPF_SRC_X},
- {BPF_INSN_CALLR, "call%W%dr", "callx%w%dr",
+ {BPF_INSN_CALLR, "call%W%dr", "callx%t%w%dr",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_CALL|BPF_SRC_X},
- {BPF_INSN_CALL, "call%W%d32", "call%w%d32",
+ {BPF_INSN_CALL, "call%W%d32", "call%t%w%d32",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_CALL|BPF_SRC_K},
{BPF_INSN_EXIT, "exit", "exit",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_EXIT|BPF_SRC_K},
/* Compare-and-jump instructions (reg OP imm). */
- {BPF_INSN_JEQI, "jeq%W%dr , %i32 , %d16", "if%w%dr == %i32%wgoto%t%w%d16",
+ {BPF_INSN_JEQI, "jeq%W%dr , %i32 , %d16", "if%t%w%dr == %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JEQ|BPF_SRC_K},
- {BPF_INSN_JGTI, "jgt%W%dr , %i32 , %d16", "if%w%dr > %i32%wgoto%t%w%d16",
+ {BPF_INSN_JGTI, "jgt%W%dr , %i32 , %d16", "if%t%w%dr > %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JGT|BPF_SRC_K},
- {BPF_INSN_JSGTI, "jsgt%W%dr, %i32 , %d16", "if%w%dr s> %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSGTI, "jsgt%W%dr, %i32 , %d16", "if%t%w%dr s> %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSGT|BPF_SRC_K},
- {BPF_INSN_JGEI, "jge%W%dr , %i32 , %d16", "if%w%dr >= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JGEI, "jge%W%dr , %i32 , %d16", "if%t%w%dr >= %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JGE|BPF_SRC_K},
- {BPF_INSN_JSGEI, "jsge%W%dr , %i32 , %d16", "if%w%dr s>= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSGEI, "jsge%W%dr , %i32 , %d16", "if%t%w%dr s>= %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSGE|BPF_SRC_K},
- {BPF_INSN_JLTI, "jlt%W%dr , %i32 , %d16", "if%w%dr < %i32%wgoto%t%w%d16",
+ {BPF_INSN_JLTI, "jlt%W%dr , %i32 , %d16", "if%t%w%dr < %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JLT|BPF_SRC_K},
- {BPF_INSN_JSLTI, "jslt%W%dr , %i32, %d16", "if%w%dr s< %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSLTI, "jslt%W%dr , %i32, %d16", "if%t%w%dr s< %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSLT|BPF_SRC_K},
- {BPF_INSN_JLEI, "jle%W%dr , %i32 , %d16", "if%w%dr <= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JLEI, "jle%W%dr , %i32 , %d16", "if%t%w%dr <= %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JLE|BPF_SRC_K},
- {BPF_INSN_JSLEI, "jsle%W%dr , %i32 , %d16", "if%w%dr s<= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSLEI, "jsle%W%dr , %i32 , %d16", "if%t%w%dr s<= %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSLE|BPF_SRC_K},
- {BPF_INSN_JSETI, "jset%W%dr , %i32 , %d16", "if%w%dr & %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSETI, "jset%W%dr , %i32 , %d16", "if%t%w%dr & %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JSET|BPF_SRC_K},
- {BPF_INSN_JNEI, "jne%W%dr , %i32 , %d16", "if%w%dr != %i32%wgoto%t%w%d16",
+ {BPF_INSN_JNEI, "jne%W%dr , %i32 , %d16", "if%t%w%dr != %i32%wgoto%t%w%d16",
BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JNE|BPF_SRC_K},
/* 32-bit jump-always. */
- {BPF_INSN_JAL, "jal%W%d32", "gotol%w%d32",
+ {BPF_INSN_JAL, "jal%W%d32", "gotol%t%w%d32",
BPF_V4, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JA|BPF_SRC_K},
/* 32-bit compare-and-jump instructions (reg OP reg). */
- {BPF_INSN_JEQ32R, "jeq32%W%dr , %sr , %d16", "if%w%dw == %sw%wgoto%t%w%d16",
+ {BPF_INSN_JEQ32R, "jeq32%W%dr , %sr , %d16", "if%t%w%dw == %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JEQ|BPF_SRC_X},
- {BPF_INSN_JGT32R, "jgt32%W%dr , %sr , %d16", "if%w%dw > %sw%wgoto%t%w%d16",
+ {BPF_INSN_JGT32R, "jgt32%W%dr , %sr , %d16", "if%t%w%dw > %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JGT|BPF_SRC_X},
- {BPF_INSN_JSGT32R, "jsgt32%W%dr, %sr , %d16", "if%w%dw s> %sw%wgoto%t%w%d16",
+ {BPF_INSN_JSGT32R, "jsgt32%W%dr, %sr , %d16", "if%t%w%dw s> %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSGT|BPF_SRC_X},
- {BPF_INSN_JGE32R, "jge32%W%dr , %sr , %d16", "if%w%dw >= %sw%wgoto%t%w%d16",
+ {BPF_INSN_JGE32R, "jge32%W%dr , %sr , %d16", "if%t%w%dw >= %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JGE|BPF_SRC_X},
- {BPF_INSN_JSGE32R, "jsge32%W%dr , %sr , %d16", "if%w%dw s>= %sw%wgoto%t%w%d16",
+ {BPF_INSN_JSGE32R, "jsge32%W%dr , %sr , %d16", "if%t%w%dw s>= %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSGE|BPF_SRC_X},
- {BPF_INSN_JLT32R, "jlt32%W%dr , %sr , %d16", "if%w%dw < %sw%wgoto%t%w%d16",
+ {BPF_INSN_JLT32R, "jlt32%W%dr , %sr , %d16", "if%t%w%dw < %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JLT|BPF_SRC_X},
- {BPF_INSN_JSLT32R, "jslt32%W%dr , %sr , %d16", "if%w%dw s< %sw%wgoto%t%w%d16",
+ {BPF_INSN_JSLT32R, "jslt32%W%dr , %sr , %d16", "if%t%w%dw s< %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSLT|BPF_SRC_X},
- {BPF_INSN_JLE32R, "jle32%W%dr , %sr , %d16", "if%w%dw <= %sw%wgoto%t%w%d16",
+ {BPF_INSN_JLE32R, "jle32%W%dr , %sr , %d16", "if%t%w%dw <= %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JLE|BPF_SRC_X},
- {BPF_INSN_JSLE32R, "jsle32%W%dr , %sr , %d16", "if%w%dw s<= %sw%wgoto%t%w%d16",
+ {BPF_INSN_JSLE32R, "jsle32%W%dr , %sr , %d16", "if%t%w%dw s<= %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSLE|BPF_SRC_X},
- {BPF_INSN_JSET32R, "jset32%W%dr , %sr , %d16", "if%w%dw & %sw%wgoto%t%w%d16",
+ {BPF_INSN_JSET32R, "jset32%W%dr , %sr , %d16", "if%t%w%dw & %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSET|BPF_SRC_X},
- {BPF_INSN_JNE32R, "jne32%W%dr , %sr , %d16", "if%w%dw != %sw%wgoto%t%w%d16",
+ {BPF_INSN_JNE32R, "jne32%W%dr , %sr , %d16", "if%t%w%dw != %sw%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JNE|BPF_SRC_X},
/* 32-bit compare-and-jump instructions (reg OP imm). */
- {BPF_INSN_JEQ32I, "jeq32%W%dr , %i32 , %d16", "if%w%dw == %i32%wgoto%t%w%d16",
+ {BPF_INSN_JEQ32I, "jeq32%W%dr , %i32 , %d16", "if%t%w%dw == %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JEQ|BPF_SRC_K},
- {BPF_INSN_JGT32I, "jgt32%W%dr , %i32 , %d16", "if%w%dw > %i32%wgoto%t%w%d16",
+ {BPF_INSN_JGT32I, "jgt32%W%dr , %i32 , %d16", "if%t%w%dw > %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JGT|BPF_SRC_K},
- {BPF_INSN_JSGT32I, "jsgt32%W%dr, %i32 , %d16", "if%w%dw s> %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSGT32I, "jsgt32%W%dr, %i32 , %d16", "if%t%w%dw s> %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSGT|BPF_SRC_K},
- {BPF_INSN_JGE32I, "jge32%W%dr , %i32 , %d16", "if%w%dw >= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JGE32I, "jge32%W%dr , %i32 , %d16", "if%t%w%dw >= %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JGE|BPF_SRC_K},
- {BPF_INSN_JSGE32I, "jsge32%W%dr , %i32 , %d16", "if%w%dw s>= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSGE32I, "jsge32%W%dr , %i32 , %d16", "if%t%w%dw s>= %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSGE|BPF_SRC_K},
- {BPF_INSN_JLT32I, "jlt32%W%dr , %i32 , %d16", "if%w%dw < %i32%wgoto%t%w%d16",
+ {BPF_INSN_JLT32I, "jlt32%W%dr , %i32 , %d16", "if%t%w%dw < %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JLT|BPF_SRC_K},
- {BPF_INSN_JSLT32I, "jslt32%W%dr , %i32, %d16", "if%w%dw s< %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSLT32I, "jslt32%W%dr , %i32, %d16", "if%t%w%dw s< %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSLT|BPF_SRC_K},
- {BPF_INSN_JLE32I, "jle32%W%dr , %i32 , %d16", "if%w%dw <= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JLE32I, "jle32%W%dr , %i32 , %d16", "if%t%w%dw <= %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JLE|BPF_SRC_K},
- {BPF_INSN_JSLE32I, "jsle32%W%dr , %i32 , %d16", "if%w%dw s<= %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSLE32I, "jsle32%W%dr , %i32 , %d16", "if%t%w%dw s<= %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSLE|BPF_SRC_K},
- {BPF_INSN_JSET32I, "jset32%W%dr , %i32 , %d16", "if%w%dw & %i32%wgoto%t%w%d16",
+ {BPF_INSN_JSET32I, "jset32%W%dr , %i32 , %d16", "if%t%w%dw & %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JSET|BPF_SRC_K},
- {BPF_INSN_JNE32I, "jne32%W%dr , %i32 , %d16", "if%w%dw != %i32%wgoto%t%w%d16",
+ {BPF_INSN_JNE32I, "jne32%W%dr , %i32 , %d16", "if%t%w%dw != %i32%wgoto%t%w%d16",
BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JNE|BPF_SRC_K},
/* Atomic instructions. */
- {BPF_INSN_AADD, "aadd%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) += %sr",
+ {BPF_INSN_AADD, "aadd%W[ %dr %o16 ] , %sr", "lock%t%w* ( u64 * ) ( %dr %o16 ) += %sr",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AADD},
- {BPF_INSN_AOR, "aor%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) |= %sr",
+ {BPF_INSN_AOR, "aor%W[ %dr %o16 ] , %sr", "lock%t%w* ( u64 * ) ( %dr %o16 ) |= %sr",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AOR},
- {BPF_INSN_AAND, "aand%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) &= %sr",
+ {BPF_INSN_AAND, "aand%W[ %dr %o16 ] , %sr", "lock%t%w* ( u64 * ) ( %dr %o16 ) &= %sr",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AAND},
- {BPF_INSN_AXOR, "axor%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) ^= %sr",
+ {BPF_INSN_AXOR, "axor%W[ %dr %o16 ] , %sr", "lock%t%w* ( u64 * ) ( %dr %o16 ) ^= %sr",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AXOR},
/* Atomic instructions with fetching. */
@@ -376,13 +376,13 @@ const struct bpf_opcode bpf_opcodes[] =
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AFXOR},
/* Atomic instructions (32-bit.) */
- {BPF_INSN_AADD32, "aadd32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) += %sw",
+ {BPF_INSN_AADD32, "aadd32%W[ %dr %o16 ] , %sr", "lock%t%w* ( u32 * ) ( %dr %o16 ) += %sw",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AADD},
- {BPF_INSN_AOR32, "aor32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) |= %sw",
+ {BPF_INSN_AOR32, "aor32%W[ %dr %o16 ] , %sr", "lock%t%w* ( u32 * ) ( %dr %o16 ) |= %sw",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AOR},
- {BPF_INSN_AAND32, "aand32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) &= %sw",
+ {BPF_INSN_AAND32, "aand32%W[ %dr %o16 ] , %sr", "lock%t%w* ( u32 * ) ( %dr %o16 ) &= %sw",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AAND},
- {BPF_INSN_AXOR32, "axor32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) ^= %sw",
+ {BPF_INSN_AXOR32, "axor32%W[ %dr %o16 ] , %sr", "lock%t%w* ( u32 * ) ( %dr %o16 ) ^= %sw",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AXOR},
/* Atomic instructions with fetching (32-bit.) */
@@ -414,7 +414,7 @@ const struct bpf_opcode bpf_opcodes[] =
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AADD},
/* The "conditional pseudo-jump" instruction, a.k.a. "may_goto". */
- {BPF_INSN_JCOND, "jcond%W%d16", "may_goto%w%d16",
+ {BPF_INSN_JCOND, "jcond%W%d16", "may_goto%t%w%d16",
BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_JMP|BPF_CODE_JCOND|BPF_SRC_K},
/* the brkpt instruction is used by the BPF simulator and it doesn't
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