[binutils-gdb] aarch64: Add FEAT_SCR2 System registers

[Richard Ball]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=fcdde313c9eef99b4a835e1c60354ca3afe18773

commit fcdde313c9eef99b4a835e1c60354ca3afe18773
Author: Richard Ball <Richard.Ball@arm.com>
Date:   Fri Jan 16 22:15:35 2026 +0000

    aarch64: Add FEAT_SCR2 System registers
    
    This patch adds the system register "SCR2_EL3"
    Defined by FEAT_SCR2.

Diff:
---
 gas/testsuite/gas/aarch64/sysreg/scr2-bad.d |  3 +++
 gas/testsuite/gas/aarch64/sysreg/scr2-bad.l |  5 +++++
 gas/testsuite/gas/aarch64/sysreg/scr2.d     | 10 ++++++++++
 gas/testsuite/gas/aarch64/sysreg/scr2.s     |  3 +++
 opcodes/aarch64-sys-regs.def                |  1 +
 5 files changed, 22 insertions(+)

diff --git a/gas/testsuite/gas/aarch64/sysreg/scr2-bad.d b/gas/testsuite/gas/aarch64/sysreg/scr2-bad.d
new file mode 100644
index 00000000000..5b7143d6ebe
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/scr2-bad.d
@@ -0,0 +1,3 @@
+#as: -march=armv9.2-a -menable-sysreg-checking -I$srcdir/$subdir
+#source:scr2.s
+#error_output: scr2-bad.l
\ No newline at end of file
diff --git a/gas/testsuite/gas/aarch64/sysreg/scr2-bad.l b/gas/testsuite/gas/aarch64/sysreg/scr2-bad.l
new file mode 100644
index 00000000000..59c7e2c6181
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/scr2-bad.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*: Error: selected processor does not support system register name 'scr2_el3'
+.*:  Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'scr2_el3'
+.*:  Info: macro invoked from here
\ No newline at end of file
diff --git a/gas/testsuite/gas/aarch64/sysreg/scr2.d b/gas/testsuite/gas/aarch64/sysreg/scr2.d
new file mode 100644
index 00000000000..c784b576d12
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/scr2.d
@@ -0,0 +1,10 @@
+#as: -menable-sysreg-checking -march=armv9.3-a -I$srcdir/$subdir
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*:	d51e1240 	msr	scr2_el3, x0
+.*:	d53e1240 	mrs	x0, scr2_el3
diff --git a/gas/testsuite/gas/aarch64/sysreg/scr2.s b/gas/testsuite/gas/aarch64/sysreg/scr2.s
new file mode 100644
index 00000000000..8d1d424d4e5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/scr2.s
@@ -0,0 +1,3 @@
+.include "sysreg-test-utils.inc"
+
+	rw_sys_reg scr2_el3
diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index f4761438716..86d04b4a874 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -1197,6 +1197,7 @@
   SYSREG ("s2pir_el2",		CPENC (3,4,10,2,5),	0,		AARCH64_FEATURE (V8_8A)) /* S2PIE */
   SYSREG ("s2por_el1",		CPENC (3,0,10,2,5),	0,		AARCH64_FEATURE (V8_8A)) /* S2POE */
   SYSREG ("scr_el3",		CPENC (3,6,1,1,0),	0,		AARCH64_NO_FEATURES)
+  SYSREG ("scr2_el3",		CPENC (3,6,1,2,2),	0,		AARCH64_FEATURE (V9_3A)) /* SCR2 */
   SYSREG ("sctlr_el1",		CPENC (3,0,1,0,0),	0,		AARCH64_NO_FEATURES)
   SYSREG ("sctlr_el12",		CPENC (3,5,1,0,0),	0,		AARCH64_NO_FEATURES)
   SYSREG ("sctlr_el2",		CPENC (3,4,1,0,0),	0,		AARCH64_NO_FEATURES)