[binutils-gdb] LoongArch: Optimize TC_FORCE_RELOCATION_SUB_LOCAL
liu zhensong
liuzhensong@sourceware.org
Mon Aug 31 08:11:29 GMT 2026
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=acbf21547ecc21e2cab7e9fc56633deefb207fe4
commit acbf21547ecc21e2cab7e9fc56633deefb207fe4
Author: mengqinggang <mengqinggang@loongson.cn>
Date: Fri Aug 14 01:07:35 2026 +0800
LoongArch: Optimize TC_FORCE_RELOCATION_SUB_LOCAL
If no linker-relaxable instructions between the subtraction symbol and PC,
change the fixup to pc-relative to avoid emitting ADD/SUB relocations.
Diff:
---
gas/config/tc-loongarch.c | 39 ++++++++++++++----------
gas/config/tc-loongarch.h | 3 --
gas/testsuite/gas/loongarch/reloc-abs-data.d | 18 +++++++++++
gas/testsuite/gas/loongarch/reloc-abs-data.s | 12 ++++++++
gas/testsuite/gas/loongarch/reloc-abs-norelax.d | 18 +++++++++++
gas/testsuite/gas/loongarch/reloc-abs-pcrel.d | 18 +++++++++++
gas/testsuite/gas/loongarch/reloc-abs-relax.d | 23 ++++++++++++++
gas/testsuite/gas/loongarch/reloc-abs-relax.s | 12 ++++++++
gas/testsuite/gas/loongarch/thin_add_sub_relax.d | 6 ++--
9 files changed, 126 insertions(+), 23 deletions(-)
diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
index 218c7004b8d..d9874e4408d 100644
--- a/gas/config/tc-loongarch.c
+++ b/gas/config/tc-loongarch.c
@@ -1590,22 +1590,6 @@ loongarch_force_relocation (struct fix *fixp)
return generic_force_reloc (fixp);
}
-/* If subsy of BFD_RELOC32/64 and PC in same segment, and without relax
- or PC at start of subsy or with relax but sub_symbol_segment not in
- SEC_CODE, we generate 32/64_PCREL. */
-bool
-loongarch_force_relocation_sub_local (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
-{
- return !(LARCH_opts.thin_add_sub
- && (fixp->fx_r_type == BFD_RELOC_32
- || fixp->fx_r_type == BFD_RELOC_64)
- && (!LARCH_opts.relax
- || (S_GET_VALUE (fixp->fx_subsy)
- == fixp->fx_frag->fr_address + fixp->fx_where)
- || (S_GET_SEGMENT (fixp->fx_subsy)->flags & SEC_CODE) == 0));
-}
-
-
/* Whether emit relocations for label subtraction in same section. */
static bool
_loongarch_force_relocation_sub_same (segT sec,
@@ -1644,6 +1628,29 @@ _loongarch_force_relocation_sub_same (segT sec,
return true;
}
+/* Don't allow the generic code to convert fixups involving the
+ subtraction of a label in the current section to pc-relative. */
+bool
+loongarch_force_relocation_sub_local (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
+{
+ if (! LARCH_opts.thin_add_sub)
+ return true;
+
+ /* LoongArch only has R_LARCH_32/64_PCREL. BFD_RELOC_32/64 can change
+ to R_LARCH_32/64_PCREL. */
+ if (fixp->fx_r_type != BFD_RELOC_32
+ && fixp->fx_r_type != BFD_RELOC_64)
+ return true;
+
+ fragS *pcfrag = fixp->fx_frag;
+ fragS *subfrag = symbol_get_frag (fixp->fx_subsy);
+ segT subsec = S_GET_SEGMENT (fixp->fx_subsy);
+
+ if (! _loongarch_force_relocation_sub_same (subsec, pcfrag, subfrag))
+ return false;
+
+ return true;
+}
/* Postpone text-section label subtraction calculation until linking,
since linker relaxations might change the deltas. */
diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h
index 146844e772e..28624cbc551 100644
--- a/gas/config/tc-loongarch.h
+++ b/gas/config/tc-loongarch.h
@@ -75,9 +75,6 @@ extern bool loongarch_frag_align_code (int, int);
#define TC_FORCE_RELOCATION(FIX) loongarch_force_relocation (FIX)
extern int loongarch_force_relocation (struct fix *);
-/* If subsy of BFD_RELOC32/64 and PC in same segment, and without relax
- or PC at start of subsy or with relax but sub_symbol_segment not in
- SEC_CODE, we generate 32/64_PCREL. */
extern bool loongarch_force_relocation_sub_local (struct fix *, asection *);
#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEC) \
loongarch_force_relocation_sub_local (FIX, SEC)
diff --git a/gas/testsuite/gas/loongarch/reloc-abs-data.d b/gas/testsuite/gas/loongarch/reloc-abs-data.d
new file mode 100644
index 00000000000..579bbbafd88
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/reloc-abs-data.d
@@ -0,0 +1,18 @@
+#source: reloc-abs-data.s
+#as: -mthin-add-sub
+#objdump: -Dr
+
+#...
+.*R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*R_LARCH_SUB16 .L1\^B1
+.*R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*R_LARCH_64_PCREL \*ABS\*\+0x12345678
+.*R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*R_LARCH_SUB16 .L1\^B1
+.*R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*R_LARCH_ADD8 \*ABS\*\+0x2e
+.*R_LARCH_SUB8 .L1\^B1
+.*R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*R_LARCH_SUB16 .L1\^B1
+.*R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*R_LARCH_64_PCREL \*ABS\*\+0x12345678
diff --git a/gas/testsuite/gas/loongarch/reloc-abs-data.s b/gas/testsuite/gas/loongarch/reloc-abs-data.s
new file mode 100644
index 00000000000..3734790eb97
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/reloc-abs-data.s
@@ -0,0 +1,12 @@
+ .data
+1:
+ nop
+ .half 0x2eef - 1b
+ .word 0x2eef - 1b
+ .dword 0x12345678 - 1b
+ .short 0x2eef - 1b
+ .long 0x2eef - 1b
+ .byte 0x2e - 1b
+ .2byte 0x2eef - 1b
+ .4byte 0x2eef - 1b
+ .8byte 0x12345678 - 1b
diff --git a/gas/testsuite/gas/loongarch/reloc-abs-norelax.d b/gas/testsuite/gas/loongarch/reloc-abs-norelax.d
new file mode 100644
index 00000000000..06f3694f803
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/reloc-abs-norelax.d
@@ -0,0 +1,18 @@
+#source: reloc-abs-relax.s
+#as: -mthin-add-sub -mno-relax
+#objdump: -dr
+
+#...
+.*8: R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*8: R_LARCH_SUB16 .L1\^B1
+.*a: R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*e: R_LARCH_64_PCREL \*ABS\*\+0x12345678
+.*16: R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*16: R_LARCH_SUB16 .L1\^B1
+.*18: R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*1c: R_LARCH_ADD8 \*ABS\*\+0x2e
+.*1c: R_LARCH_SUB8 .L1\^B1
+.*1d: R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*1d: R_LARCH_SUB16 .L1\^B1
+.*1f: R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*23: R_LARCH_64_PCREL \*ABS\*\+0x12345678
diff --git a/gas/testsuite/gas/loongarch/reloc-abs-pcrel.d b/gas/testsuite/gas/loongarch/reloc-abs-pcrel.d
new file mode 100644
index 00000000000..8403c2c4c1d
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/reloc-abs-pcrel.d
@@ -0,0 +1,18 @@
+#source: reloc-abs.s
+#as: -mrelax -mthin-add-sub
+#objdump: -dr
+
+#...
+.*R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*R_LARCH_SUB16 .L1\^B1
+.*R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*R_LARCH_64_PCREL \*ABS\*\+0x12345678
+.*R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*R_LARCH_SUB16 .L1\^B1
+.*R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*R_LARCH_ADD8 \*ABS\*\+0x2e
+.*R_LARCH_SUB8 .L1\^B1
+.*R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*R_LARCH_SUB16 .L1\^B1
+.*R_LARCH_32_PCREL \*ABS\*\+0x2eef
+.*R_LARCH_64_PCREL \*ABS\*\+0x12345678
diff --git a/gas/testsuite/gas/loongarch/reloc-abs-relax.d b/gas/testsuite/gas/loongarch/reloc-abs-relax.d
new file mode 100644
index 00000000000..03dd3bd2fbe
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/reloc-abs-relax.d
@@ -0,0 +1,23 @@
+#source: reloc-abs-relax.s
+#as: -mthin-add-sub -mrelax
+#objdump: -dr
+
+#...
+.*8: R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*8: R_LARCH_SUB16 .L1\^B1
+.*a: R_LARCH_ADD32 \*ABS\*\+0x2eef
+.*a: R_LARCH_SUB32 .L1\^B1
+.*e: R_LARCH_ADD64 \*ABS\*\+0x12345678
+.*e: R_LARCH_SUB64 .L1\^B1
+.*16: R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*16: R_LARCH_SUB16 .L1\^B1
+.*18: R_LARCH_ADD32 \*ABS\*\+0x2eef
+.*18: R_LARCH_SUB32 .L1\^B1
+.*1c: R_LARCH_ADD8 \*ABS\*\+0x2e
+.*1c: R_LARCH_SUB8 .L1\^B1
+.*1d: R_LARCH_ADD16 \*ABS\*\+0x2eef
+.*1d: R_LARCH_SUB16 .L1\^B1
+.*1f: R_LARCH_ADD32 \*ABS\*\+0x2eef
+.*1f: R_LARCH_SUB32 .L1\^B1
+.*23: R_LARCH_ADD64 \*ABS\*\+0x12345678
+.*23: R_LARCH_SUB64 .L1\^B1
diff --git a/gas/testsuite/gas/loongarch/reloc-abs-relax.s b/gas/testsuite/gas/loongarch/reloc-abs-relax.s
new file mode 100644
index 00000000000..8d41224dbc2
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/reloc-abs-relax.s
@@ -0,0 +1,12 @@
+ .text
+1:
+ call36 fff
+ .half 0x2eef - 1b
+ .word 0x2eef - 1b
+ .dword 0x12345678 - 1b
+ .short 0x2eef - 1b
+ .long 0x2eef - 1b
+ .byte 0x2e - 1b
+ .2byte 0x2eef - 1b
+ .4byte 0x2eef - 1b
+ .8byte 0x12345678 - 1b
diff --git a/gas/testsuite/gas/loongarch/thin_add_sub_relax.d b/gas/testsuite/gas/loongarch/thin_add_sub_relax.d
index 92d9157b0d7..e49b1c6f42d 100644
--- a/gas/testsuite/gas/loongarch/thin_add_sub_relax.d
+++ b/gas/testsuite/gas/loongarch/thin_add_sub_relax.d
@@ -9,14 +9,12 @@ Disassembly of section .text:
00000000.* <.L1>:
[ ]+...
.*R_LARCH_32_PCREL[ ]+.L3
-.*R_LARCH_ADD32[ ]+.L3
-.*R_LARCH_SUB32[ ]+.L1
+.*R_LARCH_32_PCREL[ ]+.L3\+0x4
#...
.*<.L2>:
[ ]+...
.*R_LARCH_64_PCREL[ ]+.L3
-.*R_LARCH_ADD64[ ]+.L3
-.*R_LARCH_SUB64[ ]+.L2
+.*R_LARCH_64_PCREL[ ]+.L3\+0x8
#...
Disassembly[ ]+of[ ]+section[ ]+sx:
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