[binutils-gdb] aarch64: Add FEAT_SRMASK system registers
Alice Carlotti
acarlotti@sourceware.org
Tue Sep 23 19:08:23 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=caafd8484539d787c33b9ac9a0b56994c70b1d17
commit caafd8484539d787c33b9ac9a0b56994c70b1d17
Author: Alice Carlotti <alice.carlotti@arm.com>
Date: Tue Sep 2 17:18:24 2025 +0100
aarch64: Add FEAT_SRMASK system registers
Diff:
---
gas/testsuite/gas/aarch64/sysreg/srmask.d | 57 +++++++++++++++++++++++++++++++
gas/testsuite/gas/aarch64/sysreg/srmask.s | 26 ++++++++++++++
opcodes/aarch64-sys-regs.def | 24 +++++++++++++
3 files changed, 107 insertions(+)
diff --git a/gas/testsuite/gas/aarch64/sysreg/srmask.d b/gas/testsuite/gas/aarch64/sysreg/srmask.d
new file mode 100644
index 00000000000..c974d7b387e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/srmask.d
@@ -0,0 +1,57 @@
+#as: -march=armv9.5-a -I$srcdir/$subdir
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d5181400 msr sctlrmask_el1, x0
+.*: d5381400 mrs x0, sctlrmask_el1
+.*: d51c1400 msr sctlrmask_el2, x0
+.*: d53c1400 mrs x0, sctlrmask_el2
+.*: d51d1400 msr sctlrmask_el12, x0
+.*: d53d1400 mrs x0, sctlrmask_el12
+.*: d5181440 msr cpacrmask_el1, x0
+.*: d5381440 mrs x0, cpacrmask_el1
+.*: d51c1440 msr cptrmask_el2, x0
+.*: d53c1440 mrs x0, cptrmask_el2
+.*: d51d1440 msr cpacrmask_el12, x0
+.*: d53d1440 mrs x0, cpacrmask_el12
+.*: d5181460 msr sctlr2mask_el1, x0
+.*: d5381460 mrs x0, sctlr2mask_el1
+.*: d51c1460 msr sctlr2mask_el2, x0
+.*: d53c1460 mrs x0, sctlr2mask_el2
+.*: d51d1460 msr sctlr2mask_el12, x0
+.*: d53d1460 mrs x0, sctlr2mask_el12
+.*: d5181480 msr cpacralias_el1, x0
+.*: d5381480 mrs x0, cpacralias_el1
+.*: d51814c0 msr sctlralias_el1, x0
+.*: d53814c0 mrs x0, sctlralias_el1
+.*: d51814e0 msr sctlr2alias_el1, x0
+.*: d53814e0 mrs x0, sctlr2alias_el1
+.*: d5182740 msr tcrmask_el1, x0
+.*: d5382740 mrs x0, tcrmask_el1
+.*: d51c2740 msr tcrmask_el2, x0
+.*: d53c2740 mrs x0, tcrmask_el2
+.*: d51d2740 msr tcrmask_el12, x0
+.*: d53d2740 mrs x0, tcrmask_el12
+.*: d5182760 msr tcr2mask_el1, x0
+.*: d5382760 mrs x0, tcr2mask_el1
+.*: d51c2760 msr tcr2mask_el2, x0
+.*: d53c2760 mrs x0, tcr2mask_el2
+.*: d51d2760 msr tcr2mask_el12, x0
+.*: d53d2760 mrs x0, tcr2mask_el12
+.*: d51827c0 msr tcralias_el1, x0
+.*: d53827c0 mrs x0, tcralias_el1
+.*: d51827e0 msr tcr2alias_el1, x0
+.*: d53827e0 mrs x0, tcr2alias_el1
+.*: d5181420 msr actlrmask_el1, x0
+.*: d5381420 mrs x0, actlrmask_el1
+.*: d51c1420 msr actlrmask_el2, x0
+.*: d53c1420 mrs x0, actlrmask_el2
+.*: d51d1420 msr actlrmask_el12, x0
+.*: d53d1420 mrs x0, actlrmask_el12
+.*: d51814a0 msr actlralias_el1, x0
+.*: d53814a0 mrs x0, actlralias_el1
+
diff --git a/gas/testsuite/gas/aarch64/sysreg/srmask.s b/gas/testsuite/gas/aarch64/sysreg/srmask.s
new file mode 100644
index 00000000000..a15ae417863
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/srmask.s
@@ -0,0 +1,26 @@
+.include "sysreg-test-utils.inc"
+
+ rw_sys_reg sctlrmask_el1
+ rw_sys_reg sctlrmask_el2
+ rw_sys_reg sctlrmask_el12
+ rw_sys_reg cpacrmask_el1
+ rw_sys_reg cptrmask_el2
+ rw_sys_reg cpacrmask_el12
+ rw_sys_reg sctlr2mask_el1
+ rw_sys_reg sctlr2mask_el2
+ rw_sys_reg sctlr2mask_el12
+ rw_sys_reg cpacralias_el1
+ rw_sys_reg sctlralias_el1
+ rw_sys_reg sctlr2alias_el1
+ rw_sys_reg tcrmask_el1
+ rw_sys_reg tcrmask_el2
+ rw_sys_reg tcrmask_el12
+ rw_sys_reg tcr2mask_el1
+ rw_sys_reg tcr2mask_el2
+ rw_sys_reg tcr2mask_el12
+ rw_sys_reg tcralias_el1
+ rw_sys_reg tcr2alias_el1
+ rw_sys_reg actlrmask_el1
+ rw_sys_reg actlrmask_el2
+ rw_sys_reg actlrmask_el12
+ rw_sys_reg actlralias_el1
diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 4577b96819c..888e7667e6c 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -40,6 +40,10 @@
SYSREG ("actlr_el1", CPENC (3,0,1,0,1), 0, AARCH64_NO_FEATURES)
SYSREG ("actlr_el2", CPENC (3,4,1,0,1), 0, AARCH64_NO_FEATURES)
SYSREG ("actlr_el3", CPENC (3,6,1,0,1), 0, AARCH64_NO_FEATURES)
+ SYSREG ("actlralias_el1", CPENC (3,0,1,4,5), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("actlrmask_el1", CPENC (3,0,1,4,1), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("actlrmask_el12", CPENC (3,5,1,4,1), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("actlrmask_el2", CPENC (3,4,1,4,1), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("afsr0_el1", CPENC (3,0,5,1,0), 0, AARCH64_NO_FEATURES)
SYSREG ("afsr0_el12", CPENC (3,5,5,1,0), 0, AARCH64_FEATURE (V8_1A))
SYSREG ("afsr0_el2", CPENC (3,4,5,1,0), 0, AARCH64_NO_FEATURES)
@@ -299,8 +303,12 @@
SYSREG ("contextidr_el2", CPENC (3,4,13,0,1), 0, AARCH64_FEATURE (V8_1A))
SYSREG ("cpacr_el1", CPENC (3,0,1,0,2), 0, AARCH64_NO_FEATURES)
SYSREG ("cpacr_el12", CPENC (3,5,1,0,2), 0, AARCH64_FEATURE (V8_1A))
+ SYSREG ("cpacralias_el1", CPENC (3,0,1,4,4), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("cpacrmask_el1", CPENC (3,0,1,4,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("cpacrmask_el12", CPENC (3,5,1,4,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("cptr_el2", CPENC (3,4,1,1,2), 0, AARCH64_NO_FEATURES)
SYSREG ("cptr_el3", CPENC (3,6,1,1,2), 0, AARCH64_NO_FEATURES)
+ SYSREG ("cptrmask_el2", CPENC (3,4,1,4,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("csrcr_el0", CPENC (2,3,8,0,0), 0, AARCH64_NO_FEATURES)
SYSREG ("csrcr_el1", CPENC (2,0,8,0,0), 0, AARCH64_NO_FEATURES)
SYSREG ("csrcr_el12", CPENC (2,5,8,0,0), 0, AARCH64_NO_FEATURES)
@@ -871,6 +879,14 @@
SYSREG ("sctlr2_el12", CPENC (3,5,1,0,3), 0, AARCH64_FEATURE (SCTLR2))
SYSREG ("sctlr2_el2", CPENC (3,4,1,0,3), 0, AARCH64_FEATURE (SCTLR2))
SYSREG ("sctlr2_el3", CPENC (3,6,1,0,3), 0, AARCH64_FEATURE (SCTLR2))
+ SYSREG ("sctlr2alias_el1", CPENC (3,0,1,4,7), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlr2mask_el1", CPENC (3,0,1,4,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlr2mask_el12", CPENC (3,5,1,4,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlr2mask_el2", CPENC (3,4,1,4,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlralias_el1", CPENC (3,0,1,4,6), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlrmask_el1", CPENC (3,0,1,4,0), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlrmask_el12", CPENC (3,5,1,4,0), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("sctlrmask_el2", CPENC (3,4,1,4,0), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("scxtnum_el0", CPENC (3,3,13,0,7), 0, AARCH64_FEATURE (SCXTNUM))
SYSREG ("scxtnum_el1", CPENC (3,0,13,0,7), 0, AARCH64_FEATURE (SCXTNUM))
SYSREG ("scxtnum_el12", CPENC (3,5,13,0,7), 0, AARCH64_FEATURE (SCXTNUM))
@@ -993,6 +1009,14 @@
SYSREG ("tcr2_el1", CPENC (3,0,2,0,3), 0, AARCH64_FEATURE (TCR2))
SYSREG ("tcr2_el12", CPENC (3,5,2,0,3), 0, AARCH64_FEATURE (TCR2))
SYSREG ("tcr2_el2", CPENC (3,4,2,0,3), 0, AARCH64_FEATURE (TCR2))
+ SYSREG ("tcr2alias_el1", CPENC (3,0,2,7,7), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcr2mask_el1", CPENC (3,0,2,7,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcr2mask_el12", CPENC (3,5,2,7,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcr2mask_el2", CPENC (3,4,2,7,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcralias_el1", CPENC (3,0,2,7,6), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcrmask_el1", CPENC (3,0,2,7,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcrmask_el12", CPENC (3,5,2,7,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("tcrmask_el2", CPENC (3,4,2,7,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("teecr32_el1", CPENC (2,2,0,0,0), 0, AARCH64_NO_FEATURES)
SYSREG ("teehbr32_el1", CPENC (2,2,1,0,0), 0, AARCH64_NO_FEATURES)
SYSREG ("tfsr_el1", CPENC (3,0,5,6,0), 0, AARCH64_FEATURE (MEMTAG))
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