[binutils-gdb] RISC-V: Add support for Smcdeleg and Ssccfg extensions.
Nelson Chu
nelsonc1225@sourceware.org
Thu May 22 02:03:27 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=575d205019105ad839fd5f93faf0f714ba640eec
commit 575d205019105ad839fd5f93faf0f714ba640eec
Author: Jiawei <jiawei@iscas.ac.cn>
Date: Wed May 21 21:06:09 2025 +0800
RISC-V: Add support for Smcdeleg and Ssccfg extensions.
This patch rebases the original patch from Nelson's implement[1].
Added new extension Smcdeleg and Ssccfg with a new CSR, scountinhibit.[2]
Co-Authored-By: Nelson Chu <nelson@rivosinc.com>
Co-Authored-By: Jiawei Chen <jiawei@iscas.ac.cn>
[1] https://patchwork.sourceware.org/project/binutils/patch/20240620045359.47513-1-nelson@rivosinc.com/
[2] https://github.com/riscvarchive/riscv-smcdeleg-ssccfg/releases/tag/v1.0.0
bfd/ChangeLog:
* elfxx-riscv.c: New extensions.
gas/ChangeLog:
* NEWS: Mention new extensions.
* config/tc-riscv.c (enum riscv_csr_class): New CSR class.
(riscv_csr_address): Add support for Ssccfg.
* testsuite/gas/riscv/csr-version-1p10.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p10.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p11.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p11.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p12.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p12.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p13.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p13.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr.s: New Ssccfg CSR.
* testsuite/gas/riscv/imply.d: New imply check.
* testsuite/gas/riscv/imply.s: New implies.
* testsuite/gas/riscv/march-help.l: New helping info.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_SCOUNTINHIBIT): New CSR address.
(DECLARE_CSR): Add Ssccfg CSR.
Diff:
---
bfd/elfxx-riscv.c | 4 ++++
gas/NEWS | 2 +-
gas/config/tc-riscv.c | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p10.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p10.l | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p11.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p11.l | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p12.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p12.l | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p13.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p13.l | 4 ++++
gas/testsuite/gas/riscv/csr.s | 3 +++
gas/testsuite/gas/riscv/imply.d | 2 ++
gas/testsuite/gas/riscv/imply.s | 2 ++
gas/testsuite/gas/riscv/march-help.l | 2 ++
include/opcode/riscv-opc.h | 4 ++++
16 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 007eedb3b23..bcb8de49bd3 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1283,6 +1283,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"zvks", "+zvksed,+zvksh,+zvkb,+zvkt", check_implicit_always},
{"smaia", "+ssaia", check_implicit_always},
+ {"smcdeleg", "+ssccfg", check_implicit_always},
{"smcsrind", "+sscsrind", check_implicit_always},
{"smcntrpmf", "+zicsr", check_implicit_always},
{"smctr", "+zicsr", check_implicit_always},
@@ -1293,6 +1294,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"smmpm", "+zicsr", check_implicit_always},
{"ssaia", "+zicsr", check_implicit_always},
+ {"ssccfg", "+sscsrind", check_implicit_always},
{"sscsrind", "+zicsr", check_implicit_always},
{"sscofpmf", "+zicsr", check_implicit_always},
{"sscounterenw", "+zicsr", check_implicit_always},
@@ -1481,6 +1483,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{"shvstvala", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"shvstvecd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"smcdeleg", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smcsrind", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smcntrpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smctr", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
@@ -1489,6 +1492,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smdbltrp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"ssccfg", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssccptr", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sscsrind", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
diff --git a/gas/NEWS b/gas/NEWS
index 42c3329d83e..f28a971736e 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -12,7 +12,7 @@
* Add support for RISC-V standard extensions:
ssqosid v1.0, ssnpm v1.0, smnpm v1.0, smmpm v1.0, sspm v1.0, supm v1.0,
- sha v1.0, zce v1.0.
+ sha v1.0, zce v1.0, smcdeleg v1.0, ssccfg v1.0.
* Add support for RISC-V vendor extensions:
T-Head: xtheadvdot v1.0.
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index a35288e55cb..737f31ab401 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -93,6 +93,7 @@ enum riscv_csr_class
CSR_CLASS_SSAIA_AND_H_32, /* Ssaia with H, rv32 only */
CSR_CLASS_SSAIA_OR_SSCSRIND, /* Ssaia/Smcsrind */
CSR_CLASS_SSAIA_OR_SSCSRIND_AND_H, /* Ssaia/Smcsrind with H */
+ CSR_CLASS_SSCCFG, /* Ssccfg */
CSR_CLASS_SSCSRIND, /* Sscsrind */
CSR_CLASS_SSCSRIND_AND_H, /* Sscsrind with H */
CSR_CLASS_SSSTATEEN, /* S[ms]stateen only */
@@ -1118,6 +1119,9 @@ riscv_csr_address (const char *csr_name,
is_h_required = (csr_class == CSR_CLASS_SSAIA_OR_SSCSRIND_AND_H);
extension = "ssaia or sscsrind";
break;
+ case CSR_CLASS_SSCCFG:
+ extension = "ssccfg";
+ break;
case CSR_CLASS_SSCSRIND:
case CSR_CLASS_SSCSRIND_AND_H:
is_h_required = (csr_class == CSR_CLASS_SSCSRIND_AND_H);
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
index ba2fa9e5638..f05b3b55585 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -739,6 +739,8 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+21459073[ ]+csrw[ ]+vsieh,a1
[ ]+[0-9a-f]+:[ ]+25402573[ ]+csrr[ ]+a0,vsiph
[ ]+[0-9a-f]+:[ ]+25459073[ ]+csrw[ ]+vsiph,a1
+[ ]+[0-9a-f]+:[ ]+12002573[ ]+csrr[ ]+a0,scountinhibit
+[ ]+[0-9a-f]+:[ ]+12059073[ ]+csrw[ ]+scountinhibit,a1
[ ]+[0-9a-f]+:[ ]+01102573[ ]+csrr[ ]+a0,ssp
[ ]+[0-9a-f]+:[ ]+01159073[ ]+csrw[ ]+ssp,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
index 0f8e0ece25f..4b6f57389ee 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -1301,6 +1301,10 @@
.*Info: macro .*
.*Warning: invalid CSR `vsiph', needs `ssaia' extension
.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
index ed848981d3f..f2f8af9046e 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -739,6 +739,8 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+21459073[ ]+csrw[ ]+vsieh,a1
[ ]+[0-9a-f]+:[ ]+25402573[ ]+csrr[ ]+a0,vsiph
[ ]+[0-9a-f]+:[ ]+25459073[ ]+csrw[ ]+vsiph,a1
+[ ]+[0-9a-f]+:[ ]+12002573[ ]+csrr[ ]+a0,scountinhibit
+[ ]+[0-9a-f]+:[ ]+12059073[ ]+csrw[ ]+scountinhibit,a1
[ ]+[0-9a-f]+:[ ]+01102573[ ]+csrr[ ]+a0,ssp
[ ]+[0-9a-f]+:[ ]+01159073[ ]+csrw[ ]+ssp,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
index 69e6c5318df..eb2322b672c 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -1297,6 +1297,10 @@
.*Info: macro .*
.*Warning: invalid CSR `vsiph', needs `ssaia' extension
.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
index dfbb243e430..d9d352923bc 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -739,6 +739,8 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+21459073[ ]+csrw[ ]+vsieh,a1
[ ]+[0-9a-f]+:[ ]+25402573[ ]+csrr[ ]+a0,vsiph
[ ]+[0-9a-f]+:[ ]+25459073[ ]+csrw[ ]+vsiph,a1
+[ ]+[0-9a-f]+:[ ]+12002573[ ]+csrr[ ]+a0,scountinhibit
+[ ]+[0-9a-f]+:[ ]+12059073[ ]+csrw[ ]+scountinhibit,a1
[ ]+[0-9a-f]+:[ ]+01102573[ ]+csrr[ ]+a0,ssp
[ ]+[0-9a-f]+:[ ]+01159073[ ]+csrw[ ]+ssp,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
index 721484130ff..13c63e196b5 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -1021,6 +1021,10 @@
.*Info: macro .*
.*Warning: invalid CSR `vsiph', needs `ssaia' extension
.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p13.d b/gas/testsuite/gas/riscv/csr-version-1p13.d
index 13090304347..5d3cef8c4da 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p13.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p13.d
@@ -739,6 +739,8 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+21459073[ ]+csrw[ ]+vsieh,a1
[ ]+[0-9a-f]+:[ ]+25402573[ ]+csrr[ ]+a0,vsiph
[ ]+[0-9a-f]+:[ ]+25459073[ ]+csrw[ ]+vsiph,a1
+[ ]+[0-9a-f]+:[ ]+12002573[ ]+csrr[ ]+a0,scountinhibit
+[ ]+[0-9a-f]+:[ ]+12059073[ ]+csrw[ ]+scountinhibit,a1
[ ]+[0-9a-f]+:[ ]+01102573[ ]+csrr[ ]+a0,ssp
[ ]+[0-9a-f]+:[ ]+01159073[ ]+csrw[ ]+ssp,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
diff --git a/gas/testsuite/gas/riscv/csr-version-1p13.l b/gas/testsuite/gas/riscv/csr-version-1p13.l
index 42c8523a5ee..a7055817996 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p13.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p13.l
@@ -1017,6 +1017,10 @@
.*Info: macro .*
.*Warning: invalid CSR `vsiph', needs `ssaia' extension
.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
.*Info: macro .*
.*Warning: invalid CSR `ssp', needs `zicfiss' extension
diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
index f4c215dd559..79206444fa3 100644
--- a/gas/testsuite/gas/riscv/csr.s
+++ b/gas/testsuite/gas/riscv/csr.s
@@ -418,6 +418,9 @@
csr vsieh
csr vsiph
+ # Ssccfg or Smcdeleg
+ csr scountinhibit
+
# Zicfiss
csr ssp
diff --git a/gas/testsuite/gas/riscv/imply.d b/gas/testsuite/gas/riscv/imply.d
index aa9c1c0458f..988524fdffc 100644
--- a/gas/testsuite/gas/riscv/imply.d
+++ b/gas/testsuite/gas/riscv/imply.d
@@ -85,12 +85,14 @@ SYMBOL TABLE:
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvbc1p0_zvkb1p0_zvks1p0_zvksc1p0_zvksed1p0_zvksh1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvkb1p0_zvks1p0_zvksed1p0_zvksh1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smaia1p0_ssaia1p0
+[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smcdeleg1p0_ssccfg1p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smcsrind1p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smcntrpmf1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smstateen1p0_ssstateen1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smepmp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smdbltrp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssaia1p0
+[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssccfg1p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscofpmf1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscounterenw1p0
diff --git a/gas/testsuite/gas/riscv/imply.s b/gas/testsuite/gas/riscv/imply.s
index be3c420a9da..de1f0dfc24d 100644
--- a/gas/testsuite/gas/riscv/imply.s
+++ b/gas/testsuite/gas/riscv/imply.s
@@ -99,6 +99,7 @@ imply zvksc
imply zvks
imply smaia
+imply smcdeleg
imply smcsrind
imply smcntrpmf
imply smstateen
@@ -106,6 +107,7 @@ imply smepmp
imply smdbltrp
imply ssaia
+imply ssccfg
imply sscsrind
imply sscofpmf
imply sscounterenw
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index 25b78eb1177..b4908e5885f 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -118,6 +118,7 @@ All available -march extensions for RISC-V:
shvstvala 1.0
shvstvecd 1.0
smaia 1.0
+ smcdeleg 1.0
smcsrind 1.0
smcntrpmf 1.0
smctr 1.0
@@ -126,6 +127,7 @@ All available -march extensions for RISC-V:
smstateen 1.0
smdbltrp 1.0
ssaia 1.0
+ ssccfg 1.0
ssccptr 1.0
sscsrind 1.0
sscofpmf 1.0
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index c20cb20c5c1..1c649628390 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -4207,6 +4207,8 @@
#define CSR_HVIPRIO2H 0x657
#define CSR_VSIEH 0x214
#define CSR_VSIPH 0x254
+/* Ssccfg CSR address. */
+#define CSR_SCOUNTINHIBIT 0x120
/* Sscsrind extension */
#define CSR_SIREG2 0x152
#define CSR_SIREG3 0x153
@@ -5351,6 +5353,8 @@ DECLARE_CSR(hviprio1h, CSR_HVIPRIO1H, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_
DECLARE_CSR(hviprio2h, CSR_HVIPRIO2H, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vsieh, CSR_VSIEH, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vsiph, CSR_VSIPH, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+/* Ssccfg CSR. */
+DECLARE_CSR(scountinhibit, CSR_SCOUNTINHIBIT, CSR_CLASS_SSCCFG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
/* Sscsrind extension */
DECLARE_CSR(sireg2, CSR_SIREG2, CSR_CLASS_SSCSRIND, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(sireg3, CSR_SIREG3, CSR_CLASS_SSCSRIND, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
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