[binutils-gdb] aarch64: Mark clearbhb as a pseudo instruction

Alice Carlotti acarlotti@sourceware.org
Fri May 9 19:40:02 GMT 2025


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f20bd95af0a27aa40ee35db9459230c46236608b

commit f20bd95af0a27aa40ee35db9459230c46236608b
Author: Alice Carlotti <alice.carlotti@arm.com>
Date:   Thu Apr 17 20:42:32 2025 +0100

    aarch64: Mark clearbhb as a pseudo instruction
    
    This was an early name for the clrbhb hint instruction.  Some software
    was written with the old name before it was renamed, so we support it
    for assembly but should never use it in disassembly.
    
    This patch has no functional change, because we already pick (by
    default) the last matching alias in the opcode table, and clrbhb is
    listed later than clearbhb.

Diff:
---
 opcodes/aarch64-tbl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 28230aa08f2..ae268b0778e 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -4607,7 +4607,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
   CORE_INSN ("esb", 0xd503221f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
   CORE_INSN ("psb", 0xd503223f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
   CORE_INSN ("tsb", 0xd503225f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
-  CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
+  CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS | F_PSEUDO),
   CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
   CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
   XS_INSN ("dsb", 0xd503323f, 0xfffff3ff, ic_system, OP1 (BARRIER_DSB_NXS), {}, F_HAS_ALIAS),


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