https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=92f7d4ddde6de117ecbd677dcfa87ac4f7e9f43b
commit 92f7d4ddde6de117ecbd677dcfa87ac4f7e9f43b
Author: Alice Carlotti <alice.carlotti@arm.com>
Date: Mon Apr 7 20:21:07 2025 +0100
aarch64: Eliminate AARCH64_OPND_SVE_ADDR_R
Adjust parsing for AARCH64_OPND_SVE_ADDR_RR{_LSL*} operands to accept
implicit XZR offsets. Add new AARCH64_OPND_SVE_ADDR_RM{_LSL*} operands
to support instructions where an XZR offset is allowed but must be
specified explicitly. This allows the removal of the duplicate opcode
table entries using AARCH64_OPND_SVE_ADDR_R.
Diff:
---
gas/config/tc-aarch64.c | 39 +-
include/opcode/aarch64.h | 16 +-
opcodes/aarch64-asm-2.c | 270 +--
opcodes/aarch64-dis-2.c | 4100 +++++++++++++++++++++++-----------------------
opcodes/aarch64-opc-2.c | 6 +-
opcodes/aarch64-opc.c | 12 +-
opcodes/aarch64-tbl.h | 168 +-
7 files changed, 2286 insertions(+), 2325 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 10cbf00a8af..32940addb02 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7806,8 +7806,12 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->addr.offset.imm = inst.reloc.exp.X_add_number;
break;
- case AARCH64_OPND_SVE_ADDR_R:
- /* [<Xn|SP>{, <R><m>}]
+ case AARCH64_OPND_SVE_ADDR_RR:
+ case AARCH64_OPND_SVE_ADDR_RR_LSL1:
+ case AARCH64_OPND_SVE_ADDR_RR_LSL2:
+ case AARCH64_OPND_SVE_ADDR_RR_LSL3:
+ case AARCH64_OPND_SVE_ADDR_RR_LSL4:
+ /* [<Xn|SP>{, <R><m>{, lsl #<amount>}}]
but recognizing SVE registers. */
po_misc_or_fail (parse_sve_address (&str, info, &base_qualifier,
&offset_qualifier));
@@ -7816,15 +7820,20 @@ parse_operands (char *str, const aarch64_opcode *opcode)
offset_qualifier = AARCH64_OPND_QLF_X;
info->addr.offset.is_reg = 1;
info->addr.offset.regno = 31;
- }
- else
- {
- /* This operand is used for different shift types, so we have to
- reject explicit offsets. */
- set_syntax_error (_("invalid addressing mode"));
- goto failure;
- }
+ /* We set the shifter amount here, but let regoff_addr assign the
+ shifter kind. */
+ if (operands[i] == AARCH64_OPND_SVE_ADDR_RR)
+ info->shifter.amount = 0;
+ else if (operands[i] == AARCH64_OPND_SVE_ADDR_RR_LSL1)
+ info->shifter.amount = 1;
+ else if (operands[i] == AARCH64_OPND_SVE_ADDR_RR_LSL2)
+ info->shifter.amount = 2;
+ else if (operands[i] == AARCH64_OPND_SVE_ADDR_RR_LSL3)
+ info->shifter.amount = 3;
+ else
+ info->shifter.amount = 4;
+ }
if (base_qualifier != AARCH64_OPND_QLF_X
|| offset_qualifier != AARCH64_OPND_QLF_X)
{
@@ -7833,11 +7842,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
}
goto regoff_addr;
- case AARCH64_OPND_SVE_ADDR_RR:
- case AARCH64_OPND_SVE_ADDR_RR_LSL1:
- case AARCH64_OPND_SVE_ADDR_RR_LSL2:
- case AARCH64_OPND_SVE_ADDR_RR_LSL3:
- case AARCH64_OPND_SVE_ADDR_RR_LSL4:
+ case AARCH64_OPND_SVE_ADDR_RM:
+ case AARCH64_OPND_SVE_ADDR_RM_LSL1:
+ case AARCH64_OPND_SVE_ADDR_RM_LSL2:
+ case AARCH64_OPND_SVE_ADDR_RM_LSL3:
+ case AARCH64_OPND_SVE_ADDR_RM_LSL4:
case AARCH64_OPND_SVE_ADDR_RX:
case AARCH64_OPND_SVE_ADDR_RX_LSL1:
case AARCH64_OPND_SVE_ADDR_RX_LSL2:
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index dfe3f05820a..df90bb76e56 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -704,12 +704,16 @@ enum aarch64_opnd
AARCH64_OPND_SVE_ADDR_RI_U6x2, /* SVE [<Xn|SP>, #<uimm6>*2]. */
AARCH64_OPND_SVE_ADDR_RI_U6x4, /* SVE [<Xn|SP>, #<uimm6>*4]. */
AARCH64_OPND_SVE_ADDR_RI_U6x8, /* SVE [<Xn|SP>, #<uimm6>*8]. */
- AARCH64_OPND_SVE_ADDR_R, /* SVE [<Xn|SP>]. */
- AARCH64_OPND_SVE_ADDR_RR, /* SVE [<Xn|SP>, <Xm|XZR>]. */
- AARCH64_OPND_SVE_ADDR_RR_LSL1, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #1]. */
- AARCH64_OPND_SVE_ADDR_RR_LSL2, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #2]. */
- AARCH64_OPND_SVE_ADDR_RR_LSL3, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #3]. */
- AARCH64_OPND_SVE_ADDR_RR_LSL4, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #4]. */
+ AARCH64_OPND_SVE_ADDR_RR, /* SVE [<Xn|SP>{, <Xm|XZR>}]. */
+ AARCH64_OPND_SVE_ADDR_RR_LSL1, /* SVE [<Xn|SP>{, <Xm|XZR>, LSL #1}]. */
+ AARCH64_OPND_SVE_ADDR_RR_LSL2, /* SVE [<Xn|SP>{, <Xm|XZR>, LSL #2}]. */
+ AARCH64_OPND_SVE_ADDR_RR_LSL3, /* SVE [<Xn|SP>{, <Xm|XZR>, LSL #3}]. */
+ AARCH64_OPND_SVE_ADDR_RR_LSL4, /* SVE [<Xn|SP>{, <Xm|XZR>, LSL #4}]. */
+ AARCH64_OPND_SVE_ADDR_RM, /* SVE [<Xn|SP>, <Xm|XZR>]. */
+ AARCH64_OPND_SVE_ADDR_RM_LSL1, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #1]. */
+ AARCH64_OPND_SVE_ADDR_RM_LSL2, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #2]. */
+ AARCH64_OPND_SVE_ADDR_RM_LSL3, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #3]. */
+ AARCH64_OPND_SVE_ADDR_RM_LSL4, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #4]. */
AARCH64_OPND_SVE_ADDR_RX, /* SVE [<Xn|SP>, <Xm>]. */
AARCH64_OPND_SVE_ADDR_RX_LSL1, /* SVE [<Xn|SP>, <Xm>, LSL #1]. */
AARCH64_OPND_SVE_ADDR_RX_LSL2, /* SVE [<Xn|SP>, <Xm>, LSL #2]. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 799825c25cb..4e1f1179946 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -426,7 +426,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1218: /* movz */
value = 1218; /* --> movz. */
break;
- case 3216: /* clrbhb */
+ case 3190: /* clrbhb */
case 1299: /* autibsp */
case 1298: /* autibz */
case 1297: /* autiasp */
@@ -465,7 +465,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1254: /* dsb */
value = 1254; /* --> dsb. */
break;
- case 3217: /* trcit */
+ case 3191: /* trcit */
case 1285: /* brb */
case 1284: /* cosp */
case 1283: /* cpp */
@@ -488,7 +488,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1280: /* wfit */
value = 1280; /* --> wfit. */
break;
- case 2101: /* bic */
+ case 2085: /* bic */
case 1348: /* and */
value = 1348; /* --> and. */
break;
@@ -500,19 +500,19 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1351: /* ands */
value = 1351; /* --> ands. */
break;
- case 2102: /* cmple */
+ case 2086: /* cmple */
case 1386: /* cmpge */
value = 1386; /* --> cmpge. */
break;
- case 2105: /* cmplt */
+ case 2089: /* cmplt */
case 1389: /* cmpgt */
value = 1389; /* --> cmpgt. */
break;
- case 2103: /* cmplo */
+ case 2087: /* cmplo */
case 1391: /* cmphi */
value = 1391; /* --> cmphi. */
break;
- case 2104: /* cmpls */
+ case 2088: /* cmpls */
case 1394: /* cmphs */
value = 1394; /* --> cmphs. */
break;
@@ -524,7 +524,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1417: /* cpy */
value = 1417; /* --> cpy. */
break;
- case 2112: /* fmov */
+ case 2096: /* fmov */
case 1333: /* mov */
case 1418: /* cpy */
value = 1418; /* --> cpy. */
@@ -538,7 +538,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1431: /* dup */
value = 1431; /* --> dup. */
break;
- case 2111: /* fmov */
+ case 2095: /* fmov */
case 1327: /* mov */
case 1432: /* dup */
value = 1432; /* --> dup. */
@@ -547,7 +547,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1433: /* dupm */
value = 1433; /* --> dupm. */
break;
- case 2106: /* eon */
+ case 2090: /* eon */
case 1435: /* eor */
value = 1435; /* --> eor. */
break;
@@ -559,19 +559,19 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1438: /* eors */
value = 1438; /* --> eors. */
break;
- case 2107: /* facle */
+ case 2091: /* facle */
case 1443: /* facge */
value = 1443; /* --> facge. */
break;
- case 2108: /* faclt */
+ case 2092: /* faclt */
case 1444: /* facgt */
value = 1444; /* --> facgt. */
break;
- case 2109: /* fcmle */
+ case 2093: /* fcmle */
case 1457: /* fcmge */
value = 1457; /* --> fcmge. */
break;
- case 2110: /* fcmlt */
+ case 2094: /* fcmlt */
case 1459: /* fcmgt */
value = 1459; /* --> fcmgt. */
break;
@@ -584,29 +584,29 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
value = 1488; /* --> fdup. */
break;
case 1320: /* mov */
- case 1820: /* orr */
- value = 1820; /* --> orr. */
+ case 1804: /* orr */
+ value = 1804; /* --> orr. */
break;
- case 2113: /* orn */
- case 1821: /* orr */
- value = 1821; /* --> orr. */
+ case 2097: /* orn */
+ case 1805: /* orr */
+ value = 1805; /* --> orr. */
break;
case 1324: /* mov */
case 1323: /* mov */
- case 1823: /* orr */
- value = 1823; /* --> orr. */
+ case 1807: /* orr */
+ value = 1807; /* --> orr. */
break;
case 1334: /* movs */
- case 1824: /* orrs */
- value = 1824; /* --> orrs. */
+ case 1808: /* orrs */
+ value = 1808; /* --> orrs. */
break;
case 1329: /* mov */
- case 1887: /* sel */
- value = 1887; /* --> sel. */
+ case 1871: /* sel */
+ value = 1871; /* --> sel. */
break;
case 1332: /* mov */
- case 1888: /* sel */
- value = 1888; /* --> sel. */
+ case 1872: /* sel */
+ value = 1872; /* --> sel. */
break;
default: return NULL;
}
@@ -654,10 +654,6 @@ aarch64_insert_operand (const aarch64_operand *self,
case 123:
case 124:
case 125:
- case 184:
- case 185:
- case 186:
- case 187:
case 188:
case 189:
case 190:
@@ -668,33 +664,37 @@ aarch64_insert_operand (const aarch64_operand *self,
case 195:
case 196:
case 197:
- case 213:
- case 214:
- case 215:
- case 216:
- case 226:
- case 227:
- case 228:
- case 229:
+ case 198:
+ case 199:
+ case 200:
+ case 201:
+ case 217:
+ case 218:
+ case 219:
+ case 220:
case 230:
- case 241:
+ case 231:
+ case 232:
+ case 233:
+ case 234:
case 245:
case 249:
- case 257:
- case 258:
- case 259:
- case 266:
- case 267:
- case 268:
- case 269:
- case 303:
+ case 253:
+ case 261:
+ case 262:
+ case 263:
+ case 270:
+ case 271:
+ case 272:
+ case 273:
case 307:
+ case 311:
return aarch64_ins_regno (self, info, code, inst, errors);
case 6:
case 119:
case 120:
- case 313:
- case 316:
+ case 317:
+ case 320:
return aarch64_ins_none (self, info, code, inst, errors);
case 17:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -709,20 +709,16 @@ aarch64_insert_operand (const aarch64_operand *self,
case 37:
case 38:
case 39:
- case 318:
+ case 322:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 40:
case 41:
case 42:
- case 231:
- case 232:
case 235:
- case 270:
- case 271:
- case 286:
- case 287:
- case 288:
- case 289:
+ case 236:
+ case 239:
+ case 274:
+ case 275:
case 290:
case 291:
case 292:
@@ -736,12 +732,16 @@ aarch64_insert_operand (const aarch64_operand *self,
case 300:
case 301:
case 302:
+ case 303:
case 304:
case 305:
case 306:
case 308:
case 309:
case 310:
+ case 312:
+ case 313:
+ case 314:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 43:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -780,25 +780,25 @@ aarch64_insert_operand (const aarch64_operand *self,
case 92:
case 118:
case 122:
- case 181:
- case 183:
- case 204:
- case 205:
- case 206:
- case 207:
+ case 185:
+ case 187:
case 208:
case 209:
case 210:
case 211:
case 212:
- case 272:
- case 311:
- case 312:
- case 314:
+ case 213:
+ case 214:
+ case 215:
+ case 216:
+ case 276:
case 315:
- case 317:
- case 322:
- case 323:
+ case 316:
+ case 318:
+ case 319:
+ case 321:
+ case 326:
+ case 327:
return aarch64_ins_imm (self, info, code, inst, errors);
case 52:
case 53:
@@ -808,10 +808,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 56:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 60:
- case 171:
+ case 175:
return aarch64_ins_fpimm (self, info, code, inst, errors);
case 78:
- case 179:
+ case 183:
return aarch64_ins_limm (self, info, code, inst, errors);
case 79:
return aarch64_ins_aimm (self, info, code, inst, errors);
@@ -821,11 +821,11 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_fbits (self, info, code, inst, errors);
case 83:
case 84:
- case 176:
+ case 180:
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 85:
- case 175:
- case 177:
+ case 179:
+ case 181:
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 86:
case 87:
@@ -903,124 +903,128 @@ aarch64_insert_operand (const aarch64_operand *self,
case 151:
case 152:
case 153:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 154:
case 155:
case 156:
case 157:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 158:
case 159:
case 160:
case 161:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 162:
case 163:
case 164:
case 165:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 166:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 167:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 168:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 169:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 170:
- return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
+ case 171:
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 172:
- return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 173:
- return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
case 174:
- return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
+ return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ case 176:
+ return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
+ case 177:
+ return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
case 178:
+ return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
+ case 182:
return aarch64_ins_inv_limm (self, info, code, inst, errors);
- case 180:
+ case 184:
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
- case 182:
+ case 186:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 198:
- case 199:
- case 200:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
- case 201:
case 202:
case 203:
- case 285:
+ case 204:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
+ case 205:
+ case 206:
+ case 207:
+ case 289:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 217:
- case 218:
- case 219:
- case 220:
- return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 221:
case 222:
case 223:
case 224:
- return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 225:
+ case 226:
+ case 227:
+ case 228:
+ return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
+ case 229:
return aarch64_ins_sme_za_tile_to_vec (self, info, code, inst, errors);
- case 233:
- case 234:
- case 236:
case 237:
case 238:
- case 239:
case 240:
- return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 241:
case 242:
case 243:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 244:
+ return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
case 246:
- case 265:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 247:
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
case 248:
case 250:
+ case 269:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 251:
case 252:
- case 253:
case 254:
- case 264:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 255:
case 256:
- return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
+ case 257:
+ case 258:
+ case 268:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
+ case 259:
case 260:
- case 262:
- case 273:
+ return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
+ case 264:
+ case 266:
+ case 277:
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
- case 261:
- case 263:
+ case 265:
+ case 267:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 274:
- case 275:
- case 276:
- case 277:
case 278:
case 279:
case 280:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 281:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 282:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 283:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
case 284:
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
+ case 285:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 286:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 287:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 288:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 319:
- case 320:
- case 321:
- return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
+ case 323:
case 324:
case 325:
- case 326:
- case 327:
- return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
+ return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
case 328:
+ case 329:
+ case 330:
+ case 331:
+ return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
+ case 332:
return aarch64_ins_rcpc3_addr_offset (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index eb141137877..2e167946af0 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -62,7 +62,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx00xxx
fmopa. */
- return 2413;
+ return 2397;
}
else
{
@@ -70,7 +70,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx10xxx
fmops. */
- return 2416;
+ return 2400;
}
}
else
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2527;
+ return 2501;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2528;
+ return 2502;
}
}
}
@@ -102,7 +102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx0xxxx
fmopa. */
- return 2414;
+ return 2398;
}
else
{
@@ -110,7 +110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx1xxxx
fmops. */
- return 2417;
+ return 2401;
}
}
}
@@ -128,7 +128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx00000xxxxxxxxxxxxxxxxx
mov. */
- return 2437;
+ return 2421;
}
else
{
@@ -140,7 +140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x0010000xxxxxxxxxxxxxxxx
addha. */
- return 2405;
+ return 2389;
}
else
{
@@ -148,7 +148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x1010000xxxxxxxxxxxxxxxx
addha. */
- return 2406;
+ return 2390;
}
}
else
@@ -159,7 +159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x0010001xxxxxxxxxxxxxxxx
addva. */
- return 2409;
+ return 2393;
}
else
{
@@ -167,7 +167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x1010001xxxxxxxxxxxxxxxx
addva. */
- return 2410;
+ return 2394;
}
}
}
@@ -180,7 +180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x100xxxxxxxxxxxxxxxxx
zero. */
- return 2440;
+ return 2424;
}
else
{
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2957;
+ return 2931;
}
}
}
@@ -202,7 +202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x001xxxxxxx0xxxxxxxxx
mov. */
- return 2436;
+ return 2420;
}
else
{
@@ -216,7 +216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3348;
+ return 3322;
}
else
{
@@ -224,7 +224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3350;
+ return 3324;
}
}
else
@@ -235,7 +235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3349;
+ return 3323;
}
else
{
@@ -243,7 +243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x0010xxxxxx1xxxxxxxxx
movaz. */
- return 3351;
+ return 3325;
}
}
}
@@ -253,7 +253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x0011xxxxxx1xxxxxxxxx
movaz. */
- return 3352;
+ return 3326;
}
}
}
@@ -271,7 +271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x000101x00xxxxxxxxxxxxxx
luti4. */
- return 3488;
+ return 3462;
}
else
{
@@ -279,7 +279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x000101x10xxxxxxxxxxxxxx
luti4. */
- return 2671;
+ return 2645;
}
}
else
@@ -288,7 +288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x000101xx1xxxxxxxxxxxxxx
luti4. */
- return 2670;
+ return 2644;
}
}
else
@@ -297,7 +297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x100101xxxxxxxxxxxxxxxxx
luti4. */
- return 2669;
+ return 2643;
}
}
else
@@ -310,7 +310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx01101x00xxxxxxxxxxxxxx
luti4. */
- return 3489;
+ return 3463;
}
else
{
@@ -318,7 +318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx01101x10xxxxxxxxxxxxxx
luti4. */
- return 3345;
+ return 3319;
}
}
else
@@ -327,7 +327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx01101xx1xxxxxxxxxxxxxx
luti4. */
- return 3344;
+ return 3318;
}
}
}
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2678;
+ return 2652;
}
else
{
@@ -357,7 +357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx000xxxxxxxxx
mov. */
- return 2674;
+ return 2648;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000x011xxxxx001xxxxxxxxx
movaz. */
- return 3338;
+ return 3312;
}
else
{
@@ -377,7 +377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100x011xxxxx001xxxxxxxxx
movaz. */
- return 3340;
+ return 3314;
}
}
else
@@ -388,7 +388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x011xxxxx001xxxxxxxxx
movaz. */
- return 3339;
+ return 3313;
}
else
{
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x011xxxxx001xxxxxxxxx
movaz. */
- return 3341;
+ return 3315;
}
}
}
@@ -420,7 +420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011000xxx00xxxxxxxxxx
zero. */
- return 3353;
+ return 3327;
}
else
{
@@ -428,7 +428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011100xxx00xxxxxxxxxx
zero. */
- return 3354;
+ return 3328;
}
}
else
@@ -439,7 +439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011010xxx00xxxxxxxxxx
zero. */
- return 3356;
+ return 3330;
}
else
{
@@ -447,7 +447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011110xxx00xxxxxxxxxx
zero. */
- return 3359;
+ return 3333;
}
}
}
@@ -461,7 +461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011001xxx00xxxxxxxxxx
zero. */
- return 3355;
+ return 3329;
}
else
{
@@ -469,7 +469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011101xxx00xxxxxxxxxx
zero. */
- return 3358;
+ return 3332;
}
}
else
@@ -480,7 +480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011011xxx00xxxxxxxxxx
zero. */
- return 3357;
+ return 3331;
}
else
{
@@ -488,7 +488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000011111xxx00xxxxxxxxxx
zero. */
- return 3360;
+ return 3334;
}
}
}
@@ -501,7 +501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100011xxx0xx00xxxxxxxxxx
luti2. */
- return 2668;
+ return 2642;
}
else
{
@@ -509,7 +509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100011xxx1xx00xxxxxxxxxx
luti2. */
- return 2667;
+ return 2641;
}
}
}
@@ -525,7 +525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100000001001100xxxx00xxxxxxxxxx
movt. */
- return 2689;
+ return 2663;
}
else
{
@@ -533,7 +533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100000001001110xxxx00xxxxxxxxxx
movt. */
- return 2688;
+ return 2662;
}
}
else
@@ -542,7 +542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010011x1xxxx00xxxxxxxxxx
movt. */
- return 3490;
+ return 3464;
}
}
else
@@ -551,7 +551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110011xxxxxx00xxxxxxxxxx
luti2. */
- return 2666;
+ return 2640;
}
}
}
@@ -563,7 +563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0111xxx0xx00xxxxxxxxxx
luti2. */
- return 3343;
+ return 3317;
}
else
{
@@ -571,7 +571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0111xxx1xx00xxxxxxxxxx
luti2. */
- return 3342;
+ return 3316;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2676;
+ return 2650;
}
else
{
@@ -594,7 +594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx100xxxxxxxxx
mov. */
- return 2672;
+ return 2646;
}
else
{
@@ -602,7 +602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx101xxxxxxxxx
movaz. */
- return 3346;
+ return 3320;
}
}
}
@@ -617,7 +617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2679;
+ return 2653;
}
else
{
@@ -627,7 +627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx010xxxxxxxxx
mov. */
- return 2675;
+ return 2649;
}
else
{
@@ -639,7 +639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000xx11xxxxx011xxxxxxxxx
movaz. */
- return 3334;
+ return 3308;
}
else
{
@@ -647,7 +647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100xx11xxxxx011xxxxxxxxx
movaz. */
- return 3336;
+ return 3310;
}
}
else
@@ -658,7 +658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010xx11xxxxx011xxxxxxxxx
movaz. */
- return 3335;
+ return 3309;
}
else
{
@@ -666,7 +666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110xx11xxxxx011xxxxxxxxx
movaz. */
- return 3337;
+ return 3311;
}
}
}
@@ -680,7 +680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2677;
+ return 2651;
}
else
{
@@ -690,7 +690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx110xxxxxxxxx
mov. */
- return 2673;
+ return 2647;
}
else
{
@@ -698,7 +698,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx111xxxxxxxxx
movaz. */
- return 3347;
+ return 3321;
}
}
}
@@ -726,7 +726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2605;
+ return 2579;
}
else
{
@@ -734,7 +734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2606;
+ return 2580;
}
}
else
@@ -745,7 +745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2629;
+ return 2603;
}
else
{
@@ -753,7 +753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2630;
+ return 2604;
}
}
}
@@ -767,7 +767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2621;
+ return 2595;
}
else
{
@@ -775,7 +775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2622;
+ return 2596;
}
}
else
@@ -786,7 +786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2613;
+ return 2587;
}
else
{
@@ -794,7 +794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2614;
+ return 2588;
}
}
}
@@ -811,7 +811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2637;
+ return 2611;
}
else
{
@@ -819,7 +819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2638;
+ return 2612;
}
}
else
@@ -830,7 +830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2661;
+ return 2635;
}
else
{
@@ -838,7 +838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2662;
+ return 2636;
}
}
}
@@ -852,7 +852,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2653;
+ return 2627;
}
else
{
@@ -860,7 +860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2654;
+ return 2628;
}
}
else
@@ -871,7 +871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2645;
+ return 2619;
}
else
{
@@ -879,7 +879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2646;
+ return 2620;
}
}
}
@@ -891,7 +891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000000xxxxxxxxxxxxxxxxxxxxx
ld1b. */
- return 2441;
+ return 2425;
}
}
else
@@ -906,7 +906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx00xxx
smopa. */
- return 2420;
+ return 2404;
}
else
{
@@ -914,7 +914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2751;
+ return 2725;
}
}
else
@@ -923,7 +923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000100xxxxxxxxxxxxxxxx0xxxx
ld1w. */
- return 2443;
+ return 2427;
}
}
else
@@ -934,7 +934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx10xxx
smops. */
- return 2422;
+ return 2406;
}
else
{
@@ -942,7 +942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2752;
+ return 2726;
}
}
}
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2601;
+ return 2575;
}
else
{
@@ -973,7 +973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2602;
+ return 2576;
}
}
else
@@ -984,7 +984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2625;
+ return 2599;
}
else
{
@@ -992,7 +992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2626;
+ return 2600;
}
}
}
@@ -1006,7 +1006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2617;
+ return 2591;
}
else
{
@@ -1014,7 +1014,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2618;
+ return 2592;
}
}
else
@@ -1025,7 +1025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2609;
+ return 2583;
}
else
{
@@ -1033,7 +1033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2610;
+ return 2584;
}
}
}
@@ -1050,7 +1050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2633;
+ return 2607;
}
else
{
@@ -1058,7 +1058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2634;
+ return 2608;
}
}
else
@@ -1069,7 +1069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2657;
+ return 2631;
}
else
{
@@ -1077,7 +1077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2658;
+ return 2632;
}
}
}
@@ -1091,7 +1091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2649;
+ return 2623;
}
else
{
@@ -1099,7 +1099,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2650;
+ return 2624;
}
}
else
@@ -1110,7 +1110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2641;
+ return 2615;
}
else
{
@@ -1118,7 +1118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2642;
+ return 2616;
}
}
}
@@ -1130,7 +1130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000010xxxxxxxxxxxxxxxxxxxxx
ld1h. */
- return 2442;
+ return 2426;
}
}
else
@@ -1143,7 +1143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000110xxxxxxxxxxxxxxxx0xxxx
smopa. */
- return 2421;
+ return 2405;
}
else
{
@@ -1151,7 +1151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000110xxxxxxxxxxxxxxxx0xxxx
ld1d. */
- return 2444;
+ return 2428;
}
}
else
@@ -1160,7 +1160,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000110xxxxxxxxxxxxxxxx1xxxx
smops. */
- return 2423;
+ return 2407;
}
}
}
@@ -1186,7 +1186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2777;
+ return 2751;
}
else
{
@@ -1194,7 +1194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2778;
+ return 2752;
}
}
else
@@ -1205,7 +1205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2801;
+ return 2775;
}
else
{
@@ -1213,7 +1213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2802;
+ return 2776;
}
}
}
@@ -1227,7 +1227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2793;
+ return 2767;
}
else
{
@@ -1235,7 +1235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2794;
+ return 2768;
}
}
else
@@ -1246,7 +1246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2785;
+ return 2759;
}
else
{
@@ -1254,7 +1254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2786;
+ return 2760;
}
}
}
@@ -1271,7 +1271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2809;
+ return 2783;
}
else
{
@@ -1279,7 +1279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2810;
+ return 2784;
}
}
else
@@ -1290,7 +1290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2833;
+ return 2807;
}
else
{
@@ -1298,7 +1298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2834;
+ return 2808;
}
}
}
@@ -1312,7 +1312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2825;
+ return 2799;
}
else
{
@@ -1320,7 +1320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2826;
+ return 2800;
}
}
else
@@ -1331,7 +1331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2817;
+ return 2791;
}
else
{
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2818;
+ return 2792;
}
}
}
@@ -1351,7 +1351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000001xxxxxxxxxxxxxxxxxxxxx
st1b. */
- return 2451;
+ return 2430;
}
}
else
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000000101xxxxxxxxxxxxxxxx00xxx
fmopa. */
- return 3556;
+ return 3530;
}
else
{
@@ -1374,7 +1374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000000101xxxxxxxxxxxxxxxx01xxx
fmopa. */
- return 3555;
+ return 3529;
}
}
else
@@ -1385,7 +1385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000101xxxxxxxxxxxxxxxx0xxxx
sumopa. */
- return 2424;
+ return 2408;
}
else
{
@@ -1393,7 +1393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000101xxxxxxxxxxxxxxxx0xxxx
st1w. */
- return 2453;
+ return 2432;
}
}
}
@@ -1403,7 +1403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000101xxxxxxxxxxxxxxxx1xxxx
sumops. */
- return 2426;
+ return 2410;
}
}
}
@@ -1425,7 +1425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2773;
+ return 2747;
}
else
{
@@ -1433,7 +1433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2774;
+ return 2748;
}
}
else
@@ -1444,7 +1444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2797;
+ return 2771;
}
else
{
@@ -1452,7 +1452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2798;
+ return 2772;
}
}
}
@@ -1466,7 +1466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
[...]
[diff truncated at 100000 bytes]