[binutils-gdb/binutils-2_45-branch] This is the 2.45 release
Nick Clifton
nickc@sourceware.org
Sun Jul 27 08:56:57 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=2bc7af1ff7732451b6a7b09462a815c3284f9613
commit 2bc7af1ff7732451b6a7b09462a815c3284f9613
Author: Nick Clifton <nickc@redhat.com>
Date: Sun Jul 27 09:56:42 2025 +0100
This is the 2.45 release
Diff:
---
ChangeLog.git | 276618 ++++++++++++++++++++++++++++++++++++++
bfd/configure | 20 +-
bfd/development.sh | 4 +-
bfd/po/bfd.pot | 158 +-
bfd/version.m4 | 2 +-
binutils/configure | 20 +-
binutils/po/binutils.pot | 1117 +-
gas/configure | 20 +-
gas/po/gas.pot | 274 +-
gprof/configure | 20 +-
gprofng/configure | 20 +-
gprofng/doc/version.texi | 4 +-
gprofng/libcollector/configure | 20 +-
ld/configure | 20 +-
ld/po/ld.pot | 258 +-
libiberty/functions.texi | 59 +-
opcodes/configure | 20 +-
src-release.sh | 2 +-
18 files changed, 277653 insertions(+), 1003 deletions(-)
diff --git a/ChangeLog.git b/ChangeLog.git
new file mode 100644
index 00000000000..ba5ed49397e
--- /dev/null
+++ b/ChangeLog.git
@@ -0,0 +1,276618 @@
+2025-07-27 Nick Clifton <nickc@redhat.com>
+
+ Oops - test files accidentally omitted from previous deltas
+
+2025-07-27 Indu Bhagat <indu.bhagat@oracle.com>
+
+ [PATCH] doc: sframe: mention errata 1 of SFrame version 2
+ With the changes of an added flag SFRAME_F_FDE_FUNC_START_PCREL, s390x
+ support and new section type SHT_GNU_SFRAME, indicate that this document
+ specifies the errata 1 of SFrame version 2. This will help distinguish
+ the document / specification better from previous releases.
+
+ libsframe/doc/
+ * sframe-spec.texi: Mention errata 1 of SFrame version 2.
+
+2025-07-27 Indu Bhagat <indu.bhagat@oracle.com>
+
+ [PATCH] readelf: objdump: sframe: fix dumping with section name
+ Fix PR binutils/33186 - No SFrame dump if section name is not .sframe
+
+ When the section name is not ".sframe", ensure that readelf and objdump
+ are able to dump a section of type SHT_GNU_SFRAME and not fail if the
+ user specifies the new section name.
+
+ For objdump, in dump_dwarf_section (), use the match string of ".sframe"
+ to find the corresponding debug_displays[] item for SFrame section.
+ Doing this ensures that any call to dump_dwarf_section () with the
+ section pointing to the SFrame section (with name possibly different
+ from ".sframe") will successfully dump the SFrame section.
+
+ If the SFrame section is named anything but ".sframe", and user does not
+ specify the name of the SFrame section either, the documented behaviour
+ is that the default section name is assumed to be ".sframe". So the
+ following (albeit counter intuitive) is expected at this time:
+
+ $ readelf -S sort | grep sframe
+ [NN] .sframe2 GNU_SFRAME 0000000000NNNNNN 0000NNNN
+
+ (Note section name .sframe2).
+
+ $ objdump --sframe sort
+
+ sort: file format elf64-x86-64
+
+ No .sframe section present
+
+ (Similarly for readelf as well).
+
+ For objdump, set dump_sframe_section_name to ".sframe" if user specifies
+ no section name. In the error checking done in dump_sframe_section, add
+ the case when user specifies a valid section name but one that does not
+ contain SFrame section data. For sections generated with Binutils >=
+ 2.45, this can be checked with section type of SHT_GNU_SFRAME.
+ Previously these sections were SHT_PROGBITS with name ".sframe".
+
+ Similar changes in readelf.
+
+ Add a test each for objdump and readelf to dump a renamed section. Use
+ gas_sframe_check to limit the execution of these tests only when a gas
+ supporting SFrame format is present.
+
+ binutils/
+ PR binutils/33186
+ * objdump.c (dump_dwarf_section): Set match to ".sframe" which
+ corresponds to the name in the debug_displays[] entry for
+ SFrame section.
+ (dump_sframe_section): Check if the user specified section name
+ contains SFrame data.
+ (main): Set default section name to ".sframe".
+ * readelf.c (display_debug_section): Adjust checks to find the
+ debug_diplays[] item for the input arg SFrame section.
+ Use id instead of i, as it is more readable.
+
+ binutils/testsuite/
+ PR binutils/33186
+ * binutils-all/x86-64/objdump-sframe-01.d: New test.
+ * binutils-all/x86-64/readelf-sframe-01.d: New test.
+ * binutils-all/x86-64/sframe-func.s: New test.
+
+2025-07-27 Indu Bhagat <indu.bhagat@oracle.com>
+
+ [PATCH] gas: sframe: command line option takes precedence over gas directive to emit .sframe section.
+ Fix PR gas/33175 sframe: --gsframe=no does not disable when .cfi_sections directive with .sframe
+
+ --gsframe=no should also disable generation of SFrame section when explicit CFI directive: .cfi_sections .sframe is specified in the input.
+ This means we need to track whether SFrame generation was explicitly disabled by the user.
+ Introduce a new enum to facilitate disambiguation between GEN_SFRAME_DEFAULT_NONE and GEN_SFRAME_DISABLED.
+ While fixing the bug by adding the enum, keep the upcoming requirement in mind: we will also need to disambiguate between --enable-default-sframe and user-specified --gsframe/--gsframe=yes.
+ The intent is to not display SFrame related warnings or errors like: as_bad (_(".sframe not supported for target")); for unsupported targets if --enable-default-sframe is in effect.
+ This implies we need to have a four state enum ( GEN_SFRAME_DEFAULT_NONE, GEN_SFRAME_CONFIG_ENABLED, GEN_SFRAME_DISABLED, GEN_SFRAME_ENABLED) gas
+
+2025-07-27 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-26 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-25 Alice Carlotti <alice.carlotti@arm.com>
+
+ gas/NEWS: Add AArch64 updates
+
+2025-07-25 Alice Carlotti <alice.carlotti@arm.com>
+
+ gas/doc: Update AArch64 Architecture Extensions
+ Add faminmax, move a couple of misplaced entries, and improve a few
+ other entries.
+
+ The documentation now lists every recognised extension name, with the
+ exception of a couple of aliases that are deliberately undocumented.
+
+2025-07-25 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Fix sve2p2/sme2p2 dependencies
+ Change dependency on sve2/sme2 to sve2p1/sme2p1.
+
+2025-07-25 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ ld: Force SHELL=/bin/bash in ld for Solaris [PR32580]
+ As described in PR ld/32580, when using SHELL=/bin/sh or /bin/ksh on
+ Solaris, the generated linker scripts get corrupted. So far, the only
+ workaround is to enforce /bin/bash instead.
+
+ This is a major nuisance for developers and users alike, so this patch
+ automates this by overriding SHELL in ld/configure.ac.
+
+ Tested on amd64-pc-solaris2.11 in three configurations:
+
+ * CONFIG_SHELL unset
+
+ * CONFIG_SHELL=/bin/ksh
+
+ * CONFIG_SHELL='/bin/bash --norc'
+
+ In the first two cases, SHELL was set to /bin/bash as desired, while in
+ the third it was left unchanged.
+
+ 2025-07-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ ld:
+ PR ld/32580
+ * configure.ac <*-*-solaris2*>: Enforce SHELL=/bin/bash.
+ * configure: Regenerate.
+
+ (cherry picked from commit 96ad2fd3c0c0414110fe58ed4ee511f49768fa3d)
+
+2025-07-25 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-24 Indu Bhagat <indu.bhagat@oracle.com>
+
+ gas: sframe: fix PR gas/33170
+ SFrame generation code assumes that since DW_CFA_restore means
+ restoration of the state of the register to the one at the beginning of
+ the function, there must be a state to restore to (hence the gas_assert
+ (cie_fre)).
+
+ This assumption needs adjustment. DW_CFA_restore may be present in the
+ very beginning of a (e.g., cold) function, with no initialized state for
+ SFrame functions to restore to.
+
+ gas/
+ PR gas/33170
+ * gas/gen-sframe.c (sframe_xlate_do_restore): Use current FRE if
+ CIE FRE is not yet setup.
+ gas/testsuite/
+ PR gas/33170
+ * gas/cfi-sframe/cfi-sframe.exp: New test.
+ * gas/cfi-sframe/cfi-sframe-x86_64-pr33170.d: New test.
+ * gas/cfi-sframe/cfi-sframe-x86_64-pr33170.s: New test.
+
+ (cherry picked from commit 83eeaf917873a550656faf9a38cd14e0f4c521b1)
+
+2025-07-24 H.J. Lu <hjl.tools@gmail.com>
+
+ strip: Properly handle LLVM IR bitcode
+ commit 717a38e9a02109fcbcb18bb2ec3aa251e2ad0a0d
+ Author: H.J. Lu <hjl.tools@gmail.com>
+ Date: Sun May 4 05:12:46 2025 +0800
+
+ strip: Add GCC LTO IR support
+
+ added "-R .gnu.lto_.*" to strip to remove all GCC LTO sections. When
+ "-R .gnu.lto_.*" is used, the plugin target is ignored so that all LTO
+ sections are stripped as the regular sections. It works for the slim
+ GCC LTO IR since the GCC LTO IR is stored in the regular sections. When
+ the plugin target is ignored, the GCC LTO IR can be recognized as the
+ normal object files. But it doesn't work for the slim LLVM IR which
+ is stored in a standalone file.
+
+ 1. Add bfd_check_format_matches_lto and bfd_check_format_lto to take an
+ argument, lto_sections_removed, to indicate if all LTO sections should
+ be removed.
+ 2. Update strip to always enable the plugin target so that the plugin
+ target is enabled when checking for bfd_archive.
+ 3. Update strip to ignore the plugin target for bfd_object when all LTO
+ sections should be removed. If the object is unknown, copy it as an
+ unknown file without any messages.
+ 4. Treat the "-R .llvm.lto" strip option as removing all LTO sections.
+
+ bfd/
+
+ PR binutils/33198
+ * format.c (bfd_check_format_lto): New function.
+ (bfd_check_format): Call bfd_check_format_matches_lto.
+ (bfd_check_format_matches): Renamed to ...
+ (bfd_check_format_matches_lto): This. Add an argument,
+ lto_sections_removed, to indicate if all LTO sections should be
+ removed and don't match the plugin target if lto_sections_removed
+ is true.
+ (bfd_check_format_matches): Call bfd_check_format_matches_lto.
+ * bfd-in2.h: Regenerated.
+
+ binutils/
+
+ PR binutils/33198
+ * objcopy.c (copy_archive): Call bfd_check_format_lto, instead
+ of bfd_check_format, and pass lto_sections_removed. Remove the
+ non-fatal message on unknown element since it will be copied as
+ an unknown file.
+ (copy_file): Don't check lto_sections_removed when enabling LTO
+ plugin in strip.
+ (copy_file): Ignore the plugin target first if all LTO sections
+ should be removed. Try with the plugin target next if ignoring
+ the plugin target failed to match the format.
+ (strip_main): Also set lto_sections_removed for -R .llvm.lto.
+ * testsuite/binutils-all/x86-64/pr33198.c: New file.
+ * testsuite/binutils-all/x86-64/x86-64.exp (run_pr33198_test):
+ New.
+ Run binutils/33198 tests.
+ * testsuite/lib/binutils-common.exp (llvm_plug_opt): New.
+ (CLANG_FOR_TARGET): New. Set to "clang" for native build if
+ "clang -v" reports "clang version".
+
+ (cherry picked from commit f752be8f916efa70aea9c2e4f664c75690fd136c)
+
+2025-07-24 Alan Modra <amodra@gmail.com>
+
+ PR 33197 [AVR] Incorrect syntax in generated ldscript
+ Rearrange scripttempl/avr.sc to avoid oddities of shells expanding
+ ${RELOCATING+stuff} in here documents where "stuff" contains quoted
+ strings. Also I think it is better to avoid multi-line "stuff" as it
+ can be tricky to spot the ending brace.
+
+ (cherry picked from commit ae114fb523efe908f9e807359e2f494ee64d2801)
+
+2025-07-24 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-23 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-22 Nick Clifton <nickc@redhat.com>
+
+ Updated translations for various sub-directories
+
+2025-07-22 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
+
+ ld: Rename a file on Windows fails if target already exists
+ To rename a file on Windows, the target name cannot exist. Removing file
+ prior to renaming ensures this is handled.
+ To remove a file on Windows, the file cannot be open. Closing the bfd
+ handle ensures this is handled.
+ Moved call to free on isympp / osympp to after bfd is closed to align
+ with comment earlier in the cmdline_add_object_only_section function.
+
+ (cherry picked from commit 233cd5946413108bf4902b22a9cb23ad0a468f5e)
+
+2025-07-21 Dmitrii Bordukov <dabordukov@gmail.com>
+
+ gprofng: do not skip weak symbols
+ PR gprofng/33151
+
+ gprofng ignores functions that are compiled as weak symbols. This
+ heavily affects C++ class methods that are always compiled by g++
+ and clang++ as weak symbols. In this case 'gprofng display text'
+ just displays <static>@ADDRESS(<FILENAME>) instead of proper method
+ name.
+
+ The bug has been introduced in the commit 470a0288a818.
+
+2025-07-18 Alan Modra <amodra@gmail.com>
+
+ Remove sframe relocs against discarded sections
+ Commit d7f343eaad3f testsuite change resulted in a regression for
+ s390x-linux. This extends the x86_64 fix to other targets.
+
+ PR ld/33156
+ * elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Remove .sframe
+ relocs too.
+
+ (cherry picked from commit fcf7470408aa0508fbe99abb99547757a348383d)
+
+2025-07-17 Indu Bhagat <indu.bhagat@oracle.com>
+
+ libsframe: relax the assertion limit for fre_start_addr
+ Fix PR ld/33131 Failed assertion when linking gccgo
+
+ Make amendments in both sframe_decoder_get_fre and
+ sframe_encoder_add_fre.
+
+ Since GNU as and the dw2gencfi code generally accepts such CFI, its best
+ to allow in SFrame FREs too.
+
+ libsframe/
+ PR ld/33131.
+ * sframe.c (sframe_decoder_get_fre): Relax the assertion a bit.
+ (sframe_encoder_add_fre): Likewise.
+
+ (cherry picked from commit 387efef5fef727cbe52099dcd5012905c4205be3)
+
+2025-07-16 Sam James <sam@gentoo.org>
+
+ gas: improve --gsframe documentation
+ I omitted documentation in 8aad677a12832885acd5be1de8f41e740b8e713d in
+ error. Rectify that with:
+ 1) changing ---help to mention bare `--gsframe` too, as we're not
+ getting rid of that;
+
+ 2) adding the new --gsframe=[no|yes] form to as.texi.
+
+ PR gas/33125
+ * gas/as.c (parse_args): Tweak --gsframe= help text.
+ * gas/doc/as.texi: Document --gsframe=[no|yes].
+
+ (cherry picked from commit 50c1c57426db6e1c7b44b4d05f0b07fcba91f890)
+
+2025-07-16 H.J. Lu <hjl.tools@gmail.com>
+
+ gas: Re-indent case OPTION_SFRAME:
+ PR gas/33125
+ * gas/as.c (parse_args): Re-indent case OPTION_SFRAME:
+
+ (cherry picked from commit 1535d2a0ce4e474f1a42e8b8720de01b7dc1f656)
+
+2025-07-16 Sam James <sam@gentoo.org>
+
+ gas: support --gsframe=no
+ Being able to explicitly disable SFrames on the command line is useful,
+ especially when looking at a gas that enables SFrames by default. The
+ binutils testsuite will benefit from this as there's testcases that don't
+ expect their presence.
+
+ In summary:
+ * Nothing is passed => no SFrames (no change from before)
+ * --gsframe is passed => SFrames (no change from before)
+ * --gsframe=yes is passed => SFrames (previously rejected)
+ * --gsframe-no is passed => no SFrames (previously rejected)
+
+ PR gas/33125
+ * gas/as.c (parse_args): Accept --gsframe=no, --gsframe=yes.
+
+ (cherry picked from commit 8aad677a12832885acd5be1de8f41e740b8e713d)
+
+2025-07-16 H.J. Lu <hjl.tools@gmail.com>
+
+ x86-64: Remove sframe relocs against discarded sections
+ Since unlike eh_frame editing code, sframe editing code keeps
+ R_X86_64_NONE reloc as is, its r_offset is wrong, we must not
+ generate R_X86_64_NONE reloc in sframe section against discarded
+ sections for "ld -r".
+
+ bfd/
+
+ PR ld/33156
+ * elf64-x86-64.c (elf_x86_64_relocate_section): Also remove
+ sframe relocations against discarded sections for "ld -r".
+
+ ld/
+
+ PR ld/33156
+ * testsuite/ld-elf/eh-group.exp (as_gsframe): New.
+ Assemble eh-group.o with $as_gsframe.
+
+ (cherry picked from commit d7f343eaad3f34c76657b9996e6253b4f9a218d5)
+
+2025-07-16 H.J. Lu <hjl.tools@gmail.com>
+
+ sframe: Allow input R_*_NONE relocations
+ "ld -r" generates R_*_NONE relocations in sframe section if input
+ relocations in sframe section are against discarded section. Allow
+ input R_*_NONE relocations if there are more relocation entries than
+ SFrame entries, instead of assuming number of SFrame entries == number
+ of relocation entries.
+
+ bfd/
+
+ PR ld/33127
+ * elf-sframe.c (sframe_decoder_init_func_bfdinfo): Allow input
+ R_*_NONE relocations if there are more relocation entries than
+ SFrame entries.
+
+ ld/
+
+ PR ld/33127
+ * testsuite/ld-x86-64/sframe-reloc-2a.s: New file.
+ * testsuite/ld-x86-64/sframe-reloc-2b.s: Likewise.
+ * testsuite/ld-x86-64/x86-64.exp: Run PR ld/33127 tests.
+
+ (cherry picked from commit 5f9bf0cf711a153a0a20d6ff88181e9a6775bdba)
+
+2025-07-16 H.J. Lu <hjl.tools@gmail.com>
+
+ ld: Clear map_head_is_link_order for .gnu_object_only
+ Clear map_head_is_link_order when generating .gnu_object_only section so
+ that lang_add_section can add new sections and .sframe sections will be
+ properly merged by _bfd_elf_merge_section_sframe.
+
+ PR ld/33146
+ * ldlang.c (cmdline_emit_object_only_section): Clear
+ map_head_is_link_order.
+ * testsuite/ld-plugin/lto.exp (as_gsframe): New.
+ (lto_link_tests): Add $as_gsframe to compile lto-4b.o and
+ lto-4c.o.
+
+ (cherry picked from commit 939eb467b21de5d18ee703755fb9704a525cfe21)
+
+2025-07-16 Alan Modra <amodra@gmail.com>
+
+ Re: gas: Move gas_sframe_check to binutils-common.exp
+ PR ld/33146
+
+ Correct TCL errors trying to access error output file in commit
+ ef7a634dc01d. In fact, get rid of the output file test entirely since
+ gas exit status is sufficient.
+
+ Also there is no need to firstly check for ELF support.
+
+ Set check_as_sframe_result, and remove ld-lib.exp check_as_sframe.
+
+ (cherry picked from commit a57a3a169ea9ec79977949c9c8dccd3a2a615fae)
+
+2025-07-16 H.J. Lu <hjl.tools@gmail.com>
+
+ gas: Move gas_sframe_check to binutils-common.exp
+ Move gas_sframe_check to binutils-common.exp so that it can be used in
+ linker tests to check if a target assembler supports --gsframe.
+
+ binutils/
+
+ PR ld/33146
+ * testsuite/lib/binutils-common.exp (gas_sframe_check): Moved
+ from cfi-sframe.exp. Replace gas_host_run with remote_exec.
+
+ gas/
+
+ PR ld/33146
+ * testsuite/gas/cfi-sframe/cfi-sframe.exp (gas_sframe_check):
+ Moved to binutils-common.exp.
+
+ (cherry picked from commit ef7a634dc01df3d78f208c93316b52937d3fe8f4)
+
+2025-07-15 Alan Modra <amodra@gmail.com>
+
+ s390x sframe regressions
+ Commit 6ab3f09a682a resulted in regressions.
+ s390x-linux-gnu FAIL: SFrame simple link
+ s390x-linux-gnu FAIL: SFrame for plt0 and pltN
+
+ Commit 939eb467b21d exposed the problem further.
+ s390x-linux-gnu FAIL: LTO 4a
+ s390x-linux-gnu FAIL: LTO 4c
+ s390x-linux-gnu FAIL: LTO 4d
+
+ * elf64-s390.c (elf_s390_create_dynamic_sections): Set plt_sframe
+ ELF section type.
+
+ Reviewed-by: Jens Remus <jremus@linux.ibm.com>
+ (cherry picked from commit 168c017e206894effdefa919bff29880165fae13)
+
+2025-07-15 Nick Clifton <nickc@redhat.com>
+
+ Updated translations for various sub-directories
+
+2025-07-15 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ Only parse attributes in ELF sections with the SHT_GNU_ATTRIBUTES type if the OS is not Solaris. Set the is_solaris flag for Sparc solaris architectures
+ PR 33153
+
+2025-07-14 Nick Clifton <nickc@redhat.com>
+
+ Updated Ukranian translation for the opcodes sub-directory
+
+ Updated Ukranian translation for the binutils sub-directory
+
+ Updated Spanish translation for the gas sub-directory
+
+2025-07-14 Nelson Chu <nelson@rivosinc.com>
+
+ gas/NEWS: Corrected the information about mapping symbol $x for risc-v
+
+2025-07-14 Aaron Griffith <aargri@gmail.com>
+
+ gas: accept leading zeros on dollar local labels in z80 sdcc compat mode
+ SDCC assembly output uses 5-digit numeric dollar sign labels, padded
+ with zeros. Commit 226749d made these invalid, and broke the Z80 SDCC
+ compatibility mode in GAS.
+
+ https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=226749d5a6ff0d5c607d6428d6c81e1e7e7a994b
+
+ This restores SDCC compatibility by replacing the leading zeros with
+ spaces when inside dollar local labels and when SDCC compatibility is
+ enabled. It also restores the SDCC test case to represent actual
+ syntax emitted by SDCC, and adds a note explaining the purpose of
+ the test.
+
+ Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=33030
+
+2025-07-13 Nick Clifton <nickc@redhat.com>
+
+ Fix compile time warning message about optarg parameter shadowing global variable
+
+ Update version number on 2.45 branch
+
+ Add markers for 2.45 branch
+
+2025-07-13 Tom de Vries <tdevries@suse.de>
+
+ [gdb/build] Work around GCC ipa-modref bug
+ PR mi/32571 reports the following problem:
+ ...
+ $ gdb -q -batch -ex "b bla.c:100"
+ <random output>
+ Make breakpoint pending on future shared library load? (y or [n]) \
+ [answered N; input not from terminal]
+ ...
+ while this is expected:
+ ...
+ $ gdb -q -batch -ex "b bla.c:100"
+ No symbol table is loaded. Use the "file" command.
+ Make breakpoint pending on future shared library load? (y or [n]) \
+ [answered N; input not from terminal]
+ ...
+
+ A few factors in reproducing this are building gdb using gcc 14,
+ "-O2 -flto=auto" and --disable-nls. For more details, see the PR.
+
+ This turns out to be caused by a GCC PR [1], more specifically a problem in
+ ipa-modref.
+
+ Work around this by disabling ipa-modref for GCC versions 12-15 and 16.0,
+ assuming the GCC 16.1 release will contain a fix.
+
+ Tested on aarch64-linux and x86_64-linux.
+
+ Approved-By: Andrew Burgess <aburgess@redhat.com>
+
+ Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=32571
+
+ [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120987
+
+2025-07-13 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-12 Aaron Griffith <aargri@gmail.com>
+
+ gdb: add Aaron Griffith to gdb/MAINTAINERS
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ ld/aarch64elf: add support for DT_AARCH64_MEMTAG_STACK dynamic tag
+ Add new command line option -z memtag-stack for aarch64 elf. This
+ option instructs the linker to generate the necessary dynamic tag
+ DT_AARCH64_MEMTAG_STACK, which the dynamic loader can then use to
+ protect the stack memory with PROT_MTE. Linker issues an
+ 'unrecognized option' error when -z memtag-stack is specified for
+ non-aarch64 based emulations.
+
+ readelf displays the dynamic tag when present:
+
+ $ readelf -d <exectutable>
+ Dynamic section at offset 0xfdd8 contains XX entries:
+ Tag Type Name/Value
+ 0x0000000000000001 (NEEDED) Shared library: [libc.so.6]
+ 0x000000000000000c (INIT) 0x400520
+ 0x000000000000000d (FINI) 0x400b64
+ 0x0000000000000019 (INIT_ARRAY) 0x41fdc8
+ ... ... ...
+ 0x000000007000000c (AARCH64_MEMTAG_STACK) 0x1
+ ... ... ...
+
+ ChangeLog:
+
+ * bfd/elfnn-aarch64.c (elfNN_aarch64_late_size_sections): Emit
+ DT_AARCH64_MEMTAG_STACK dynamic tag.
+ * bfd/elfxx-aarch64.h (struct aarch64_memtag_opts): Add new
+ member for tracking whether stack access uses MTE insns.
+ * binutils/readelf.c (get_aarch64_dynamic_type): Handle
+ DT_AARCH64_MEMTAG_STACK.
+ * ld/emultempl/aarch64elf.em: Add new command line option.
+ * ld/ld.texi: Add documentation for -z memtag-stack.
+ * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
+ * ld/testsuite/ld-aarch64/dt-memtag-stack.d: New test.
+
+ include/ChangeLog:
+
+ * elf/aarch64.h (DT_AARCH64_MEMTAG_STACK): New definition.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ ld/aarch64elf: add support for DT_AARCH64_MEMTAG_MODE dynamic tag
+ Add new command line option -z memtag-mode=<mode> to aarch64 elf,
+ where <mode> can be one of none, sync, or async. For mode of sync or
+ async, a DT_AARCH64_MEMTAG_MODE dynamic tag with a value of 0 or 1
+ respectively is emitted.
+
+ readelf displays the dynamic tag when present:
+
+ $ readelf -d <exectutable>
+ Dynamic section at offset 0xfdd8 contains XX entries:
+ Tag Type Name/Value
+ 0x0000000000000001 (NEEDED) Shared library: [libc.so.6]
+ 0x000000000000000c (INIT) 0x400520
+ 0x000000000000000d (FINI) 0x400b64
+ 0x0000000000000019 (INIT_ARRAY) 0x41fdc8
+ ... ... ...
+ 0x0000000070000009 (AARCH64_MEMTAG_MODE) 0x1
+ ... ... ...
+
+ Note that this patch doesn't add support for the "asymm" MTE mode,
+ which is an Armv8.7 extension.
+
+ ChangeLog:
+
+ * bfd/elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Add
+ new member for memtag properties.
+ (bfd_elfNN_aarch64_set_options): New argument to pass memtag
+ properties.
+ (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_MODE
+ dynamic tag.
+ * bfd/elfxx-aarch64.h: New definition for the various memtag
+ properties.
+ * binutils/readelf.c (get_aarch64_dynamic_type): Handle
+ DT_AARCH64_MEMTAG_MODE.
+ * ld/emultempl/aarch64elf.em: Likewise.
+ * ld/ld.texi: Add documentation for the new option
+ -z memtag-mode.
+ * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test.
+ * ld/testsuite/ld-aarch64/dt-memtag.d: New test.
+ * ld/testsuite/ld-aarch64/dt-memtag-mode.s: New test.
+
+ include/ChangeLog:
+
+ * elf/aarch64.h (DT_AARCH64_MEMTAG_MODE): New definition.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ ld: aarch64: make EH Frame parsing aware of augmentation char 'G'
+ As per the DWARF for the Arm 64-bit Architecture (AArch64)
+ specification, the augmentation char 'G' indicates that associated
+ frames may modify MTE tags on the stack space they use.
+
+ Add knowledge of the 'G' augmentation char to the EH Frame parsing
+ code.
+
+ ChangeLog:
+
+ * bfd/elf-eh-frame.c (_bfd_elf_parse_eh_frame): Accommodate
+ augmentation char 'G'.
+ * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test.
+ * ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s: New test.
+ * ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s: New test.
+ * ld/testsuite/ld-aarch64/mte-tagged-frame.d: New test.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ gas: aarch64: suppport CFI directive .cfi_mte_tagged_frame
+ Process a new aarch64-specific CFI directive: .cfi_mte_tagged_frame
+ (LLVM uses this CFI directive already). The CFI directive, when
+ present for a function, indicates that the stack frame for the
+ function may modify the MTE tags of the stack space it uses. The
+ assembler emits char 'G' in the CIE augmentation string to indicate
+ the same.
+
+ ChangeLog:
+
+ * gas/config/tc-aarch64.c (s_aarch64_mte_tagged_frame): New
+ definition.
+ * gas/config/tc-aarch64.h (tc_fde_entry_extras): Add
+ memtag_frame_p.
+ (tc_cie_entry_extras): Likewise.
+ (tc_fde_entry_init_extra): Likewise.
+ (tc_cie_fde_equivalent_extra): Likewise.
+ (tc_cie_entry_init_extra): Likewise.
+ * gas/doc/c-aarch64.texi: Add documentation for
+ .cfi_mte_tagged_frame directive.
+ * gas/testsuite/gas/aarch64/mte_tagged_stack.d: New test.
+ * gas/testsuite/gas/aarch64/mte_tagged_stack.s: New test.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ binutils: make read_cie aware of new augmentation char 'G'
+ This allows objdump/readelf to dump DWARF/EH Frame info when the stack
+ frame makes use of MTE tagging.
+
+ ChangeLog:
+
+ * binutils/dwarf.c (is_aarch64_augmentation): Add handling for augmentation
+ char 'G'.
+
+ ---
+ [No change in V3]
+
+2025-07-12 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ bfd: fix recognition of arch-specific augmentations
+ This patch fixes _bfd_elf_parse_eh_frame so it will not recognize
+ machine/architecture specific augmentation characters in EH Frame
+ CFIs.
+
+ Regtested in x86_64-linux-gnu and aarch64-linux-gnu.
+
+ bfd/ChangeLog:
+
+ * elf-eh-frame.c (_bfd_elf_parse_eh_frame): Recognize augmentation
+ 'B' only if targetting aarch64.
+
+2025-07-12 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ binutils: factorize handling of arch-specific DWARF augmentations
+ This patch factorizes the handling of architecture/machine specific
+ augmentation characters in CIEs.
+
+ Based on an idea proposed by Richard Earnshaw.
+
+ binutils/ChangeLog:
+
+ * dwarf.c (is_mach_augmentation_ftype): New type.
+ (is_mach_augmentation): New variable.
+ (is_nomach_augmentation): New function.
+ (is_aarch64_augmentation): Likewise.
+ (init_dwarf_by_elf_machine_code): Set is_mach_augmentation as
+ appropriate.
+ (init_dwarf_by_bfd_arch_and_mach): Likewise.
+ (read_cie): Handle architecture-specific augmentation characters
+ in a generic way.
+
+2025-07-12 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ binutils: generalize init_dwarf_regnames_by_* functions
+ This patch renames the functions:
+
+ init_dwarf_regnames_by_elf_machine_code
+ init_dwarf_regnames_by_bfd_arch_and_mach
+
+ to
+
+ init_dwarf_by_elf_machine_code
+ init_dwarf_by_bfd_arch_and_mach
+
+ The idea is to start using these functions to perform general
+ architecture/machine specific initializations beyond register names.
+
+ Regtested in x86_64-linux-gnu and aarch64-linux-gnu targets.
+
+ binutils/ChangeLog:
+
+ * dwarf.c (init_dwarf_regnames_by_elf_machine_code): Rename to
+ init_dwarf_by_elf_machine_code.
+ (init_dwarf_regnames_by_bfd_arch_and_mach): Rename to
+ init_dwarf_by_bfd_arch_and_mach.
+ * dwarf.h: Adjust prototypes accordingly.
+ * readelf.c (process_file_header): Adjust call to
+ init_dwarf_regnames_by_elf_machine_code accordingly.
+ * objdump.c (dump_dwarf): Adjust call to
+ init_dwarf_regnames_by_bfd_arch_and_mach accordingly.
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Add support for --march=armv9.6-a
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Disable sysreg guards by default
+ Add a new flag -menable-sysreg-checking to restore previous behaviour.
+ This existing behaviour is quite inconsistent, so the gating will
+ probably be updated in the future. (In particular, many system
+ registers are currently gated with the architecture version they were
+ released with instead of the lower architecture version that they
+ actually require).
+
+ This patch retains the +d128 requirement for msrr/mrrs.
+
+ Co-Authored-By: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Add missing F_STRICT flags
+ By default, NIL qualifiers are treated as matching any qualifier when
+ checking operand constraints. For many SVE instructions, this would
+ allow operands with missing type suffixes to be assembled as if they had
+ any explicit type specified. To prevent this, the F_STRICT flag is used
+ to specify that NIL qualifiers should match only NIL qualifiers.
+
+ Unfortunately, several SVE instructions incorrectly omitted this
+ F_STRICT flag. The bug has existed in the *MATMUL_SVE* macros since
+ they were added in 2019. The macro LUT_SVE2_INSN was added last year,
+ and the other incorrect macros are new in this release.
+
+ LUTv2_SME2_INSN and LUTv2_SME2p1_INSN were not actually broken, because
+ we reject untyped vector lists already during parsing. However, I have
+ added the F_STRICT flag here anyway, since this is more consistent and
+ would be more robust if those operands start accepting untyped vector
+ lists in the future. The new luti4 tests are the only ones that were
+ already rejected before this change.
+
+ BFLOAT16_SVE_INSN has been unused since it was originally added, so I
+ just deleted the macro.
+
+ The SVE LUT instructions were using the lut instruction class, which
+ has special handling only for SIMD operands, and isn't recognised by
+ aarch64_decode_variant_using_iclass (which sets the qualifiers during
+ decode for most SVE instructions). To prevent these instructions
+ failing to disassemble, I changed their instruction class to sve_misc.
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Remove redundant feature requirements
+ Many instructions explicitly specified SVE/SVE2/SME/SME2 as a required
+ feature when it was already implied by another required feature (at
+ least while the SME->SVE2 implication is retained internally). These
+ redundant features were used to determine both the valid symbol names
+ for immediate operands, and the choice of error message for invalid
+ movprfx sequences. Those two scenarios no longer use architecture
+ features, so the redundant features are now truly redundant.
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Use operand class to select movprfx error
+ Previously the choice of error message for an invalid movprfx sequence
+ used the architecture requirements to determine whether an instruction
+ was an SVE instruction or not. This meant specifying SVE or SVE2 as an
+ explicit architecture requirement for all SVE instructions, even when
+ this was already implied by another feature. As more architecture
+ features are added and with the partial removal of the SME->SVE2
+ dependency, these extra feature requirements were getting messier and
+ easier to forget.
+
+ Instead, we now look at the operand types. If there is an SVE_REG,
+ SVE_REGLIST or PRED_REG operand, then we treat the instruction as an SVE
+ instruction. This does change behaviour slightly, but it only affects
+ the choice of error message and the new choice should be a bit more
+ consistent.
+
+ There is one testsuite update required, because Ezra's SVE_AES2 patch
+ temporarily broke classification of FEAT_SVE_AES instructions. This
+ patch restores the original behaviour.
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Refactor exclusion of reg names in immediates
+ When parsing immediate values, register names should not be
+ misinterpreted as symbols. However, for backwards compatibility we need
+ to permit some newer register names within older instructions. The
+ current mechanism for doing so depends on the list of explicit
+ architecture requirements for the instructions, which is fragile and
+ easy to forget, and grows increasingly messy as more architecture
+ features are added.
+
+ This patch add explicit flags to each opcode to indicate which set of
+ register names is disallowed in each instance. These flags are
+ mandatory for all opcodes with immediate operands, which ensures that
+ the choice of disallowed names will always be deliberate and explicit.
+
+ This patch should have no functional change.
+
+2025-07-12 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Remove redundant ORs with 0
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ libsframe: bump version to 2.0
+ Remove LIBSFRAME_1.1, LIBSFRAME_1.0 nodes and add a new LIBSFRAME_2.0
+ node (non-inheritance version) to create new global versioned symbols.
+ Also announce libsframe.so.2 in NEWS.
+
+ New APIs:
+ sframe_decoder_get_flags;
+ sframe_decoder_get_offsetof_fde_start_addr;
+ sframe_encoder_get_flags;
+ sframe_encoder_get_offsetof_fde_start_addr;
+
+ Removed APIs: (already deprecated since X-2 release)
+ sframe_get_funcdesc_with_addr;
+
+ APIs with changed semantics:
+ sframe_decoder_get_funcdesc_v2;
+ sframe_encoder_add_funcdesc_v2;
+ sframe_encoder_write;
+
+ lisbframe/
+ * libsframe.ver: Define new LIBSFRAME_2.0.
+ * libtool-version: Bump the 'current' numeral to indicate a binary
+ incompatible release.
+ include/
+ * sframe-api.h (sframe_get_funcdesc_with_addr): Remove
+ deprecated interface.
+ libsframe/
+ * sframe.c (sframe_get_funcdesc_with_addr): Likewise.
+ binutils/
+ * NEWS: Announce new versioned release of libsframe.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ libsframe: fixup comment and minor style issues
+ Also, use ATTRIBUTE_UNUSED consistently.
+
+ libsframe/
+ * sframe.c (sframe_encoder_add_funcdesc): Fix function-level
+ comment and use ATTRIBUTE_UNUSED consistently.
+ (sframe_encoder_add_funcdesc_v2): Use ATTRIBUTE_UNUSED
+ consistently.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ gas: elf: binutils: add new section type SHT_GNU_SFRAME
+ So far, SFrame sections were of type SHT_PROGBITS.
+
+ As per ELF specification, SHT_PROGBITS indicates that the section holds
+ information defined by the program, whose format and meaning are
+ determined solely by the program.
+
+ On the linker side, SHT_PROGBITS should be reserved for the simple "cat
+ contents after applying relocs" semantics.
+
+ Currently, the only way to know that a section contains SFrame stack
+ trace data is if consumer checks for section name. Such a check for
+ section name is not quite conformant to ELF principles.
+
+ Some of this was discussed here
+ https://sourceware.org/pipermail/binutils/2025-March/140181.html
+
+ With this change, the SFrame sections generated by gas, ld will have
+ section type set to SHT_GNU_SFRAME. The new section type is defined in
+ the SHT_LOOS/SHT_HIOS space. The SFrame parsing routine
+ _bfd_elf_parse_sframe () now admits sections only when the the section
+ type is SHT_GNU_SFRAME.
+
+ No special handling / validation is done at the moment for the case of
+ manual creation of SFrame sections via obj_elf_section (). Add function
+ level comments for now to add a note about this.
+
+ Although the default handling for (sh_type >= SHT_LOOS && sh_type <=
+ SHT_HIOS) is sufficient when SHT_GNU_SFRAME is in that range, it makes
+ sense to add it as a case of its own.
+
+ bfd/
+ * elf-sframe.c (_bfd_elf_parse_sframe): Check if section type is
+ SHT_GNU_SFRAME.
+ (_bfd_elf_set_section_sframe): Set SHT_GNU_SFRAME for output
+ SFrame section.
+ * elflink.c (obj_elf_section): Use section type for check
+ instead of section name.
+ * elfxx-x86.c: Set SHT_GNU_SFRAME for SFrame sections for
+ .plt* sections.
+ * elf.c (bfd_section_from_shdr): Add case for SHT_GNU_SFRAME.
+ binutils/
+ * readelf.c (get_os_specific_section_type_name): Add
+ SHT_GNU_SFRAME.
+ gas/
+ * NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME
+ set.
+ * config/obj-elf.c (obj_elf_attach_to_group): Add comments to
+ indicate no special handling for SFrame yet.
+ * dw2gencfi.c (cfi_finish): Set SHT_GNU_SFRAME for emitted
+ SFrame section.
+ ld/
+ * NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME
+ set.
+ gas/testsuite/
+ * gas/cfi-sframe/cfi-sframe.exp: Add new test.
+ * gas/cfi-sframe/cfi-sframe-common-1b.d: New test.
+ * gas/cfi-sframe/cfi-sframe-common-1b.s: New test.
+ include/
+ * elf/common.h (SHT_GNU_SFRAME): Add new section type for SFrame
+ stack trace information.
+ libsframe/doc/
+ * sframe-spec.texi: Add expected ELF section type.
+
+2025-07-12 Indu Bhagat <indu.bhagat@oracle.com>
+
+ gas: sframe: guard block with support_sframe_p
+ SFrame is generated for ELF targets only. Guard the block with
+ support_sframe_p like others for consistency.
+
+ Also, in a later commit, we would like to do a:
+ elf_section_type (sframe_seg) = SHT_GNU_SFRAME;
+
+ This cannot be done for non-ELF targets, hence the need to guard with
+ some pre-processor conditional to enable it for only OBJ_ELF. Guarding
+ with support_sframe_p works for now, because those targets that support
+ SFrame define support_sframe_p:
+ - x86_64 and aarch64 define support_sframe_p when OBJ_ELF is defined
+ - s390x has no non-LEF target.
+
+ We continue to issue an error on targets where SFrame is not supported:
+ .sframe not supported for target
+
+ gas/
+ * dw2gencfi.c (cfi_finish): Guard with support_sframe_p.
+ (support_sframe_p): Remove stub to define to false for backends
+ not supporting SFrame.
+
+2025-07-12 WANG Xuerui <git@xen0n.name>
+
+ {binutils, gas, ld}/NEWS: Announce LoongArch changes in 2.45
+
+2025-07-12 WANG Xuerui <git@xen0n.name>
+
+ LoongArch: Un-skip cross-segment alignment compensation during relax pass 2
+ It turned out wrong to skip compensating for segment alignment if the
+ current section is closed for deletion, as my recent system update with
+ binutils trunk revealed link failures of many high-profile packages such
+ as ffmpeg, numpy and wxGTK -- the dreaded "relocation truncated to fit"
+ errors regarding improperly produced R_LARCH_PCREL20_S2.
+
+ As it's near 2.45 branching time, revert the problematic change and
+ XFAIL the original test case for now.
+
+ Suggested-by: Xi Ruoyao <xry111@xry111.site>
+
+2025-07-12 Alan Modra <amodra@gmail.com>
+
+ MIPS: Fix linker for REL TLS HI16/LO16 relocs
+ With REL targets TLS HI16/LO16 relocations need to combine the low part
+ with the high part just as all the remaining HI16/LO16 relocations, so
+ as to determine the borrow in calculation correctly.
+
+ 2025-07-12 Alan Modra <amodra@gmail.com>
+
+ bfd/
+ PR 19977
+ * elfxx-mips.c (tls_hi16_reloc_p): New function.
+ (mips_elf_add_lo16_rel_addend): Handle tls relocs.
+ (_bfd_mips_elf_relocate_section): Likewise.
+
+ 2025-07-12 Maciej W. Rozycki <macro@orcam.me.uk>
+
+ ld/
+ PR 19977
+ * testsuite/ld-mips-elf/pr19977.d: New test.
+ * testsuite/ld-mips-elf/pr19977-mips16.d: New test.
+ * testsuite/ld-mips-elf/pr19977-micromips.d: New test.
+ * testsuite/ld-mips-elf/pr19977-r.d: New test.
+ * testsuite/ld-mips-elf/pr19977-r-mips16.d: New test.
+ * testsuite/ld-mips-elf/pr19977-r-micromips.d: New test.
+ * testsuite/ld-mips-elf/pr19977-r.s: New test source.
+ * testsuite/ld-mips-elf/pr19977.ld: New test linker script.
+ * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2025-07-12 Alan Modra <amodra@gmail.com>
+
+ MIPS: Correct HI/LO rel reloc howto special_function entries
+ This corrects the DTPREL_HI16/LO16 and TPREL_HI16/LO16 howtos to use
+ _bfd_mips_elf_{hi,lo}16_reloc special functions, in order to support
+ addends outside the range [0,32767] on these relocations.
+
+ R_MIPS_GOT_HI16, R_MIPS_GOT_LO16, R_MIPS_CALL_HI16 and R_MIPS_CALL_LO16
+ are left alone as it seems that we (quite reasonably) only support
+ zero addends for those relocs.
+
+ PR 19977
+ bfd/
+ * elf32-mips.c (elf_mips_howto_table_rel): Set special_function
+ to _bfd_mips_elf_hi16_reloc for R_MIPS_TLS_DTPREL_HI16 and
+ R_MIPS_TLS_TPREL_HI16. Set special_function to
+ _bfd_mips_elf_lo16_reloc for R_MIPS_TLS_DTPREL_LO16 and
+ R_MIPS_TLS_TPREL_LO16
+ (elf_mips16_howto_table_rel): Likewise for
+ R_MIPS16_TLS_DTPREL_HI16, R_MIPS16_TLS_DTPREL_LO16,
+ R_MIPS16_TLS_TPREL_HI16 and R_MIPS16_TLS_TPREL_LO16.
+ (elf_micromips_howto_table_rel): Likewise for
+ R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_DTPREL_LO16,
+ R_MICROMIPS_TLS_TPREL_HI16 and R_MICROMIPS_TLS_TPREL_LO16.
+ * elf64-mips.c (mips_elf64_howto_table_rel): Similarly.
+ (mips16_elf64_howto_table_rel): Similarly.
+ (micromips_elf64_howto_table_rel): Similarly.
+ * elfn32-mips.c: As for elf64-mips.c.
+ gas/
+ * testsuite/gas/mips/pr19977.d,
+ * testsuite/gas/mips/pr19977.s: New test.
+ * testsuite/gas/mips/mips.exp: Run it.
+
+2025-07-12 Maciej W. Rozycki <macro@orcam.me.uk>
+
+ PR 19977: MIPS: Add missing pairing for REL PCHI/PCLO relocations
+ Just as with all HI/LO 16-bit partial relocations the newly-introduced
+ MIPSr6 PC-relative R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations require
+ pairing for correct borrow propagation from the low part to the high
+ part with REL targets, another case for PR 19977.
+
+ Unlike with absolute relocation, there is a complication here in that
+ both parts represent a calculation that is relative to the PC at the
+ individual relocation's location rather than both referring to the
+ location of the R_MIPS_PCHI16 relocation, normally applied to an AUIPC
+ instruction, the location of which is used for the run-time calculation
+ executed by hardware.
+
+ To take this semantics into account, the addend of the R_MIPS_PCLO16
+ relocation matching a given R_MIPS_PCHI16 relocation is expected to be
+ adjusted in the source assembly file for the distance between the two
+ relocations in a single pair, so that once both relocations have been
+ calculated by the linker, the expression calculated at run time is such
+ as if the combined 32-bit immediate was added at the location of the
+ AUIPC instruction.
+
+ So for matching R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations into pairs
+ GAS needs to check for the distance between the two relocations to be
+ equal to the difference between the addends supplied, and then the
+ linker has to subtract the low part of the distance between the two
+ relocations from the low part in calculating the high part, so as to
+ factor in any borrow.
+
+ A further complication is that `_bfd_mips_elf_lo16_reloc' handler is
+ supplied with the addend differently depending on whether it has been
+ called by GAS via `bfd_install_relocation', or by the generic linker via
+ `bfd_perform_relocation'. In the former case the addend is supplied
+ with the relocation itself while in the latter one it comes from the
+ field being relocated.
+
+ We currently ignore the addend supplied with the relocation and it works
+ for calculating absolute high-part relocations, because the same addend
+ has been previously supplied with them when `_bfd_mips_elf_hi16_reloc'
+ was called, however this approach does not work for the PC-relative case
+ because as noted above the low-part addend is different and we need to
+ consistently apply the distance adjustment both with GAS and LD.
+
+ Since the supplied addend and one retrieved from field being relocated
+ won't ever be both nonzero, just use the sum of the two values.
+
+ The low-part addend in `mips_elf_add_lo16_rel_addend' always comes from
+ the field being relocated, so there's no complication there, we just
+ need to apply the same adjustment.
+
+ New linker test cases verify that the same ultimate machine code is
+ produced both for ELF and S-record output formats, ensuring that the
+ both the MIPS/ELF linker and the generic linker behave in the correct
+ way, consistent with each other.
+
+2025-07-12 Maciej W. Rozycki <macro@orcam.me.uk>
+
+ MIPS/BFD: Use helper function for LO relocation sign-extension
+ A calculation for LO relocations has been recently fixed with commit
+ ce08b3bb19b3 ("MIPS/BFD: Fix RELA handling of borrow in the generic
+ linker"), however it was missed that for the updated arithmetic we
+ already have a helper function available, `_bfd_mips_elf_sign_extend'.
+
+ Replace the open-coded statement then with an equivalent call to said
+ function. No functional change.
+
+2025-07-12 Maciej W. Rozycki <macro@orcam.me.uk>
+
+ MIPS/LD/testsuite: Remove duplicate HI/LO relocation test dump files
+ There are only nonessential differences between corresponding o32 and
+ n32 HI/LO relocation test dump files, so reduce the number of files by
+ reusing the same dump between the two ABIs. Adjust test naming, also
+ for the n64 ABI, for consistency with other tests.
+
+2025-07-12 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-11 Indu Bhagat <indu.bhagat@oracle.com>
+
+ libsframe: testsuite: fix PR libsframe/33140
+ Commit 0d4d5a2633f missed some necessary adjustments to the testcase
+ after rebase. SFrame FDE function start address data is now an offset
+ in PCREL encoding; reflect with a new flag SFRAME_F_FDE_START_ADDR_PCREL
+ in the header.
+
+ Adjust the newly added testcase.
+
+ PR libsframe/33140 SFrame test failures on x86-64
+
+ libsframe/testsuite/
+ * libsframe.find/plt-findfre-2.c: Adjust for the new FDE func
+ start addr encoding.
+
+2025-07-11 Simon Marchi <simon.marchi@efficios.com>
+
+ gdb: remove two unused includes of gdbcore.h
+ clangd claims they are unused.
+
+ Change-Id: I3c5e16279ff3b59679b8262a9d24a6e515a718f5
+
+2025-07-11 Simon Marchi <simon.marchi@efficios.com>
+
+ gdb: fix formatting in solib.c
+ There are many instances of `_ (...)` that should be `_(...)`, fix them.
+
+ Change-Id: I9715019c9b62b72208b4849f3cfd531964480dd2
+
+2025-07-11 Simon Marchi <simon.marchi@efficios.com>
+
+ gdb/solib-svr4: use program space from solib in find_debug_base_for_solib
+ Instead of using the current global program space, I think it makes
+ sense to fetch the program space from the solib. The comment for
+ solib::objfile indicates that it may be nullptr (which is true), but in
+ this case, the callers (all in
+ svr4_iterate_over_objfiles_in_search_order) find the solib from an
+ objfile, so we know that solib::objfile (the link in the opposite
+ direction) is set for these solibs at this point.
+
+ Change-Id: I75037d0b2c39ab1b3a3792432be134e200438efe
+ Approved-by: Kevin Buettner <kevinb@redhat.com>
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: Add support for more vmov-style instructions
+ This commit adds support for a few more vmov instructions:
+ * VMOV[LH|HL]PS
+ * VMOVLPD
+ * VMOVHP[S|D]
+ * VMOVDDUP
+
+ And associated tests. The testsuite had some minor re-working, adding a
+ function to zero buffers, to make later tests less fragile.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for AVX conversion instructions.
+ WIP
+
+ This commit adds support for instructions to convert from one type to
+ another, which are in the form:
+ * VCVTDQ2[PS|PD]
+ * VCVTPS2[DQ|PD]
+ * VCVTPD2[PS|DQ]
+ * VCVTSD2[SI|SS]
+ * VCVTSI2[SS|SD]
+ * VCVTSS2[SD|SI]
+ * VCVTTP[S|D]2DQ
+ * VCVTTS[S|D]2SI
+
+ It also adds support to vpsadbw, since it was trivial and only one
+ instruction. Finally, I have slightly reorder the case statements to
+ keep them in numerical order.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for 'pack' AVX instructions
+ This commit adds support for the following instructions VPACK[S|U]S[WB|DW] and associated tests.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for comis instructions
+ This commit adds support for the following instructions:
+ * VCOMIS[S|D]
+ * VUCOMIS[S|D]
+
+ And associanted tests.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for AVX blend instructions
+ This commit supports for the following instructions:
+ * VBLENDP[S|D]
+ * VBLENDVP[S|D]
+ * VPBLEND[D|W|VB]
+
+ and test them.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support to vinsert and vextract instructions
+ This patch adds support for the following instructions:
+ * VEXTRACT[F128|I128|PS]
+ * VINSERT[F128|I128|PS]
+ * VPEXTR[B|W|D|Q]
+
+ And associated test. For some reason, it seems that the extract
+ instructions deal with the output register as though it was the first
+ source register, so they use ModRM.r/m and VEX.B, instead of the usual
+ ModRM.reg and VEX.R. This meant that the opcode collision with
+ vbroadcastsd wasn't trivial. It can be easily solved by checking the
+ VEX.map_select field, so soslving it was very easy.
+
+ The VPEXTR instructions had several complicated collisions, and notably,
+ vpextrw to a register works completely different to any other
+ instruction in the family, so the code is messy, but it should be
+ correct.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for more AVX broadcast instructions
+ This commit adds support for 3 instructions:
+ * VBROADCASTSS
+ * VBROADCASTSD
+ * VBROADCASTF128
+
+ and extends the function vpbroadcast_test to include these.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for permutation instructions
+ This commit adds recording support for the following instructions:
+ * VPERM2[I|F]128
+ * VPERM[D|Q|PD|PS]
+ * VPERMILP[S|D]
+
+ And associated tests.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: add support for AVX/AVX2 shuffle instructions
+ This commit adds support for the following instructions:
+ * VPSHUF[B|D|HW|LW]
+ * VSHUFP[S|D]
+
+ and the associated test.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: Add support for AVX/AVX2 shift instructions
+ This commit adds record-full support to the following instructions:
+
+ * VPSLL[W|D|Q|DQ]
+ * VPSRL[W|D|Q|DQ]
+ * VPSRA[W|D]
+
+ With both dynamic and constant shifts, and the associated tests.
+ Notably, vpsraq is not available for AVX or AVX2 instruction sets, only
+ AVX512. vpsradq does not seem to be available with any instruction set.
+
+2025-07-11 Guinevere Larsen <guinevere@redhat.com>
+
+ gdb/record: support more AVX arithmetic instructions
+ This commit adds support to the following AVX/AVX2 instructions:
+ * VPADD[B|W|D|Q]
+ * VPMUL[LW|LD|HW|HUW|UDQ]
+ * VXORP[S|D]
+ * VPAND[|N]
+
+ This required some reworking on the loop that processes instruction
+ prefixes, because the opcode for VPMULLD overlapped with a valid
+ instruction prefix. To fix that, rather than using "goto out_prefixes",
+ this commit changes the infinite loop to only run while we don't find
+ another VEX prefix. That should be OK, as the intel manual (page 526 on
+ the March 2024 edition) says that the VEX prefix is always the last one.
+
+2025-07-11 Ezra Sitorus <ezra.sitorus@arm.com>
+
+ aarch64: Support for FEAT_SVE_AES2
+ FEAT_SVE_AES2 implements the SVE multi-vector Advanced Encryption
+ Standard and 128-bit destination element polynomial multiply long
+ instructions, when the PE is not in Streaming SVE mode.
+
+ aarch64: Support for FEAT_LSUI
+ FEAT_LSUI introduces unprivileged variants of load and store instructions so
+ that clearing PSTATE.PAN is never required in privileged software.
+
+2025-07-11 Ezra Sitorus <ezra.sitorus@arm.com>
+
+ aarch64: Support for FEAT_PCDPHINT
+ FEAT_PCDPHINT - Producer-consumer data placement hints - is an optional
+ ISA extension that provides hint instructions to indicate:
+ - a store in the current execution thread is generating data at a specific
+ location, which a thread of execution on one or more other observers is
+ waiting on.
+ - the thread of execution on the current PE will read a location that may not
+ yet have been written with the value to be consumed.
+
+ This extension introduces:
+ - STSHH, a hint instruction, with operands (policies) keep and strm
+ - PRFM *IR*, a new prefetch memory operand.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Announce s390 64-bit (s390x) SFrame V2 support in binutils
+ The preceding commits add s390 64-bit (s390x) support in binutils to
+ generate SFrame stack trace information (.sframe section) in the
+ assembler from CFI directives (with option --gsframe), generate .sframe
+ section for linker-generated .plt section in the linker, and dump SFrame
+ information in objdump and readelf (with option --sframe).
+
+ binutils/
+ * NEWS: Announce s390 64-bit (s390x) SFrame V2 support in
+ as, ld, objdump, and readelf.
+
+ gas/
+ * NEWS: Update s390 64-bit (s390x) SFrame V2 support in
+ assembler.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: sframe: Test handling of .cfi_def_cfa_register
+ Port x86-64 test for handling of .cfi_def_cfa_register from commit
+ 3602da6fa285 ("gas: sframe: fix handling of .cfi_def_cfa_register")
+ to s390x.
+
+ gas/testsuite/
+ PR gas/32879
+ * gas/cfi-sframe/cfi-sframe.exp: Add new test for handling of
+ .cfi_def_cfa_register on s390x.
+ * gas/cfi-sframe/cfi-sframe-s390x-3.d: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-3.s: Likewise.
+
+ Bug: https://sourceware.org/PR32879
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Store SFrame CFA offset adjusted and scaled down
+ In SFrame V2 the size of the offsets following an SFrame FRE can be
+ either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset
+ determining their size:
+ 1. CFA offset from CFA base register
+ 2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved
+ 3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved
+ The FP and RA offsets from CFA, when FP/RA saved on the stack, usually
+ have fixed values that fit into signed 8-bit SFrame offsets. Likewise
+ the DWARF register numbers on s390x of general registers (GR; 0-15) and
+ floating-point registers (FPR; 16-31), when FP/RA saved in registers.
+ With that the CFA offset from CFA base register has the greatest impact
+ on the signed SFrame offset size.
+
+ The s390x ELF ABI defines the stack pointer (SP) to be 8-byte aligned
+ [1] and the CFA as SP at call site + 160 [2]. The CFA offset from CFA
+ base register is therefore always a multiple of 8.
+
+ On s390x store the SFrame CFA offset from CFA base register scaled down
+ by the s390x-specific CFA alignment factor of 8, in addition to the
+ adjustment by the s390x-specific CFA adjustment of -160, to further
+ improve the use of signed 8-bit SFrame offsets. This is similar to the
+ DWARF data alignment factor getting factored out from certain offsets
+ stored in DWARF CFI.
+
+ [1]: s390x ELF ABI, sections "Register Roles" and "Stack Frame
+ Allocation", https://github.com/IBM/s390x-abi/releases
+ [2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
+ https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
+
+ include/
+ * sframe.h (SFRAME_S390X_CFA_OFFSET_ALIGNMENT_FACTOR): Define
+ s390x-specific CFA offset alignment factor.
+ (SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
+ SFRAME_V2_S390X_CFA_OFFSET_DECODE): Scale down/up by
+ SFRAME_S390X_CFA_OFFSET_ALIGNMENT_FACTOR.
+
+ libsframe/
+ * doc/sframe-spec.texi (s390x,
+ SFRAME_S390X_CFA_OFFSET_ALIGNMENT_FACTOR): Document s390x-
+ specific CFA offset alignment factor.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Store SFrame CFA offset adjusted
+ In SFrame V2 the size of the offsets following an SFrame FRE can be
+ either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset
+ determining their size:
+ 1. CFA offset from CFA base register
+ 2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved
+ 3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved
+ The FP and RA offsets from CFA, when FP/RA saved on the stack, usually
+ have fixed values that fit into signed 8-bit SFrame offsets. Likewise
+ the DWARF register numbers on s390x of general registers (GR; 0-15) and
+ floating-point registers (FPR; 16-31), when FP/RA saved in registers.
+ With that the CFA offset from CFA base register has the greatest impact
+ on the signed SFrame offset size.
+
+ The s390x ELF ABI [1] defines the CFA as stack pointer (SP) at call
+ site +160. [2] Therefore the minimum CFA offset from CFA base register
+ on s390x is 160. This does not fit into a signed 8-bit integer and
+ therefore effectively prevents any use of signed 8-bit SFrame offsets
+ on s390x.
+
+ For s390x store the CFA offset from CFA base register adjusted by -160
+ to enable the use of signed 8-bit SFrame offsets.
+
+ [1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases
+ [2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
+ https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
+
+ include/
+ * sframe.h (SFRAME_S390X_CFA_OFFSET_ADJUSTMENT): Define
+ s390x-specific CFA offset adjustment.
+ (SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
+ SFRAME_V2_S390X_CFA_OFFSET_DECODE): New s390x-specific
+ macros. Use SFRAME_S390X_CFA_OFFSET_ADJUSTMENT to en-/decode
+ CFA offset.
+
+ bfd/
+ * elf64-s390.c (elf_s390x_sframe_plt_fre): Use
+ SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it
+ adjusted and switch to 8-bit offsets.
+
+ gas/
+ * gen-sframe.c (sframe_fre_set_cfa_offset): For s390x use
+ SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it
+ adjusted.
+ (sframe_fre_get_cfa_offset): New helper. For s390x use
+ SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its
+ adjustment.
+ (sframe_xlate_do_def_cfa_register): Use new helper
+ sframe_fre_get_cfa_offset.
+
+ libsframe/
+ * sframe.c (sframe_fre_get_cfa_offset): For s390x use
+ SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its
+ adjustment.
+ * doc/sframe-spec.texi (s390x,
+ SFRAME_S390X_CFA_OFFSET_ADJUSTMENT,
+ SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
+ SFRAME_V2_S390X_CFA_OFFSET_DECODE): Document s390x-specific
+ adjustment of CFA offset.
+
+ libsframe/testsuite/
+ * libsframe.find/plt-findfre-2.c (add_plt0_fde, add_pltn_fde):
+ Use SFRAME_V2_S390X_CFA_OFFSET_ENCODE to enable use of 1-byte
+ SFrame offsets.
+
+ Suggested-by: Indu Bhagat <indu.bhagat@oracle.com>
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ libsframe: Add test for PLT0 and PLTN with only one FRE each
+ On s390x the PLT0 and PLTN entries are described with one SFrame FRE
+ each. Add a test case for this particularity.
+
+ libsframe/testsuite/
+ * libsframe.find/find.exp (plt-findfre-2): Add new test.
+ * libsframe.find/plt-findfre-2.c: New test for PLT0 and PLTN
+ with only one FRE each.
+ * libsframe.find/local.mk (plt-findfre-2): Add new test.
+
+ libsframe/
+ * Makefile.in: Regenerate.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Add SFrame stack trace information for .plt section
+ Enable SFrame stack tracing through PLT entries. Based on x86-64.
+
+ On s390x both PLT0 and PLTn entries are 32-bytes in size. Their code
+ neither alters the stack pointer (SP), frame pointer (FP), nor return
+ address (RA) registers. Therefore the PLT0 can be represented using
+ a SFrame FDE of type PCINC with a single SFrame FRE and the PLTn can
+ be represented using a SFrame FDE of type PCMASK, with a repetition
+ block size of 32 (PLTn size), and a single SFrame FRE.
+
+ Note that as both the PLT0 entry and the PLTn entries have equal size
+ and could both be represented using the identical SFrame FRE, the whole
+ .plt section on s390x could be represented using a single SFrame FDE of
+ type PCMASK, with a repetition block size of 32 (PLT0 and PLTn size),
+ and a single SFrame FRE. Keep the x86-64 logic with separate SFrame
+ FDEs for PLT0 and PLTn, to ease potential generalization of the .sframe
+ for .plt generation logic among architectures.
+
+ bfd/
+ * elf64-s390.c: Include sframe.h and sframe-api.h.
+ (PLT_SFRAME_FDE_START_OFFSET, SFRAME_PLT0_MAX_NUM_FRES,
+ SFRAME_PLTN_MAX_NUM_FRES, elf_s390x_sframe_plt_fre,
+ elf_s390x_sframe_plt): New .sframe template for .plt section.
+ (elf_s390_link_hash_table): Add plt_cfe_ctx, plt_sframe, and
+ sframe_plt fields.
+ (_bfd_s390_elf_create_sframe_plt): New function. Fill in
+ .sframe section for .plt section.
+ (_bfd_s390_elf_write_sframe_plt): New function. Write .sframe
+ section.
+ (elf_s390_create_dynamic_sections): Create .sframe section for
+ .plt section.
+ (elf_s390_late_size_sections): Call
+ _bfd_s390_elf_create_sframe_plt and
+ _bfd_s390_elf_write_sframe_plt.
+ (elf_s390_finish_dynamic_sections): Write .plt section start
+ into .sframe FDE covering .plt section. Call
+ _bfd_elf_merge_section_sframe on htab->plt_sframe.
+
+ ld/
+ * NEWS: Add news entry.
+
+ ld/testsuite/
+ * ld-s390/s390.exp: Add new test.
+ * ld-s390/sframe-plt-1.d: New linker-generated .sframe for .plt
+ test.
+ * ld-s390/sframe-simple-1.d: Adjust expected test output due to
+ linker-generated .sframe for .plt.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Represent FP without RA saved in SFrame
+ If an architecture uses both SFrame RA and FP tracking SFrame assumes
+ that the RA offset is the 2nd offset and the FP offset is the 3rd offset
+ following a SFrame FRE. An architecture does not necessarily need to
+ save both on the stack (or in register) at the same time or even at all.
+ SFrame cannot represent FP without RA saved on stack (or in a register),
+ since it cannot distinguish whether the 2nd offset is the RA or FP
+ offset.
+
+ For s390x use an invalid SFrame RA offset from CFA value of zero as
+ padding to represent the FP being saved when the RA is not saved. This
+ aligns with the existing invalid SFrame fixed RA offset from CFA value
+ of zero. In a stack tracer this then also naturally falls into place,
+ as it can skip restoring the RA in the topmost frame, if both the fixed
+ RA offset (from SFrame header) and the RA offset (from FDE) are zero,
+ without any need to test architecture-specific flags.
+
+ include/
+ * sframe.h (SFRAME_FRE_RA_OFFSET_INVALID): New define. Used as
+ padding offset.
+ * sframe-api.h (sframe_fre_get_ra_offset): Add comment that for
+ s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates
+ that the RA is not saved.
+
+ gas/
+ * gen-sframe.c (get_fre_num_offsets): For s390x account padding
+ RA offset, if FP without RA saved.
+ (sframe_get_fre_offset_size): Likewise.
+ (output_sframe_row_entry): For s390x write a padding RA offset,
+ if FP without RA needs to be represented.
+ (sframe_do_fde): Enable FP without RA saved to be represented
+ on s390x.
+
+ libsframe/
+ * sframe.c (sframe_fre_get_ra_offset): Add comment that for
+ s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates
+ that the RA is not saved.
+ * sframe-dump.c (dump_sframe_func_with_fres): Treat invalid
+ RA offsets as if they were undefined. Display them as "U"
+ to distinguish them.
+ * doc/sframe-spec.texi (s390x): Document s390x-specific use of
+ SFRAME_FRE_RA_OFFSET_INVALID to represent FP without RA saved.
+
+ gas/testsuite/
+ * gas/cfi-sframe/cfi-sframe.exp: Rename s390x-specific tests.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Rename
+ to ...
+ * cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-2.s: This.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-2.d: Likewise.
+ Update test verification pattern accordingly.
+ * cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s: Rename
+ to ...
+ * cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-2.s: This.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-2.d: Likewise.
+ Update test verification pattern accordingly.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Represent FP/RA saved in register in SFrame
+ GCC on s390x, when in a leaf function, can be observed to save the
+ frame pointer (FP) and/or return address (RA) register in a floating-
+ point registers (FPR) instead of on the stack. This is declared using
+ the following CFI directive:
+
+ .cfi_register <fp/ra-regnum>, <fpr-regnum>
+
+ SFrame cannot represent the FP and/or RA being saved in another
+ register. It does only track the CFA base register (SP/FP), CFA offset
+ from CFA base register, and FP and RA save area offsets from CFA.
+
+ On s390x the FP and/or RA are only saved in another FPR when in a leaf
+ function. That is a function that does not call any other function.
+ Therefore it can ever only be the topmost function in a call chain.
+ An unwinder by default has access to all registers of the function that
+ is the topmost on the call stack. Therefore no further information
+ is required to restore FP/RA from the FPR.
+
+ Represent FP/RA saved in another register on s390x, by encoding the
+ DWARF register number shifted by one to the left with the least-
+ significant bit set in the offset as follows:
+
+ offset = (regnum << 1) | 1
+
+ The use of the least-significant bit of the offset as indication is
+ possible, as the stack pointer (SP), the CFA, and any register save
+ area slots are 8-byte aligned according to the s390x ELF ABI:
+ - The stack pointer (SP) "shall maintain an 8-byte alignment". [1]
+ - The CFA is defined as SP at call site +160. [2]
+ - Pointers and 8-byte integers, such as general register values, must
+ be 8-byte aligned. [3]
+ SFrame FP and RA stack offsets must therefore always be a multiple of
+ 8 on s390x. Note that for the same reason the DWARF data alignment
+ factor is -8 on s390x (see DWARF2_CIE_DATA_ALIGNMENT).
+
+ Add s390x-specific SFrame (error) tests for FP/RA saved in FPRs in leaf
+ function.
+
+ [1]: s390x ELF ABI, sections "Register Roles" and "Stack Frame
+ Allocation", https://github.com/IBM/s390x-abi/releases
+ [2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
+ https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
+ [3]: s390x ELF ABI, section "Fundamental Types", table "Scalar types",
+ https://github.com/IBM/s390x-abi/releases
+
+ include/
+ * sframe.h (SFRAME_V2_S390X_OFFSET_IS_REGNUM): New s390x-
+ specific macro to test whether an SFrame FP/RA offset is a DWARF
+ register number.
+ (SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM): New s390x-specific macro
+ to encode a DWARF register number into an SFrame FP/RA offset.
+ (SFRAME_V2_S390X_OFFSET_DECODE_REGNUM): New s390x-specific macro
+ to decode an SFrame FP/RA offset into a DWARF register number.
+ * sframe-api.h (sframe_fre_get_fp_offset,
+ sframe_fre_get_fp_offset): Add comment that for s390x the offset
+ may be an encoded register number.
+
+ gas/
+ * gen-sframe.c (s390_sframe_xlate_do_register): New S390-
+ specific function. Uses SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM to
+ represent FP/RA saved in another register on s390x.
+ (sframe_xlate_do_register): Invoke s390_sframe_xlate_do_register
+ on s390x.
+
+ libsframe/
+ * sframe.c (sframe_fre_get_fp_offset, sframe_fre_get_fp_offset):
+ Add comment that for s390x the offset may be an encoded register
+ number.
+ * sframe-dump.c (is_sframe_abi_arch_s390x): New helper to test
+ whether ABI/arch is s390x.
+ (dump_sframe_func_with_fres): Use
+ SFRAME_V2_S390X_OFFSET_IS_REGNUM and
+ SFRAME_V2_S390X_OFFSET_DECODE_REGNUM to dump FP/RA saved in
+ another register on s390x.
+ * doc/sframe-spec.texi (s390x): Document s390x-specific
+ representation of FP/RA saved in another register.
+
+ gas/testsuite/
+ * gas/cfi-sframe/cfi-sframe.exp: Update s390x-specific SFrame
+ (error) tests.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s: Rename
+ to ...
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d:
+ Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.s: This. Test
+ no longer triggers a warning, as SFrame can represent FP and RA
+ saved in registers.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.d: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Test
+ now triggers a different warning, as SFrame can represent FP and
+ RA saved in registers, but not FP without RA saved in register.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Initial support to generate .sframe from CFI directives in assembler
+ This introduces initial support to generate .sframe from CFI directives
+ in assembler on s390 64-bit (s390x). Due to SFrame V2 format
+ limitations it has the following limitations, some of them getting
+ addressed by subsequent patches, which cause generation of SFrame FDE
+ to be skipped:
+
+ - SFrame FP/RA tracking only supports register contents being saved on
+ the stack (i.e. .cfi_offset). It does not support FP/RA register
+ contents being saved in other registers (i.e. .cfi_register). GCC on
+ s390x can be observed to save the FP/RA register contents in floating-
+ point registers, but only in leaf functions.
+ This issue is detailed further and resolved in the subsequent commit
+ "s390: Represent FP/RA saved in register in SFrame".
+
+ - SFrame FP/RA tracking cannot represent FP without RA saved. This is
+ because the format assumes SFrame FDE offset2 to be the RA offset, if
+ there are two offsets, and offset3 to be the FP offset, if there are
+ three offsets. There is no mean to distinguish whether offset2 is the
+ RA or FP offset, if there are only two offsets.
+ This issue is detailed further and resolved in the subsequent commit
+ "s390: Represent FP without RA saved in SFrame".
+
+ - SFrame assumes a dedicated FP register number. The s390x ELF ABI [1]
+ does only designate register 11 as preferred FP register number. In
+ general GCC and Clang on s390x use register 11 as frame pointer.
+ GCC on s390x can be observed to use register 14 as frame pointer in
+ the stack clash protector in the function prologue.
+ glibc on s390x contains hand-written assembler code that uses
+ register 12 as frame pointer.
+
+ This s390x support is largely based on the AArch64 support from commit
+ b52c4ee46657 ("gas: generate .sframe from CFI directives").
+
+ The SFrame ABI/arch identifier SFRAME_ABI_S390X_ENDIAN_BIG is introduced
+ for s390x and added to the SFrame format specification.
+
+ The s390x ELF ABI [1] specifies the following C calling conventions for
+ s390x architecture:
+ - Register 15 is the stack pointer (SP).
+ - Register 14 contains the return address (RA) at function entry.
+ - There is no dedicated frame pointer register. Register 11 is the
+ preferred frame pointer (FP). [2] GCC and Clang in general use
+ register 11 as frame pointer.
+ - The CFA is defined as SP at call site +160. [3] The SP at call site
+ can therefore be derived from the CFA using a SP value offset from CFA
+ of -160.
+
+ The s390x ELF ABI [1] does not assign any standard save slot to each
+ register in the register save area of a stack frame. Neither the
+ return address (RA, r14) nor preferred frame pointer (FP, r11)
+ necessarily need to be saved. Therefore SFrame RA and FP tracking is
+ used.
+
+ Support for SFrame on s390 is only enabled for the 64-bit s390x ELF ABI
+ (z/Architecture with 64-bit addressing mode). It is disabled for the
+ 32-bit s390 ELF ABI (ESA/390 or z/Architecture with 32-bit addressing
+ mode).
+
+ s390x-specific SFrame assembler and linker tests are added, including
+ error tests for use of a non-preferred frame pointer (FP) register and
+ specification of a non-default return address (RA) register.
+
+ [1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases
+ [2]: s390x ELF ABI, commit f00421825979 ("Add information about the frame
+ pointer register"),
+ https://github.com/IBM/s390x-abi/commit/f00421825979
+ [3]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
+ https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
+
+ include/
+ * sframe.h: Add reference to s390x architecture in comments.
+ (SFRAME_ABI_S390X_ENDIAN_BIG): Define SFrame ABI/arch identifier
+ for s390x.
+ (SFRAME_S390X_SP_VAL_OFFSET): Define s390x-specific SP value
+ offset from CFA.
+
+ libsframe/
+ * sframe.c (need_swapping): Add SFRAME_ABI_S390X_ENDIAN_BIG.
+ * doc/sframe-spec.texi (SFRAME_ABI_S390X_ENDIAN_BIG, s390x,
+ SFRAME_S390X_SP_VAL_OFFSET): Document SFrame ABI/arch identifier
+ for s390x, add references to s390x architecture, and document
+ s390x-specifics, such as the SP value offset from CFA of -160.
+
+ gas/
+ * config/tc-s390.h: s390x support to generate .sframe from CFI
+ directives in assembler.
+ (support_sframe_p): Define.
+ (SFRAME_CFA_SP_REG, SFRAME_CFA_FP_REG, SFRAME_CFA_RA_REG):
+ Define.
+ (sframe_ra_tracking_p): Define.
+ (sframe_cfa_ra_offset): Define.
+ (sframe_get_abi_arch): Define.
+ * config/tc-s390.c: s390x support to generate .sframe from CFI
+ directives in assembler.
+ (s390_sframe_cfa_sp_reg, s390_sframe_cfa_fp_reg,
+ s390_sframe_cfa_ra_reg): New. Initialize to DWARF register
+ numbers of stack pointer (SP, r15), preferred frame pointer
+ (FP, r11), and return address (RA, r14) registers.
+ (s390_support_sframe_p): New function. Return true if s390x.
+ (s390_sframe_ra_tracking_p): New function. Return true.
+ (s390_sframe_cfa_ra_offset): New function. Return
+ SFRAME_CFA_FIXED_RA_INVALID.
+ (s390_sframe_get_abi_arch): New function. Return
+ SFRAME_ABI_S390X_ENDIAN_BIG if s390x, otherwise zero.
+ * gen-sframe.c: Add reference to s390x architecture in comments.
+ (sframe_xlate_do_val_offset): Add support for s390x-specific
+ SFRAME_S390X_SP_VAL_OFFSET.
+ * NEWS: Add news entry.
+
+ gas/testsuite/
+ * gas/cfi-sframe/cfi-sframe.exp: Enable common SFrame tests for
+ s390x. Add s390x-specific SFrame (error) tests.
+ * gas/cfi-sframe/cfi-sframe-s390x-1.d: New s390x-specific SFrame
+ test.
+ * gas/cfi-sframe/cfi-sframe-s390x-1.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-2.d: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-2.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-err-1.d: New s390x-specific
+ SFrame error test that uses a non-default frame-pointer register
+ as CFA base register.
+ * gas/cfi-sframe/cfi-sframe-s390x-err-1.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-err-2.d: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-err-2.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-err-3.d: New s390x-specific
+ SFrame error test that uses a non-default return address
+ register.
+ * gas/cfi-sframe/cfi-sframe-s390x-err-3.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.d: New s390x-
+ specific SFrame test that saves RA and FP individually on the
+ stack.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: New
+ s390x-specific SFrame error test that saves FP and RA
+ individually, to trigger FP without RA saved.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: New
+ s390x-specific SFrame error test that saves FP and RA
+ individually in registers.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s:
+ Likewise.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d: New
+ s390x-specific SFrame error test that saves RA and FP
+ individually in registers.
+ * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s:
+ Likewise.
+
+ ld/testsuite/
+ * ld-s390/s390.exp: Add simple SFrame test.
+ * ld-s390/sframe-simple-1.d: New simple SFrame test.
+ * ld-s390/sframe-bar.s: Likewise.
+ * ld-s390/sframe-foo.s: Likewise.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ s390: Explicitly list linker dump tests
+ Generating the linker dump test list using file globbing makes it
+ difficult to exclude specific tests under certain circumstances. List
+ them explicitly instead. This enables to add tests in the future that
+ can be excluded. While at it reorganize how s390 linker tests get
+ run for s390x.
+
+ ld/testsuite/
+ * ld-s390/s390.exp: Reorganize and explicitly list linker dump
+ tests.
+
+2025-07-11 Jens Remus <jremus@linux.ibm.com>
+
+ sframe: Ignore section padding when converting endianness
+ The .sframe section may have a trailing padding due to the architecture-
+ specific default section alignment. Do not treat this padding as error
+ when converting between target and host endianness.
+
+ This can be observed when building Binutils with SFrame s390x support on
+ x86-64 for s390x using configure option "--target=s390x-ibm-linux-gnu"
+ and running the GAS test suite.
+
+ While at it reuse the determined SFrame section header size.
+
+ libsframe/
+ * sframe.c (flip_sframe): Ignore .sframe section padding. Reuse
+ SFrame header size.
+
+ Reported-by: Indu Bhagat <indu.bhagat@oracle.com>
+
+2025-07-11 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-10 Alan Modra <amodra@gmail.com>
+
+ AM_PO_SUBDIRS
+ Swap AM_PO_SUBDIRS and ZW_GNU_GETTEXT_SISTER_DIR lines in
+ */configure.ac. ZW_GNU_GETTEXT_SISTER_DIR indirectly invokes
+ AC_REQUIRE(AM_PO_SUBDIRS) so results in AM_PO_SUBDIRS being emitted
+ before ZW_GNU_GETTEXT_SISTER_DIR if it hasn't already been invoked.
+
+2025-07-10 Alan Modra <amodra@gmail.com>
+
+ gas v850 md_convert_frag
+ The v850 md_convert_frag function oddly calls subseg_change twice
+ (commit 1cd986c58543). Neither call is needed, because that is done
+ in size_seg.
+
+ Convert the fr_opcode fixup field back (to an opindex, not fx_r_type)
+ using a cast rather than a union, since we used casts when setting up
+ those values. I guess the union was added to silence compiler
+ warnings about wrong-size casts, but unfortunately results in the
+ wrong value being retrieved on big-endian hosts.
+
+ Change "buffer" to a char* as there is no need to make it an
+ unsigned char*, and that way requires fewer casts. Finally, fix
+ formatting and use uintptr_t when make the rs_machine_dependent frags.
+
+ Remove subseg_change calls from cr16, crx, mn10200, mn10300, and sh
+ md_convert_frag too.
+
+2025-07-10 Alan Modra <amodra@gmail.com>
+
+ union alpha_macro_arg
+ Rename the old enum alpha_macro_arg to alpha_macro_argset, and create
+ a union alpha_macro_arg to use in all the alpha_macro.emit functions.
+ This avoids intptr_t casts on retrieving index values and void* casts
+ on storing them in the alpha_macros array.
+
+2025-07-10 Nelson Chu <nelson@rivosinc.com>
+
+ sim: riscv: Fix build issue due to INSN_CLASS_C was changed to INSN_CLASS_ZCA
+
+2025-07-10 Matthieu Longo <matthieu.longo@arm.com>
+
+ libiberty: sync with gcc
+ Import the following commits from GCC as of r16-2170-g2f2e9bcfb0fd9c:
+ 0fd98b6f9f2 libiberty: add routines to handle type-sensitive doubly linked lists
+
+2025-07-10 Nelson Chu <nelson@rivosinc.com>
+
+ RISC-V: Fixed wrong imply result for zce when -march=rv32id_zce
+ The entry of "zce imply zcf" needs check_implicit_for_zcf, so it needs to be
+ placed after the entries of "whatever imply f". Otherwise the implicit zcf
+ may be missed. Also merge the march-implu-zce* testcases into imply testcases.
+
+2025-07-10 Nelson Chu <nelson@rivosinc.com>
+
+ RISC-V: Clarify the imply rule of c
+ This also fix the imply result for .option rvc.
+
+ Imply zcf when c and f and rv32
+ Imply zcd when c and d
+ Imply zca when c
+
+ Changed INSN_CLASS_C to INSN_CLASS_ZCA
+ Changed INSN_CLASS_F_AND_C to INSN_CLASS_ZCF
+ Changed INSN_CLASS_D_AND_C to INSN_CLASS_ZCD
+ Changed INSN_CLASS_ZIHINTNTL_AND_C to INSN_CLASS_ZIHINTNTL_AND_ZCA
+
+2025-07-10 Nelson Chu <nelson@rivosinc.com>
+
+ RISC-V: Deprecate ".option arch, -ext" for users due to its controversial use
+ Before we figure out the whole remove situations for ".option arch, -ext", and
+ have any RISC-V public spec defines it, we should just deprecate it.
+
+2025-07-10 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-09 Indu Bhagat <indu.bhagat@oracle.com>
+
+ gas: ld: sframe: add new internal header
+ for SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS.
+
+ The intention of creating an abstraction like
+ SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS is to address the concern that there
+ should be a central place to enforce harmonious flags between GNU as and
+ ld. At the moment, the only flag that needs to be enforced is
+ SFRAME_F_FDE_FUNC_START_PCREL.
+
+ sframe.h and sframe-api.h are installed headers by libsframe for the
+ specification and implementation respectively. Adding a definition like
+ SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS does not fit in either. Create a
+ new internal header instead to keep the definition uncoupled from
+ sframe.h and sframe-api.h. Rename the previously added
+ SFRAME_F_LD_MUSTHAVE_FLAGS to define the new
+ SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS.
+
+ bfd/
+ * elf-sframe.c (_bfd_elf_merge_section_sframe): Use the new
+ internal header and SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS.
+ gas/
+ * gen-sframe.c (output_sframe_internal): Likewise.
+ include/
+ * sframe-api.h (SFRAME_F_LD_MUSTHAVE_FLAGS): Move from..
+ * sframe-internal.h: ..to here. New file.
+
+2025-07-09 Alan Modra <amodra@gmail.com>
+
+ Merge init_private_section_data with copy_private_section_data
+ init_private_section_data is used by the linker and is a special case
+ of copy_private_section_data that copies a reduced set of section data
+ from input to output. Merge the two functions, adding a link_info
+ param to copy_private_section_data and remove init_private_section_data.
+
+ gas remove assorted unnecessary casts
+ This continues the saga of removing unnecessary casts, and making
+ small code tidies in gas. Hopefully this sees the last of K&R
+ anachronisms.
+
+ gas standardise md_section_align
+ The point here is that when valueT is 64 bits and int is 32 bits,
+ 1 << align doesn't work for shifts larger than the size of int. (Not
+ that anyone is likely to use such large alignments in real code.)
+
+ gas function arg casts
+ This patch removes more unnecessary arg casts in various function
+ calls.
+
+ gas fixups
+ Remove unnecessary arg casts in fix_new and similar calls.
+
+ gas char/unsigned char casts
+ This patch removes many unneeded casts to char or unsigned char. It's
+ worth noting that safe-ctype.h macros ISDIGIT and the like cope with
+ either signed or unsigned char.
+ In some cases a cast to unsigned char is replaced by anding with 0xff,
+ which accomplishes the same thing but doesn't rely on char being eight
+ bits. The patch also removes pointer casts, and a few unsigned char
+ pointer variables.
+
+ gas alpha sign extension macros
+ Use standard sign extend and range checking using unsigned
+ expressions that don't rely on implementation defined right shifts or
+ size of short and int.
+
+2025-07-09 Alan Modra <amodra@gmail.com>
+
+ gas md_number_to_chars
+ Calls to md_number_to_chars don't need to cast their value arg (*).
+ Remove those casts. avr_output_property_recode made a call to
+ md_number_to_chars with size of 1. Simplify that. tc-bpf.c
+ md_convert_frag used write_insn_bytes that simply copied input to
+ output. Dispense with that nonsense, and similarly in a couple of
+ other places where md_number_to_chars was called with size 1.
+
+ *) unless the value arg is an expression that needs a cast, eg. tic54x
+ emit_insn where the shift left could trigger signed overflow UB
+ without a cast.
+
+2025-07-09 Alan Modra <amodra@gmail.com>
+
+ z8k opcode_entry_type
+ z8k opcode_entry_type.func is never used as a function pointer, only
+ as a pointer to a pseudo_typeS. Change it to a void*.
+
+ gas various other void* casts
+ This removes assorted unneeded casts of void* pointers, and casts when
+ passing args to void* parameters or storing to void* pointers. The
+ patch also changes obj-coff.c stack_push to take a void* parameter,
+ and replaces an odd memcpy in tc-metag.c find_insn_templates with a
+ simple assignment.
+
+ gas various other const pointer changes
+ This removes a bunch of casts involving const pointers, in some cases
+ by making variables const pointers so a cast is not needed. In a
+ couple of places the cast hid errors with "&array" written rather than
+ "array", see iq2000_macro_defs and s_pru_align. tc-xgate.c cmp_opcode
+ is changed to be the standard qsort predicate to avoid a function
+ cast.
+
+ gas d30v_insn plus other non-const pointers
+ d30v has a bunch of casts that are only needed due to various types
+ missing a const. Fix that.
+
+ gas alloc casts
+ All of the various memory allocation function return a "void *"
+ pointer, which needs no cast to assign to other pointer types.
+
+ gas bfd_put and bfd_get arg casts
+ bfd_{h_,}put_* and bfd_{h_,}get_* have "void *" pointer params
+ nowadays. We don't need casts on their pointer args. We also don't
+ need to cast values passed to bfd_put.
+
+ gas NULL casts
+ This removes many unnecessary NULL casts. I'm also adding a few arg
+ casts in concat calls, to make the code consistent. Advice from quite
+ a few years ago was that it's better to use the exact type for args
+ corresponding to function ellipses, in case NULL is defined as plain
+ 0. (I think that happened with some early 64-bit systems. Plain NULL
+ ought to be OK nowadays.)
+
+ gas s3_FAIL and s7_FAIL
+ s3_FAIL is defined as 0x80000000 which is unsigned, but everywhere it
+ is used it is cast to int. Get rid of that silliness, and likewise
+ for s7_FAIL.
+
+ gas more enum casts
+ Remove more unnecessary enum casts.
+
+ gas bfd_reloc_code_real_type
+ Enumeration constants are integer types, so there should be no need to
+ cast such constants to int in expressions. (Perhaps some older gccs
+ warned, I checked back to gcc-4.5.) Remove some of those unnecessary
+ casts. Also remove unnecessary casts to bfd_reloc_code_real_type.
+
+ gas add_ecoff_symbol
+ * ecoff.c: Remove unnecessary arg casts in add_ecoff_symbol
+ calls throughout file.
+
+2025-07-09 Alan Modra <amodra@gmail.com>
+
+ gas frag_var
+ Many frag_var calls have unnecessary casts on arguments, no doubt from
+ the days when binutils was written for K&R C. (ie. functions were not
+ prototyped so you needed to cast anything that didn't match the
+ expected type after default promotions, as you still do for args
+ matching a function ellipsis.) Remove those casts.
+
+ * config/tc-alpha.c (s_alpha_comm): Use offset_T for cur_size
+ to avoid need for casts. Remove casts from frag_var args.
+ * config/tc-ia64.c (obj_elf_vms_common): Remove casts from
+ frag_var args.
+ * config/tc-m32r.c (m32r_scomm): Likewise.
+ * config/tc-m68hc11.c (build_jump_insn): Likewise.
+ (build_dbranch_insn): Likewise.
+ * config/tc-m68k.c (md_assemble): Likewise.
+ * config/tc-microblaze.c (microblaze_s_lcomm): Likewise.
+ * config/tc-mmix.c (s_loc): Likewise.
+ * config/tc-ppc.c (ppc_elf_lcomm, ppc_comm): Likewise.
+ * config/tc-score.c (s3_s_score_lcomm): Likewise.
+ * config/tc-score7.c (s7_s_score_lcomm): Likewise.
+ * config/tc-sh.c (sh_cons_align): Likewise.
+ * config/tc-sparc.c (s_reserve, s_common): Likewise.
+ (sparc_cons_align): Likewise.
+ * config/tc-tic4x.c (tic4x_seg_alloc, tic4x_bss): Likewise.
+ * config/tc-tic54x.c (tic54x_bss, tic54x_space): Likewise.
+ (tic54x_usect, tic54x_field): Likewise.
+ * config/tc-tic6x.c (s_tic6x_scomm): Likewise.
+ * config/tc-v850.c (v850_offset, v850_comm): Likewise.
+ * frags.c (frag_align, frag_align_pattern, frag_align_code): Likewise.
+ * gen-sframe.c (output_sframe_row_entry): Likewise.
+ (output_sframe_funcdesc): Likewise.
+ * read.c (s_fill, do_org, s_space, emit_leb128_expr): Likewise.
+ * symbols.c (colon)): Likewise.
+
+2025-07-09 Alan Modra <amodra@gmail.com>
+
+ gas pointer to int and vice versa
+ Use "intptr_t" or "uintptr_t" for these conversions, not "long" which
+ is wrong on LLP64 systems, or "size_t" which is better but still not
+ the correct type.
+
+ * config/tc-alpha.c (emit_ldXu, emit_ldX, emit_uldXu, emit_uldX),
+ (emit_stX, emit_ustX, emit_sextX): Use correct type when
+ converting vlgsize pointer to in. Use "int" rather than
+ "long" for result.
+ * config/tc-ia64.c (generate_unwind_image): Use intptr_t cast
+ when passing personality_routine to frag_var.
+ * config/tc-ppc.c (ppc_frob_symbol <coff>): Use uintptr_t cast
+ when converting symbol pointer to valueT.
+ * config/tc-v850.c (md_assemble): Use intptr_t cast when
+ loading integer opindex.
+
+2025-07-09 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-08 Alice Carlotti <alice.carlotti@arm.com>
+
+ aarch64: Add support for FEAT_SVE2p2 and FEAT_SME2p2
+
+ aarch64: Reorder virtual feature dependencies
+ This will improve readability when more combinations of "SVE* or SME*"
+ are added.
+
+2025-07-08 First Last <ghodawalaaman2@disroot.org>
+
+ gdb/reverse: Add 2 AVX instructions VADDSUBPS and VADDSUBPD
+ add support to recording 2 missing AVX instructions: vaddsubps and vaddsubpd, and add associated tests.
+
+ Approved-By: Guinevere Larsen <guinevere@redhat.com>
+
+2025-07-08 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+
+ gprofng: support external debug info
+ Use bfd_follow_gnu_debuglink() and bfd_follow_gnu_debugaltlink() to find files
+ with debug info.
+ If necessary, gprofng-archive copies these files to EXP/archives.
+
+ For each executable, gprofng creates the Elf class twice.
+ One of them was a memory leak.
+ Fixed this by adding a new argument to Stabs::Stabs().
+
+ gprofng/ChangeLog
+ 2025-07-07 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+
+ PR 32147
+ PR 30194
+ * src/Disasm.cc (get_funcname_in_plt): Use the executable file instead
+ of the debug information file.
+ * src/Dwarf.h: Define debug_alt_strSec.
+ * src/DwarfLib.cc: Add support for DW_FORM_GNU_ref_alt,
+ DW_FORM_GNU_strp_alt.
+ * src/Elf.h (find_gnu_debug_files, get_dwr_section): New functions.
+ * src/Elf.cc: Likewise.
+ * src/Experiment.cc (copy_file): Add the const qualifier.
+ * src/Experiment.h: Likewise.
+ * src/LoadObject.cc (get_elf, openDebugInfo): Find files with debug info.
+ * src/LoadObject.h: Remove unused variables.
+ * src/Module.cc: Remove an argument in openDebugInfo().
+ * src/Stabs.cc (Stabs::Stabs): Add the Elf* argument.
+ * src/Stabs.h: Likewise.
+ * src/gp-archive.cc: Archive files with debug info.
+ * src/gp-archive.h (archive_file): New function.
+
+2025-07-08 Tom Tromey <tromey@adacore.com>
+
+ Fix wchar.exp test case per review
+ A recent patch of mine modified wchar.exp, but I failed to notice one
+ part of the review. This patch updates the code to conform to the
+ review comments.
+
+2025-07-08 Nick Clifton <nickc@redhat.com>
+
+ New Malay translation for bfd/ and new Spanish translation for gas/
+
+2025-07-08 Mark Goncharov <mark.goncharov@syntacore.com>
+
+ RISC-V: Fix libpath_suffix selection for ldscript
+ When building a cross-compiler ld for RISC-V Linux systems, you can specify
+ target=riscv64*-linux* to create a linker that supports both 32-bit
+ (-march=rv32*) and 64-bit (-march=rv64*) architectures. The specified -march
+ value populates the EMULATION_NAME variable, which determines the default
+ linker script selection. For proper riscv64 target support, the build process
+ must prepare both elf32lriscv* and elf64lriscv* linker scripts. These should
+ align with the standard RISC-V Linux sysroot directory structure.
+
+2025-07-08 Nelson Chu <nelson@rivosinc.com>
+
+ RISC-V: Fixed mapping symbol for .option norvc directive
+
+ RISC-V: Fixed dis-assembler to set correct xlen from mapping symbol
+
+ RISC-V: Fixed that .option push/pop won't recover the xlen
+
+ RISC-V: Added testcase to show the current rvc and xlen problems
+
+2025-07-08 Linsen Zhou <i@lin.moe>
+
+ RISC-V: Bind defined symbol locally in PIE
+ Reference commit 1dcb9720d62cd053a72c31881b7724ce9f74332c
+
+ bfd/
+ * elfnn-riscv.c (RISCV_COPY_INPUT_RELOC): Bind defined symbol
+ locally in PIE.
+
+ ld/
+ * testsuite/ld-riscv-elf/pie-bind-locally-a.s: New test source.
+ * testsuite/ld-riscv-elf/pie-bind-locally-b.s: Likewise.
+ * testsuite/ld-riscv-elf/pie-bind-locally-rv32.d: New testcase.
+ * testsuite/ld-riscv-elf/pie-bind-locally-rv64.d: Likewise.
+
+2025-07-08 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-07 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+
+ gprofng: remove ElfReloc class and unused functions and declarations
+ class ElfReloc is not used after we started use libbfd.
+ Removed ElfReloc and other unused declarations.
+
+ gprofng/ChangeLog
+ 2025-07-03 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+
+ * src/Disasm.cc: Remove unused functions and variables.
+ * src/Disasm.h: Likewise.
+ * src/Dwarf.cc: Likewise.
+ * src/DwarfLib.cc: Likewise.
+ * src/DwarfLib.h: Likewise.
+ * src/Elf.cc: Likewise.
+ * src/Elf.h: Likewise.
+ * src/Stabs.cc: Likewise.
+ * src/Stabs.h: Likewise.
+
+2025-07-07 Tom Tromey <tromey@adacore.com>
+
+ Correctly handle L'\\'
+ Hannes filed a bug that pointed out that:
+
+ print L'\\'
+
+ ... did not work correctly. The bug is in convert_escape, which
+ simply transcribes the backslash character, rather than convert it
+ between encodings.
+
+ This patch fixes the error. I also turned a macro into a lambda to
+ clean up this code a little.
+
+ Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=33124
+ Reviewed-By: Tom de Vries <tdevries@suse.de>
+ Tested-By: Hannes Domani <ssbssa@yahoo.de>
+
+2025-07-07 WANG Xuerui <git@xen0n.name>
+
+ LoongArch: Allow to relax instructions into NOPs after handling alignment
+ Right now, LoongArch linker relaxation is 2-pass, since after alignment
+ is done, byte deletion can no longer happen. However, as the alignment
+ pass also shrinks text sections, new relaxation chances may well be
+ created after alignment is done. Although at this point we can no longer
+ delete unused instructions without disturbing alignment, we can still
+ replace them with NOPs; popular LoongArch micro-architectures can
+ eliminate NOPs during execution, so we can expect a (very) slight
+ performance improvement from those late-created relaxation chances.
+
+ To achieve this, the number of relax passes is raised to 3 for
+ LoongArch, and every relaxation handler except loongarch_relax_align is
+ migrated to a new helper loongarch_relax_delete_or_nop, that either
+ deletes bytes or fills the bytes to be "deleted" with NOPs, depending on
+ whether the containing section already has undergone alignment. Also,
+ since no byte can be deleted during this relax pass, in the pass the
+ pending_delete_ops structure is no longer allocated, and
+ loongarch_calc_relaxed_addr(x) degrades to the trivial "return x" in
+ this case.
+
+ In addition, previously when calculating distances to symbols, an
+ extra segment alignment must be considered, because alignment may
+ increase distance between sites. However in the newly added 3rd pass
+ code size can no longer increase for "closed" sections, so we can skip
+ the adjustment for them to allow for a few more relaxation chances.
+
+ A simple way to roughly measure this change's effectiveness is to check
+ how many pcalau12i + addi.d pairs are relaxed into pcaddi's. Taking a
+ Firefox 140.0.2 test build of mine as an example:
+
+ Before: 47842 pcaddi's in libxul.so
+ After: 48089
+
+ This is a 0.5% increase, which is kind of acceptable for a peephole
+ optimization like this; of which 9 are due to the "relax"ed symbol
+ distance treatment.
+
+2025-07-07 GDB Administrator <gdbadmin@sourceware.org>
+
+ Automatic date update in version.in
+
+2025-07-06 Jens Remus <jremus@linux.ibm.com>
+
+ ld: bfd: sframe: Update section size also for relocatable links
+ For relocatable links the output .sframe section size may be wrong.
+ This can be observed when dumping the SFrame information from the x86-64
+ sframe-reloc-1 test:
+
+ Name Address Off Size
+ .sframe 0000000000000000 000110 00007f
+
+ Offset Type Symbol's Value Symbol's Name + Addend
+ 000000000000001c R_X86_64_PC32 0000000000000000 .text + 1c
+ 0000000000000030 R_X86_64_PC32 0000000000000000 .text + 65
+
+ 0x00000000 e2de0201 0300f800 02000000 08000000 ................
+ 0x00000010 1e000000 00000000 28000000 00000000 ........(.......
+ 0x00000020 35000000 00000000 04000000 00000000 5...............
+ 0x00000030 00000000 25000000 0f000000 04000000 ....%...........
+ offset 1st FRE---^^^^^^^^ ^^^^^^^^---number of FREs
+ 0x00000040 00000000 00030801 0510f004 0410f034 ...............4
+ FDE info---^^ | begin of FDEs
+ 0x00000050 0508f000 03080105 10f00404 10f02405 ..............$.
+ 11111112222222223333333334444---FRE 1, 2, 3, 4
+ 0x00000060 08f00000 00000000 00000000 00000000 ................
+ 4444^^^^...
+ 0x00000070 00000000 00000000 00000000 000000 ...............
+ ...^^^^^^---excessive section
+
+ When running the x86-64 test cross build on a big-endian system, such
+ as s390x, objdump and readelf fail to dump the SFrame information with
+ the following error message:
+
+ Error: SFrame decode failure: Buffer does not contain SFrame data.
+
+ This is because the following check in flip_sframe() fails, which gets
+ only invoked if the endianness of the SFrame data is different from the
+ host system one:
+
+ /* All FDEs and FREs mu[...]
[diff truncated at 100000 bytes]
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