[binutils-gdb] aarch64: Use an enum to refer to indices in the opcode table
Richard Earnshaw
rearnsha@sourceware.org
Mon Jul 21 17:19:42 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=0454220d5883273decbdf7fc1d434c9a1b2c15eb
commit 0454220d5883273decbdf7fc1d434c9a1b2c15eb
Author: Richard Earnshaw <rearnsha@arm.com>
Date: Mon Jul 21 16:40:12 2025 +0100
aarch64: Use an enum to refer to indices in the opcode table
The indices into the auto-generated tables for opcodes are relatively
unstable. Adding a new opcode can permute the code significantly.
But most of this churn is down to changes in the index values. To
minimize this use enumerated constants. While the index values
change, the enumeration names will need to do so far less often, so
most of the changes in the generated code become localized to the
addition (occasionally removal) of opcodes. This change also makes
the state-change comments unnecessary. The enumeration names contain
the same information (and more), so these are simply deleted.
The enumeration values are placed in a new header file, aarch64-tbl-2.h,
so aarch64-gen gains a new option to build this header and the Makefile
rules are adjusted accordingly.
Diff:
---
opcodes/Makefile.am | 10 +-
opcodes/Makefile.in | 10 +-
opcodes/aarch64-asm-2.c | 1381 ++--
opcodes/aarch64-dis-2.c | 19688 +++++++++++++++++++++-------------------------
opcodes/aarch64-gen.c | 194 +-
opcodes/aarch64-opc-2.c | 167 +-
opcodes/aarch64-tbl-2.h | 3847 +++++++++
7 files changed, 13651 insertions(+), 11646 deletions(-)
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index ef4b0dfb01d..a8642c4d07e 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -492,7 +492,7 @@ MOSTLYCLEANFILES = aarch64-gen$(EXEEXT_FOR_BUILD) i386-gen$(EXEEXT_FOR_BUILD) \
z8kgen$(EXEEXT_FOR_BUILD) opc2c$(EXEEXT_FOR_BUILD)
MAINTAINERCLEANFILES = $(srcdir)/aarch64-asm-2.c $(srcdir)/aarch64-dis-2.c \
- $(srcdir)/aarch64-opc-2.c \
+ $(srcdir)/aarch64-opc-2.c $(srcdir)/aarch64-tbl-2.h \
$(srcdir)/i386-tbl.h $(srcdir)/i386-init.h $(srcdir)/i386-mnem.h \
$(srcdir)/ia64-asmtab.c $(srcdir)/z8k-opc.h \
$(srcdir)/msp430-decode.c \
@@ -512,6 +512,14 @@ $(srcdir)/aarch64-dis-2.c: @MAINT@ aarch64-gen$(exeext_for_build)
$(AM_V_GEN)./aarch64-gen$(exeext_for_build) --gen-dis > $@
$(srcdir)/aarch64-opc-2.c: @MAINT@ aarch64-gen$(exeext_for_build)
$(AM_V_GEN)./aarch64-gen$(exeext_for_build) --gen-opc > $@
+$(srcdir)/aarch64-tbl-2.h: @MAINT@ aarch64-gen$(exeext_for_build)
+ $(AM_V_GEN)./aarch64-gen$(exeext_for_build) --gen-idx > $@
+
+aarch64-asm-2.lo: $(srcdir)/aarch64-tbl-2.h $(srcdir)/aarch64-asm-2.c
+
+aarch64-dis-2.lo: $(srcdir)/aarch64-tbl-2.h $(srcdir)/aarch64-dis-2.c
+
+aarch64-opc-2.lo: $(srcdir)/aarch64-tbl-2.h $(srcdir)/aarch64-opc-2.c
i386-gen$(EXEEXT_FOR_BUILD): i386-gen.o $(BUILD_LIB_DEPS)
$(AM_V_CCLD)$(LINK_FOR_BUILD) i386-gen.o $(BUILD_LIBS)
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index 4399354e5a9..662ee5deb9d 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -746,7 +746,7 @@ MOSTLYCLEANFILES = aarch64-gen$(EXEEXT_FOR_BUILD) i386-gen$(EXEEXT_FOR_BUILD) \
z8kgen$(EXEEXT_FOR_BUILD) opc2c$(EXEEXT_FOR_BUILD)
MAINTAINERCLEANFILES = $(srcdir)/aarch64-asm-2.c $(srcdir)/aarch64-dis-2.c \
- $(srcdir)/aarch64-opc-2.c \
+ $(srcdir)/aarch64-opc-2.c $(srcdir)/aarch64-tbl-2.h \
$(srcdir)/i386-tbl.h $(srcdir)/i386-init.h $(srcdir)/i386-mnem.h \
$(srcdir)/ia64-asmtab.c $(srcdir)/z8k-opc.h \
$(srcdir)/msp430-decode.c \
@@ -1493,6 +1493,14 @@ $(srcdir)/aarch64-dis-2.c: @MAINT@ aarch64-gen$(exeext_for_build)
$(AM_V_GEN)./aarch64-gen$(exeext_for_build) --gen-dis > $@
$(srcdir)/aarch64-opc-2.c: @MAINT@ aarch64-gen$(exeext_for_build)
$(AM_V_GEN)./aarch64-gen$(exeext_for_build) --gen-opc > $@
+$(srcdir)/aarch64-tbl-2.h: @MAINT@ aarch64-gen$(exeext_for_build)
+ $(AM_V_GEN)./aarch64-gen$(exeext_for_build) --gen-idx > $@
+
+aarch64-asm-2.lo: $(srcdir)/aarch64-tbl-2.h $(srcdir)/aarch64-asm-2.c
+
+aarch64-dis-2.lo: $(srcdir)/aarch64-tbl-2.h $(srcdir)/aarch64-dis-2.c
+
+aarch64-opc-2.lo: $(srcdir)/aarch64-tbl-2.h $(srcdir)/aarch64-opc-2.c
i386-gen$(EXEEXT_FOR_BUILD): i386-gen.o $(BUILD_LIB_DEPS)
$(AM_V_CCLD)$(LINK_FOR_BUILD) i386-gen.o $(BUILD_LIBS)
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index f9e2b16d283..fa3866781e4 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -19,6 +19,7 @@
see <http://www.gnu.org/licenses/>. */
#include "sysdep.h"
+#include "aarch64-tbl-2.h"
#include "aarch64-asm.h"
@@ -26,733 +27,733 @@ const aarch64_opcode *
aarch64_find_real_opcode (const aarch64_opcode *opcode)
{
/* Use the index as the key to locate the real opcode. */
- int key = opcode - aarch64_opcode_table;
- int value;
+ enum aarch64_opcode_idx key = opcode - aarch64_opcode_table;
+ enum aarch64_opcode_idx value;
switch (key)
{
- case 3: /* ngc */
- case 2: /* sbc */
- value = 2; /* --> sbc. */
- break;
- case 5: /* ngcs */
- case 4: /* sbcs */
- value = 4; /* --> sbcs. */
- break;
- case 8: /* cmn */
- case 7: /* adds */
- value = 7; /* --> adds. */
- break;
- case 11: /* cmp */
- case 10: /* subs */
- value = 10; /* --> subs. */
- break;
- case 13: /* mov */
- case 12: /* add */
- value = 12; /* --> add. */
- break;
- case 15: /* cmn */
- case 14: /* adds */
- value = 14; /* --> adds. */
- break;
- case 18: /* cmp */
- case 17: /* subs */
- value = 17; /* --> subs. */
- break;
- case 23: /* cmn */
- case 22: /* adds */
- value = 22; /* --> adds. */
- break;
- case 25: /* neg */
- case 24: /* sub */
- value = 24; /* --> sub. */
- break;
- case 27: /* cmp */
- case 28: /* negs */
- case 26: /* subs */
- value = 26; /* --> subs. */
- break;
- case 153: /* mov */
- case 152: /* umov */
- value = 152; /* --> umov. */
- break;
- case 155: /* mov */
- case 154: /* ins */
- value = 154; /* --> ins. */
- break;
- case 157: /* mov */
- case 156: /* ins */
- value = 156; /* --> ins. */
- break;
- case 243: /* mvn */
- case 242: /* not */
- value = 242; /* --> not. */
- break;
- case 318: /* mov */
- case 317: /* orr */
- value = 317; /* --> orr. */
- break;
- case 389: /* sxtl */
- case 388: /* sshll */
- value = 388; /* --> sshll. */
- break;
- case 391: /* sxtl2 */
- case 390: /* sshll2 */
- value = 390; /* --> sshll2. */
- break;
- case 413: /* uxtl */
- case 412: /* ushll */
- value = 412; /* --> ushll. */
- break;
- case 415: /* uxtl2 */
- case 414: /* ushll2 */
- value = 414; /* --> ushll2. */
- break;
- case 536: /* mov */
- case 535: /* dup */
- value = 535; /* --> dup. */
- break;
- case 623: /* sxtw */
- case 622: /* sxth */
- case 621: /* sxtb */
- case 624: /* asr */
- case 620: /* sbfx */
- case 619: /* sbfiz */
- case 618: /* sbfm */
- value = 618; /* --> sbfm. */
- break;
- case 627: /* bfc */
- case 628: /* bfxil */
- case 626: /* bfi */
- case 625: /* bfm */
- value = 625; /* --> bfm. */
- break;
- case 633: /* uxth */
- case 632: /* uxtb */
- case 635: /* lsr */
- case 634: /* lsl */
- case 631: /* ubfx */
- case 630: /* ubfiz */
- case 629: /* ubfm */
- value = 629; /* --> ubfm. */
- break;
- case 659: /* cblt */
- case 658: /* cbgt */
- value = 658; /* --> cbgt. */
- break;
- case 661: /* cble */
- case 660: /* cbge */
- value = 660; /* --> cbge. */
- break;
- case 663: /* cblo */
- case 662: /* cbhi */
- value = 662; /* --> cbhi. */
- break;
- case 665: /* cbls */
- case 664: /* cbhs */
- value = 664; /* --> cbhs. */
- break;
- case 669: /* cbge */
- case 668: /* cbgt */
- value = 668; /* --> cbgt. */
- break;
- case 671: /* cble */
- case 670: /* cblt */
- value = 670; /* --> cblt. */
- break;
- case 673: /* cbhs */
- case 672: /* cbhi */
- value = 672; /* --> cbhi. */
- break;
- case 675: /* cbls */
- case 674: /* cblo */
- value = 674; /* --> cblo. */
- break;
- case 679: /* cbblt */
- case 678: /* cbbgt */
- value = 678; /* --> cbbgt. */
- break;
- case 681: /* cbble */
- case 680: /* cbbge */
- value = 680; /* --> cbbge. */
- break;
- case 683: /* cbblo */
- case 682: /* cbbhi */
- value = 682; /* --> cbbhi. */
- break;
- case 685: /* cbbls */
- case 684: /* cbbhs */
- value = 684; /* --> cbbhs. */
- break;
- case 689: /* cbhlt */
- case 688: /* cbhgt */
- value = 688; /* --> cbhgt. */
- break;
- case 691: /* cbhle */
- case 690: /* cbhge */
- value = 690; /* --> cbhge. */
- break;
- case 693: /* cbhlo */
- case 692: /* cbhhi */
- value = 692; /* --> cbhhi. */
- break;
- case 695: /* cbhls */
- case 694: /* cbhhs */
- value = 694; /* --> cbhhs. */
- break;
- case 705: /* cset */
- case 704: /* cinc */
- case 703: /* csinc */
- value = 703; /* --> csinc. */
- break;
- case 708: /* csetm */
- case 707: /* cinv */
- case 706: /* csinv */
- value = 706; /* --> csinv. */
- break;
- case 710: /* cneg */
- case 709: /* csneg */
- value = 709; /* --> csneg. */
- break;
- case 729: /* rev64 */
- case 728: /* rev */
- value = 728; /* --> rev. */
- break;
- case 754: /* lsl */
- case 753: /* lslv */
- value = 753; /* --> lslv. */
- break;
- case 756: /* lsr */
- case 755: /* lsrv */
- value = 755; /* --> lsrv. */
- break;
- case 758: /* asr */
- case 757: /* asrv */
- value = 757; /* --> asrv. */
- break;
- case 760: /* ror */
- case 759: /* rorv */
- value = 759; /* --> rorv. */
- break;
- case 763: /* cmpp */
- case 762: /* subps */
- value = 762; /* --> subps. */
- break;
- case 776: /* mul */
- case 775: /* madd */
- value = 775; /* --> madd. */
- break;
- case 778: /* mneg */
- case 777: /* msub */
- value = 777; /* --> msub. */
- break;
- case 780: /* smull */
- case 779: /* smaddl */
- value = 779; /* --> smaddl. */
- break;
- case 782: /* smnegl */
- case 781: /* smsubl */
- value = 781; /* --> smsubl. */
- break;
- case 785: /* umull */
- case 784: /* umaddl */
- value = 784; /* --> umaddl. */
- break;
- case 787: /* umnegl */
- case 786: /* umsubl */
- value = 786; /* --> umsubl. */
- break;
- case 799: /* ror */
- case 798: /* extr */
- value = 798; /* --> extr. */
- break;
- case 1048: /* bic */
- case 1047: /* and */
- value = 1047; /* --> and. */
- break;
- case 1050: /* mov */
- case 1049: /* orr */
- value = 1049; /* --> orr. */
- break;
- case 1053: /* tst */
- case 1052: /* ands */
- value = 1052; /* --> ands. */
- break;
- case 1058: /* uxtw */
- case 1057: /* mov */
- case 1056: /* orr */
- value = 1056; /* --> orr. */
+ case A64_OPID_5a0003e0_ngc_Rd_Rm:
+ case A64_OPID_5a000000_sbc_Rd_Rn_Rm:
+ value = A64_OPID_5a000000_sbc_Rd_Rn_Rm;
+ break;
+ case A64_OPID_7a0003e0_ngcs_Rd_Rm:
+ case A64_OPID_7a000000_sbcs_Rd_Rn_Rm:
+ value = A64_OPID_7a000000_sbcs_Rd_Rn_Rm;
+ break;
+ case A64_OPID_2b20001f_cmn_Rn_SP_Rm_EXT:
+ case A64_OPID_2b200000_adds_Rd_Rn_SP_Rm_EXT:
+ value = A64_OPID_2b200000_adds_Rd_Rn_SP_Rm_EXT;
+ break;
+ case A64_OPID_6b20001f_cmp_Rn_SP_Rm_EXT:
+ case A64_OPID_6b200000_subs_Rd_Rn_SP_Rm_EXT:
+ value = A64_OPID_6b200000_subs_Rd_Rn_SP_Rm_EXT;
+ break;
+ case A64_OPID_11000000_mov_Rd_SP_Rn_SP:
+ case A64_OPID_11000000_add_Rd_SP_Rn_SP_AIMM:
+ value = A64_OPID_11000000_add_Rd_SP_Rn_SP_AIMM;
+ break;
+ case A64_OPID_3100001f_cmn_Rn_SP_AIMM:
+ case A64_OPID_31000000_adds_Rd_Rn_SP_AIMM:
+ value = A64_OPID_31000000_adds_Rd_Rn_SP_AIMM;
+ break;
+ case A64_OPID_7100001f_cmp_Rn_SP_AIMM:
+ case A64_OPID_71000000_subs_Rd_Rn_SP_AIMM:
+ value = A64_OPID_71000000_subs_Rd_Rn_SP_AIMM;
+ break;
+ case A64_OPID_2b00001f_cmn_Rn_Rm_SFT:
+ case A64_OPID_2b000000_adds_Rd_Rn_Rm_SFT:
+ value = A64_OPID_2b000000_adds_Rd_Rn_Rm_SFT;
+ break;
+ case A64_OPID_4b0003e0_neg_Rd_Rm_SFT:
+ case A64_OPID_4b000000_sub_Rd_Rn_Rm_SFT:
+ value = A64_OPID_4b000000_sub_Rd_Rn_Rm_SFT;
+ break;
+ case A64_OPID_6b00001f_cmp_Rn_Rm_SFT:
+ case A64_OPID_6b0003e0_negs_Rd_Rm_SFT:
+ case A64_OPID_6b000000_subs_Rd_Rn_Rm_SFT:
+ value = A64_OPID_6b000000_subs_Rd_Rn_Rm_SFT;
+ break;
+ case A64_OPID_0e003c00_mov_Rd_En:
+ case A64_OPID_0e003c00_umov_Rd_En:
+ value = A64_OPID_0e003c00_umov_Rd_En;
+ break;
+ case A64_OPID_4e001c00_mov_Ed_Rn:
+ case A64_OPID_4e001c00_ins_Ed_Rn:
+ value = A64_OPID_4e001c00_ins_Ed_Rn;
+ break;
+ case A64_OPID_6e000400_mov_Ed_En:
+ case A64_OPID_6e000400_ins_Ed_En:
+ value = A64_OPID_6e000400_ins_Ed_En;
+ break;
+ case A64_OPID_2e205800_mvn_Vd_Vn:
+ case A64_OPID_2e205800_not_Vd_Vn:
+ value = A64_OPID_2e205800_not_Vd_Vn;
+ break;
+ case A64_OPID_0ea01c00_mov_Vd_Vn:
+ case A64_OPID_0ea01c00_orr_Vd_Vn_Vm:
+ value = A64_OPID_0ea01c00_orr_Vd_Vn_Vm;
+ break;
+ case A64_OPID_0f00a400_sxtl_Vd_Vn:
+ case A64_OPID_0f00a400_sshll_Vd_Vn_IMM_VLSL:
+ value = A64_OPID_0f00a400_sshll_Vd_Vn_IMM_VLSL;
+ break;
+ case A64_OPID_4f00a400_sxtl2_Vd_Vn:
+ case A64_OPID_4f00a400_sshll2_Vd_Vn_IMM_VLSL:
+ value = A64_OPID_4f00a400_sshll2_Vd_Vn_IMM_VLSL;
+ break;
+ case A64_OPID_2f00a400_uxtl_Vd_Vn:
+ case A64_OPID_2f00a400_ushll_Vd_Vn_IMM_VLSL:
+ value = A64_OPID_2f00a400_ushll_Vd_Vn_IMM_VLSL;
+ break;
+ case A64_OPID_6f00a400_uxtl2_Vd_Vn:
+ case A64_OPID_6f00a400_ushll2_Vd_Vn_IMM_VLSL:
+ value = A64_OPID_6f00a400_ushll2_Vd_Vn_IMM_VLSL;
+ break;
+ case A64_OPID_5e000400_mov_Sd_En:
+ case A64_OPID_5e000400_dup_Sd_En:
+ value = A64_OPID_5e000400_dup_Sd_En;
+ break;
+ case A64_OPID_93407c00_sxtw_Rd_Rn:
+ case A64_OPID_13003c00_sxth_Rd_Rn:
+ case A64_OPID_13001c00_sxtb_Rd_Rn:
+ case A64_OPID_13000000_asr_Rd_Rn_IMM:
+ case A64_OPID_13000000_sbfx_Rd_Rn_IMM_WIDTH:
+ case A64_OPID_13000000_sbfiz_Rd_Rn_IMM_WIDTH:
+ case A64_OPID_13000000_sbfm_Rd_Rn_IMMR_IMMS:
+ value = A64_OPID_13000000_sbfm_Rd_Rn_IMMR_IMMS;
+ break;
+ case A64_OPID_330003e0_bfc_Rd_IMM_WIDTH:
+ case A64_OPID_33000000_bfxil_Rd_Rn_IMM_WIDTH:
+ case A64_OPID_33000000_bfi_Rd_Rn_IMM_WIDTH:
+ case A64_OPID_33000000_bfm_Rd_Rn_IMMR_IMMS:
+ value = A64_OPID_33000000_bfm_Rd_Rn_IMMR_IMMS;
+ break;
+ case A64_OPID_53003c00_uxth_Rd_Rn:
+ case A64_OPID_53001c00_uxtb_Rd_Rn:
+ case A64_OPID_53000000_lsr_Rd_Rn_IMM:
+ case A64_OPID_53000000_lsl_Rd_Rn_IMM:
+ case A64_OPID_53000000_ubfx_Rd_Rn_IMM_WIDTH:
+ case A64_OPID_53000000_ubfiz_Rd_Rn_IMM_WIDTH:
+ case A64_OPID_53000000_ubfm_Rd_Rn_IMMR_IMMS:
+ value = A64_OPID_53000000_ubfm_Rd_Rn_IMMR_IMMS;
+ break;
+ case A64_OPID_74000000_cblt_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74000000_cbgt_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74000000_cbgt_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_74200000_cble_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74200000_cbge_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74200000_cbge_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_74400000_cblo_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74400000_cbhi_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74400000_cbhi_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_74600000_cbls_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74600000_cbhs_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74600000_cbhs_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_75000000_cbge_Rt_IMMP1_2_ADDR_PCREL9:
+ case A64_OPID_75000000_cbgt_Rt_IMM_2_ADDR_PCREL9:
+ value = A64_OPID_75000000_cbgt_Rt_IMM_2_ADDR_PCREL9;
+ break;
+ case A64_OPID_75200000_cble_Rt_IMMS1_2_ADDR_PCREL9:
+ case A64_OPID_75200000_cblt_Rt_IMM_2_ADDR_PCREL9:
+ value = A64_OPID_75200000_cblt_Rt_IMM_2_ADDR_PCREL9;
+ break;
+ case A64_OPID_75400000_cbhs_Rt_IMMP1_2_ADDR_PCREL9:
+ case A64_OPID_75400000_cbhi_Rt_IMM_2_ADDR_PCREL9:
+ value = A64_OPID_75400000_cbhi_Rt_IMM_2_ADDR_PCREL9;
+ break;
+ case A64_OPID_75600000_cbls_Rt_IMMS1_2_ADDR_PCREL9:
+ case A64_OPID_75600000_cblo_Rt_IMM_2_ADDR_PCREL9:
+ value = A64_OPID_75600000_cblo_Rt_IMM_2_ADDR_PCREL9;
+ break;
+ case A64_OPID_74008000_cbblt_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74008000_cbbgt_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74008000_cbbgt_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_74208000_cbble_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74208000_cbbge_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74208000_cbbge_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_74408000_cbblo_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74408000_cbbhi_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74408000_cbbhi_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_74608000_cbbls_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_74608000_cbbhs_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_74608000_cbbhs_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_7400c000_cbhlt_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_7400c000_cbhgt_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_7400c000_cbhgt_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_7420c000_cbhle_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_7420c000_cbhge_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_7420c000_cbhge_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_7440c000_cbhlo_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_7440c000_cbhhi_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_7440c000_cbhhi_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_7460c000_cbhls_Rm_Rt_ADDR_PCREL9:
+ case A64_OPID_7460c000_cbhhs_Rt_Rm_ADDR_PCREL9:
+ value = A64_OPID_7460c000_cbhhs_Rt_Rm_ADDR_PCREL9;
+ break;
+ case A64_OPID_1a9f07e0_cset_Rd_COND1:
+ case A64_OPID_1a800400_cinc_Rd_Rn_COND1:
+ case A64_OPID_1a800400_csinc_Rd_Rn_Rm_COND:
+ value = A64_OPID_1a800400_csinc_Rd_Rn_Rm_COND;
+ break;
+ case A64_OPID_5a9f03e0_csetm_Rd_COND1:
+ case A64_OPID_5a800000_cinv_Rd_Rn_COND1:
+ case A64_OPID_5a800000_csinv_Rd_Rn_Rm_COND:
+ value = A64_OPID_5a800000_csinv_Rd_Rn_Rm_COND;
+ break;
+ case A64_OPID_5a800400_cneg_Rd_Rn_COND1:
+ case A64_OPID_5a800400_csneg_Rd_Rn_Rm_COND:
+ value = A64_OPID_5a800400_csneg_Rd_Rn_Rm_COND;
+ break;
+ case A64_OPID_dac00c00_rev64_Rd_Rn:
+ case A64_OPID_dac00c00_rev_Rd_Rn:
+ value = A64_OPID_dac00c00_rev_Rd_Rn;
+ break;
+ case A64_OPID_1ac02000_lsl_Rd_Rn_Rm:
+ case A64_OPID_1ac02000_lslv_Rd_Rn_Rm:
+ value = A64_OPID_1ac02000_lslv_Rd_Rn_Rm;
+ break;
+ case A64_OPID_1ac02400_lsr_Rd_Rn_Rm:
+ case A64_OPID_1ac02400_lsrv_Rd_Rn_Rm:
+ value = A64_OPID_1ac02400_lsrv_Rd_Rn_Rm;
+ break;
+ case A64_OPID_1ac02800_asr_Rd_Rn_Rm:
+ case A64_OPID_1ac02800_asrv_Rd_Rn_Rm:
+ value = A64_OPID_1ac02800_asrv_Rd_Rn_Rm;
+ break;
+ case A64_OPID_1ac02c00_ror_Rd_Rn_Rm:
+ case A64_OPID_1ac02c00_rorv_Rd_Rn_Rm:
+ value = A64_OPID_1ac02c00_rorv_Rd_Rn_Rm;
+ break;
+ case A64_OPID_bac0001f_cmpp_Rn_SP_Rm_SP:
+ case A64_OPID_bac00000_subps_Rd_Rn_SP_Rm_SP:
+ value = A64_OPID_bac00000_subps_Rd_Rn_SP_Rm_SP;
+ break;
+ case A64_OPID_1b007c00_mul_Rd_Rn_Rm:
+ case A64_OPID_1b000000_madd_Rd_Rn_Rm_Ra:
+ value = A64_OPID_1b000000_madd_Rd_Rn_Rm_Ra;
+ break;
+ case A64_OPID_1b00fc00_mneg_Rd_Rn_Rm:
+ case A64_OPID_1b008000_msub_Rd_Rn_Rm_Ra:
+ value = A64_OPID_1b008000_msub_Rd_Rn_Rm_Ra;
+ break;
+ case A64_OPID_9b207c00_smull_Rd_Rn_Rm:
+ case A64_OPID_9b200000_smaddl_Rd_Rn_Rm_Ra:
+ value = A64_OPID_9b200000_smaddl_Rd_Rn_Rm_Ra;
+ break;
+ case A64_OPID_9b20fc00_smnegl_Rd_Rn_Rm:
+ case A64_OPID_9b208000_smsubl_Rd_Rn_Rm_Ra:
+ value = A64_OPID_9b208000_smsubl_Rd_Rn_Rm_Ra;
+ break;
+ case A64_OPID_9ba07c00_umull_Rd_Rn_Rm:
+ case A64_OPID_9ba00000_umaddl_Rd_Rn_Rm_Ra:
+ value = A64_OPID_9ba00000_umaddl_Rd_Rn_Rm_Ra;
+ break;
+ case A64_OPID_9ba0fc00_umnegl_Rd_Rn_Rm:
+ case A64_OPID_9ba08000_umsubl_Rd_Rn_Rm_Ra:
+ value = A64_OPID_9ba08000_umsubl_Rd_Rn_Rm_Ra;
+ break;
+ case A64_OPID_13800000_ror_Rd_Rm_IMMS:
+ case A64_OPID_13800000_extr_Rd_Rn_Rm_IMMS:
+ value = A64_OPID_13800000_extr_Rd_Rn_Rm_IMMS;
+ break;
+ case A64_OPID_12000000_bic_Rd_SP_Rn_LIMM:
+ case A64_OPID_12000000_and_Rd_SP_Rn_LIMM:
+ value = A64_OPID_12000000_and_Rd_SP_Rn_LIMM;
+ break;
+ case A64_OPID_320003e0_mov_Rd_SP_IMM_MOV:
+ case A64_OPID_32000000_orr_Rd_SP_Rn_LIMM:
+ value = A64_OPID_32000000_orr_Rd_SP_Rn_LIMM;
+ break;
+ case A64_OPID_7200001f_tst_Rn_LIMM:
+ case A64_OPID_72000000_ands_Rd_Rn_LIMM:
+ value = A64_OPID_72000000_ands_Rd_Rn_LIMM;
+ break;
+ case A64_OPID_2a0003e0_uxtw_Rd_Rm:
+ case A64_OPID_2a0003e0_mov_Rd_Rm_SFT:
+ case A64_OPID_2a000000_orr_Rd_Rn_Rm_SFT:
+ value = A64_OPID_2a000000_orr_Rd_Rn_Rm_SFT;
break;
- case 1060: /* mvn */
- case 1059: /* orn */
- value = 1059; /* --> orn. */
+ case A64_OPID_2a2003e0_mvn_Rd_Rm_SFT:
+ case A64_OPID_2a200000_orn_Rd_Rn_Rm_SFT:
+ value = A64_OPID_2a200000_orn_Rd_Rn_Rm_SFT;
break;
- case 1064: /* tst */
- case 1063: /* ands */
- value = 1063; /* --> ands. */
+ case A64_OPID_6a00001f_tst_Rn_Rm_SFT:
+ case A64_OPID_6a000000_ands_Rd_Rn_Rm_SFT:
+ value = A64_OPID_6a000000_ands_Rd_Rn_Rm_SFT;
break;
- case 1190: /* staddb */
- case 1094: /* ldaddb */
- value = 1094; /* --> ldaddb. */
+ case A64_OPID_3820001f_staddb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38200000_ldaddb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38200000_ldaddb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1191: /* staddh */
- case 1095: /* ldaddh */
- value = 1095; /* --> ldaddh. */
+ case A64_OPID_7820001f_staddh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78200000_ldaddh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78200000_ldaddh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1192: /* stadd */
- case 1096: /* ldadd */
- value = 1096; /* --> ldadd. */
+ case A64_OPID_b820001f_stadd_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8200000_ldadd_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8200000_ldadd_Rs_Rt_ADDR_SIMPLE;
break;
- case 1193: /* staddlb */
- case 1098: /* ldaddlb */
- value = 1098; /* --> ldaddlb. */
+ case A64_OPID_3860001f_staddlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38600000_ldaddlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38600000_ldaddlb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1194: /* staddlh */
- case 1101: /* ldaddlh */
- value = 1101; /* --> ldaddlh. */
+ case A64_OPID_7860001f_staddlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78600000_ldaddlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78600000_ldaddlh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1195: /* staddl */
- case 1104: /* ldaddl */
- value = 1104; /* --> ldaddl. */
+ case A64_OPID_b860001f_staddl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8600000_ldaddl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8600000_ldaddl_Rs_Rt_ADDR_SIMPLE;
break;
- case 1196: /* stclrb */
- case 1106: /* ldclrb */
- value = 1106; /* --> ldclrb. */
+ case A64_OPID_3820101f_stclrb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38201000_ldclrb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38201000_ldclrb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1197: /* stclrh */
- case 1107: /* ldclrh */
- value = 1107; /* --> ldclrh. */
+ case A64_OPID_7820101f_stclrh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78201000_ldclrh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78201000_ldclrh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1198: /* stclr */
- case 1108: /* ldclr */
- value = 1108; /* --> ldclr. */
+ case A64_OPID_b820101f_stclr_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8201000_ldclr_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8201000_ldclr_Rs_Rt_ADDR_SIMPLE;
break;
- case 1199: /* stclrlb */
- case 1110: /* ldclrlb */
- value = 1110; /* --> ldclrlb. */
+ case A64_OPID_3860101f_stclrlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38601000_ldclrlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38601000_ldclrlb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1200: /* stclrlh */
- case 1113: /* ldclrlh */
- value = 1113; /* --> ldclrlh. */
+ case A64_OPID_7860101f_stclrlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78601000_ldclrlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78601000_ldclrlh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1201: /* stclrl */
- case 1116: /* ldclrl */
- value = 1116; /* --> ldclrl. */
+ case A64_OPID_b860101f_stclrl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8601000_ldclrl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8601000_ldclrl_Rs_Rt_ADDR_SIMPLE;
break;
- case 1202: /* steorb */
- case 1118: /* ldeorb */
- value = 1118; /* --> ldeorb. */
+ case A64_OPID_3820201f_steorb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38202000_ldeorb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38202000_ldeorb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1203: /* steorh */
- case 1119: /* ldeorh */
- value = 1119; /* --> ldeorh. */
+ case A64_OPID_7820201f_steorh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78202000_ldeorh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78202000_ldeorh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1204: /* steor */
- case 1120: /* ldeor */
- value = 1120; /* --> ldeor. */
+ case A64_OPID_b820201f_steor_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8202000_ldeor_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8202000_ldeor_Rs_Rt_ADDR_SIMPLE;
break;
- case 1205: /* steorlb */
- case 1122: /* ldeorlb */
- value = 1122; /* --> ldeorlb. */
+ case A64_OPID_3860201f_steorlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38602000_ldeorlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38602000_ldeorlb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1206: /* steorlh */
- case 1125: /* ldeorlh */
- value = 1125; /* --> ldeorlh. */
+ case A64_OPID_7860201f_steorlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78602000_ldeorlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78602000_ldeorlh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1207: /* steorl */
- case 1128: /* ldeorl */
- value = 1128; /* --> ldeorl. */
+ case A64_OPID_b860201f_steorl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8602000_ldeorl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8602000_ldeorl_Rs_Rt_ADDR_SIMPLE;
break;
- case 1208: /* stsetb */
- case 1130: /* ldsetb */
- value = 1130; /* --> ldsetb. */
+ case A64_OPID_3820301f_stsetb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38203000_ldsetb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38203000_ldsetb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1209: /* stseth */
- case 1131: /* ldseth */
- value = 1131; /* --> ldseth. */
+ case A64_OPID_7820301f_stseth_Rs_ADDR_SIMPLE:
+ case A64_OPID_78203000_ldseth_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78203000_ldseth_Rs_Rt_ADDR_SIMPLE;
break;
- case 1210: /* stset */
- case 1132: /* ldset */
- value = 1132; /* --> ldset. */
+ case A64_OPID_b820301f_stset_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8203000_ldset_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8203000_ldset_Rs_Rt_ADDR_SIMPLE;
break;
- case 1211: /* stsetlb */
- case 1134: /* ldsetlb */
- value = 1134; /* --> ldsetlb. */
+ case A64_OPID_3860301f_stsetlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38603000_ldsetlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38603000_ldsetlb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1212: /* stsetlh */
- case 1137: /* ldsetlh */
- value = 1137; /* --> ldsetlh. */
+ case A64_OPID_7860301f_stsetlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78603000_ldsetlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78603000_ldsetlh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1213: /* stsetl */
- case 1140: /* ldsetl */
- value = 1140; /* --> ldsetl. */
+ case A64_OPID_b860301f_stsetl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8603000_ldsetl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8603000_ldsetl_Rs_Rt_ADDR_SIMPLE;
break;
- case 1214: /* stsmaxb */
- case 1142: /* ldsmaxb */
- value = 1142; /* --> ldsmaxb. */
+ case A64_OPID_3820401f_stsmaxb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38204000_ldsmaxb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38204000_ldsmaxb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1215: /* stsmaxh */
- case 1143: /* ldsmaxh */
- value = 1143; /* --> ldsmaxh. */
+ case A64_OPID_7820401f_stsmaxh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78204000_ldsmaxh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78204000_ldsmaxh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1216: /* stsmax */
- case 1144: /* ldsmax */
- value = 1144; /* --> ldsmax. */
+ case A64_OPID_b820401f_stsmax_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8204000_ldsmax_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8204000_ldsmax_Rs_Rt_ADDR_SIMPLE;
break;
- case 1217: /* stsmaxlb */
- case 1146: /* ldsmaxlb */
- value = 1146; /* --> ldsmaxlb. */
+ case A64_OPID_3860401f_stsmaxlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38604000_ldsmaxlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38604000_ldsmaxlb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1218: /* stsmaxlh */
- case 1149: /* ldsmaxlh */
- value = 1149; /* --> ldsmaxlh. */
+ case A64_OPID_7860401f_stsmaxlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78604000_ldsmaxlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78604000_ldsmaxlh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1219: /* stsmaxl */
- case 1152: /* ldsmaxl */
- value = 1152; /* --> ldsmaxl. */
+ case A64_OPID_b860401f_stsmaxl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8604000_ldsmaxl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8604000_ldsmaxl_Rs_Rt_ADDR_SIMPLE;
break;
- case 1220: /* stsminb */
- case 1154: /* ldsminb */
- value = 1154; /* --> ldsminb. */
+ case A64_OPID_3820501f_stsminb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38205000_ldsminb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38205000_ldsminb_Rs_Rt_ADDR_SIMPLE;
break;
- case 1221: /* stsminh */
- case 1155: /* ldsminh */
- value = 1155; /* --> ldsminh. */
+ case A64_OPID_7820501f_stsminh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78205000_ldsminh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78205000_ldsminh_Rs_Rt_ADDR_SIMPLE;
break;
- case 1222: /* stsmin */
- case 1156: /* ldsmin */
- value = 1156; /* --> ldsmin. */
- break;
- case 1223: /* stsminlb */
- case 1158: /* ldsminlb */
- value = 1158; /* --> ldsminlb. */
- break;
- case 1224: /* stsminlh */
- case 1161: /* ldsminlh */
- value = 1161; /* --> ldsminlh. */
- break;
- case 1225: /* stsminl */
- case 1164: /* ldsminl */
- value = 1164; /* --> ldsminl. */
- break;
- case 1226: /* stumaxb */
- case 1166: /* ldumaxb */
- value = 1166; /* --> ldumaxb. */
- break;
- case 1227: /* stumaxh */
- case 1167: /* ldumaxh */
- value = 1167; /* --> ldumaxh. */
- break;
- case 1228: /* stumax */
- case 1168: /* ldumax */
- value = 1168; /* --> ldumax. */
- break;
- case 1229: /* stumaxlb */
- case 1170: /* ldumaxlb */
- value = 1170; /* --> ldumaxlb. */
- break;
- case 1230: /* stumaxlh */
- case 1173: /* ldumaxlh */
- value = 1173; /* --> ldumaxlh. */
- break;
- case 1231: /* stumaxl */
- case 1176: /* ldumaxl */
- value = 1176; /* --> ldumaxl. */
- break;
- case 1232: /* stuminb */
- case 1178: /* lduminb */
- value = 1178; /* --> lduminb. */
- break;
- case 1233: /* stuminh */
- case 1179: /* lduminh */
- value = 1179; /* --> lduminh. */
- break;
- case 1234: /* stumin */
- case 1180: /* ldumin */
- value = 1180; /* --> ldumin. */
- break;
- case 1235: /* stuminlb */
- case 1182: /* lduminlb */
- value = 1182; /* --> lduminlb. */
- break;
- case 1236: /* stuminlh */
- case 1185: /* lduminlh */
- value = 1185; /* --> lduminlh. */
- break;
- case 1237: /* stuminl */
- case 1188: /* lduminl */
- value = 1188; /* --> lduminl. */
- break;
- case 1267: /* sttadd */
- case 1266: /* ldtadd */
- value = 1266; /* --> ldtadd. */
- break;
- case 1271: /* sttaddl */
- case 1270: /* ldtaddl */
- value = 1270; /* --> ldtaddl. */
- break;
- case 1273: /* sttclr */
- case 1272: /* ldtclr */
- value = 1272; /* --> ldtclr. */
- break;
- case 1277: /* sttclrl */
- case 1276: /* ldtclrl */
- value = 1276; /* --> ldtclrl. */
- break;
- case 1279: /* sttset */
- case 1278: /* ldtset */
- value = 1278; /* --> ldtset. */
- break;
- case 1283: /* sttsetl */
- case 1282: /* ldtsetl */
- value = 1282; /* --> ldtsetl. */
- break;
- case 1315: /* mov */
- case 1314: /* movn */
- value = 1314; /* --> movn. */
- break;
- case 1317: /* mov */
- case 1316: /* movz */
- value = 1316; /* --> movz. */
- break;
- case 3373: /* clrbhb */
- case 1398: /* autibsp */
- case 1397: /* autibz */
- case 1396: /* autiasp */
- case 1395: /* autiaz */
- case 1394: /* pacibsp */
- case 1393: /* pacibz */
- case 1392: /* paciasp */
- case 1391: /* paciaz */
- case 1370: /* gcsb */
- case 1350: /* clearbhb */
- case 1349: /* tsb */
- case 1348: /* psb */
- case 1347: /* esb */
- case 1346: /* autib1716 */
- case 1345: /* autia1716 */
- case 1344: /* pacib1716 */
- case 1343: /* pacia1716 */
- case 1342: /* xpaclri */
- case 1341: /* dgh */
- case 1340: /* sevl */
- case 1339: /* sev */
- case 1338: /* wfi */
- case 1337: /* wfe */
- case 1336: /* yield */
- case 1335: /* bti */
- case 1334: /* csdb */
- case 1333: /* nop */
- case 1330: /* stshh */
- case 1332: /* hint */
- value = 1332; /* --> hint. */
- break;
- case 1356: /* pssbb */
- case 1355: /* ssbb */
- case 1354: /* dfb */
- case 1352: /* dsb */
- value = 1352; /* --> dsb. */
- break;
- case 1353: /* dsb */
- value = 1353; /* --> dsb. */
- break;
- case 3374: /* trcit */
- case 1384: /* brb */
- case 1383: /* cosp */
- case 1382: /* cpp */
- case 1381: /* dvp */
- case 1380: /* cfp */
- case 1376: /* tlbi */
- case 1375: /* ic */
- case 1374: /* dc */
- case 1373: /* at */
- case 1371: /* sys */
- value = 1371; /* --> sys. */
- break;
- case 1377: /* tlbip */
- case 1372: /* sysp */
- value = 1372; /* --> sysp. */
- break;
- case 1378: /* wfet */
- value = 1378; /* --> wfet. */
- break;
- case 1379: /* wfit */
- value = 1379; /* --> wfit. */
- break;
- case 2184: /* bic */
- case 1447: /* and */
- value = 1447; /* --> and. */
- break;
- case 1430: /* mov */
- case 1449: /* and */
- value = 1449; /* --> and. */
- break;
- case 1434: /* movs */
- case 1450: /* ands */
- value = 1450; /* --> ands. */
- break;
- case 2185: /* cmple */
- case 1485: /* cmpge */
- value = 1485; /* --> cmpge. */
- break;
- case 2188: /* cmplt */
- case 1488: /* cmpgt */
- value = 1488; /* --> cmpgt. */
- break;
- case 2186: /* cmplo */
- case 1490: /* cmphi */
- value = 1490; /* --> cmphi. */
- break;
- case 2187: /* cmpls */
- case 1493: /* cmphs */
- value = 1493; /* --> cmphs. */
- break;
- case 1427: /* mov */
- case 1515: /* cpy */
- value = 1515; /* --> cpy. */
- break;
- case 1429: /* mov */
- case 1516: /* cpy */
- value = 1516; /* --> cpy. */
- break;
- case 2195: /* fmov */
- case 1432: /* mov */
- case 1517: /* cpy */
- value = 1517; /* --> cpy. */
- break;
- case 1421: /* mov */
- case 1529: /* dup */
- value = 1529; /* --> dup. */
- break;
- case 1424: /* mov */
- case 1420: /* mov */
- case 1530: /* dup */
- value = 1530; /* --> dup. */
- break;
- case 2194: /* fmov */
- case 1426: /* mov */
- case 1531: /* dup */
- value = 1531; /* --> dup. */
- break;
- case 1425: /* mov */
- case 1532: /* dupm */
- value = 1532; /* --> dupm. */
- break;
- case 2189: /* eon */
- case 1534: /* eor */
- value = 1534; /* --> eor. */
- break;
- case 1435: /* not */
- case 1536: /* eor */
- value = 1536; /* --> eor. */
- break;
- case 1436: /* nots */
- case 1537: /* eors */
- value = 1537; /* --> eors. */
- break;
- case 2190: /* facle */
- case 1542: /* facge */
- value = 1542; /* --> facge. */
- break;
- case 2191: /* faclt */
- case 1543: /* facgt */
- value = 1543; /* --> facgt. */
- break;
- case 2192: /* fcmle */
- case 1556: /* fcmge */
- value = 1556; /* --> fcmge. */
- break;
- case 2193: /* fcmlt */
- case 1558: /* fcmgt */
- value = 1558; /* --> fcmgt. */
- break;
- case 1418: /* fmov */
- case 1564: /* fcpy */
- value = 1564; /* --> fcpy. */
- break;
- case 1417: /* fmov */
- case 1587: /* fdup */
- value = 1587; /* --> fdup. */
- break;
- case 1873: /* ldr */
- case 1872: /* ldr */
- value = 1872; /* --> ldr. */
- break;
- case 1419: /* mov */
- case 1903: /* orr */
- value = 1903; /* --> orr. */
- break;
- case 2196: /* orn */
- case 1904: /* orr */
- value = 1904; /* --> orr. */
- break;
- case 1423: /* mov */
- case 1422: /* mov */
- case 1906: /* orr */
- value = 1906; /* --> orr. */
- break;
- case 1433: /* movs */
- case 1907: /* orrs */
- value = 1907; /* --> orrs. */
- break;
- case 1910: /* pfalse */
- case 1909: /* pfalse */
- value = 1909; /* --> pfalse. */
- break;
- case 1428: /* mov */
- case 1970: /* sel */
- value = 1970; /* --> sel. */
- break;
- case 1431: /* mov */
- case 1971: /* sel */
- value = 1971; /* --> sel. */
- break;
- case 2092: /* str */
- case 2091: /* str */
- value = 2091; /* --> str. */
- break;
- case 2529: /* mov */
- case 2531: /* mova */
- value = 2531; /* --> mova. */
- break;
- case 2530: /* mov */
- case 2532: /* mova */
- value = 2532; /* --> mova. */
- break;
- case 2550: /* psel */
- case 2549: /* psel */
- value = 2549; /* --> psel. */
- break;
- case 2755: /* mov */
- case 2763: /* mova */
- value = 2763; /* --> mova. */
- break;
- case 2756: /* mov */
- case 2764: /* mova */
- value = 2764; /* --> mova. */
- break;
- case 2757: /* mov */
- case 2765: /* mova */
- value = 2765; /* --> mova. */
- break;
- case 2758: /* mov */
- case 2766: /* mova */
- value = 2766; /* --> mova. */
- break;
- case 2759: /* mov */
- case 2767: /* mova */
- value = 2767; /* --> mova. */
- break;
- case 2760: /* mov */
- case 2768: /* mova */
- value = 2768; /* --> mova. */
- break;
- case 2761: /* mov */
- case 2769: /* mova */
- value = 2769; /* --> mova. */
- break;
- case 2762: /* mov */
- case 2770: /* mova */
- value = 2770; /* --> mova. */
+ case A64_OPID_b820501f_stsmin_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8205000_ldsmin_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8205000_ldsmin_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_3860501f_stsminlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38605000_ldsminlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38605000_ldsminlb_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_7860501f_stsminlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78605000_ldsminlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78605000_ldsminlh_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_b860501f_stsminl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8605000_ldsminl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8605000_ldsminl_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_3820601f_stumaxb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38206000_ldumaxb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38206000_ldumaxb_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_7820601f_stumaxh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78206000_ldumaxh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78206000_ldumaxh_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_b820601f_stumax_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8206000_ldumax_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8206000_ldumax_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_3860601f_stumaxlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38606000_ldumaxlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38606000_ldumaxlb_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_7860601f_stumaxlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78606000_ldumaxlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78606000_ldumaxlh_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_b860601f_stumaxl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8606000_ldumaxl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8606000_ldumaxl_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_3820701f_stuminb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38207000_lduminb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38207000_lduminb_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_7820701f_stuminh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78207000_lduminh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78207000_lduminh_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_b820701f_stumin_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8207000_ldumin_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8207000_ldumin_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_3860701f_stuminlb_Rs_ADDR_SIMPLE:
+ case A64_OPID_38607000_lduminlb_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_38607000_lduminlb_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_7860701f_stuminlh_Rs_ADDR_SIMPLE:
+ case A64_OPID_78607000_lduminlh_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_78607000_lduminlh_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_b860701f_stuminl_Rs_ADDR_SIMPLE:
+ case A64_OPID_b8607000_lduminl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_b8607000_lduminl_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_1920041f_sttadd_Rs_ADDR_SIMPLE:
+ case A64_OPID_19200400_ldtadd_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_19200400_ldtadd_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_1960041f_sttaddl_Rs_ADDR_SIMPLE:
+ case A64_OPID_19600400_ldtaddl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_19600400_ldtaddl_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_1920141f_sttclr_Rs_ADDR_SIMPLE:
+ case A64_OPID_19201400_ldtclr_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_19201400_ldtclr_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_1960141f_sttclrl_Rs_ADDR_SIMPLE:
+ case A64_OPID_19601400_ldtclrl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_19601400_ldtclrl_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_1920341f_sttset_Rs_ADDR_SIMPLE:
+ case A64_OPID_19203400_ldtset_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_19203400_ldtset_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_1960341f_sttsetl_Rs_ADDR_SIMPLE:
+ case A64_OPID_19603400_ldtsetl_Rs_Rt_ADDR_SIMPLE:
+ value = A64_OPID_19603400_ldtsetl_Rs_Rt_ADDR_SIMPLE;
+ break;
+ case A64_OPID_12800000_mov_Rd_IMM_MOV:
+ case A64_OPID_12800000_movn_Rd_HALF:
+ value = A64_OPID_12800000_movn_Rd_HALF;
+ break;
+ case A64_OPID_52800000_mov_Rd_IMM_MOV:
+ case A64_OPID_52800000_movz_Rd_HALF:
+ value = A64_OPID_52800000_movz_Rd_HALF;
+ break;
+ case A64_OPID_d50322df_clrbhb:
+ case A64_OPID_d50323ff_autibsp:
+ case A64_OPID_d50323df_autibz:
+ case A64_OPID_d50323bf_autiasp:
+ case A64_OPID_d503239f_autiaz:
+ case A64_OPID_d503237f_pacibsp:
+ case A64_OPID_d503235f_pacibz:
+ case A64_OPID_d503233f_paciasp:
+ case A64_OPID_d503231f_paciaz:
+ case A64_OPID_d503227f_gcsb_BARRIER_GCSB:
+ case A64_OPID_d50322df_clearbhb:
+ case A64_OPID_d503225f_tsb_BARRIER_PSB:
+ case A64_OPID_d503223f_psb_BARRIER_PSB:
+ case A64_OPID_d503221f_esb:
+ case A64_OPID_d50321df_autib1716:
+ case A64_OPID_d503219f_autia1716:
+ case A64_OPID_d503215f_pacib1716:
+ case A64_OPID_d503211f_pacia1716:
+ case A64_OPID_d50320ff_xpaclri:
+ case A64_OPID_d50320df_dgh:
+ case A64_OPID_d50320bf_sevl:
+ case A64_OPID_d503209f_sev:
+ case A64_OPID_d503207f_wfi:
+ case A64_OPID_d503205f_wfe:
+ case A64_OPID_d503203f_yield:
+ case A64_OPID_d503241f_bti_BTI_TARGET:
+ case A64_OPID_d503229f_csdb:
+ case A64_OPID_d503201f_nop:
+ case A64_OPID_d503261f_stshh_STSHH_POLICY:
+ case A64_OPID_d503201f_hint_UIMM7:
+ value = A64_OPID_d503201f_hint_UIMM7;
+ break;
+ case A64_OPID_d503349f_pssbb:
+ case A64_OPID_d503309f_ssbb:
+ case A64_OPID_d5033c9f_dfb:
+ case A64_OPID_d503309f_dsb_BARRIER:
+ value = A64_OPID_d503309f_dsb_BARRIER;
+ break;
+ case A64_OPID_d503323f_dsb_BARRIER_DSB_NXS:
+ value = A64_OPID_d503323f_dsb_BARRIER_DSB_NXS;
+ break;
+ case A64_OPID_d50b72e0_trcit_Rt:
+ case A64_OPID_d5097280_brb_BRBOP_Rt_IN_SYS_ALIASES:
+ case A64_OPID_d50b73c0_cosp_SYSREG_SR_Rt:
+ case A64_OPID_d50b73e0_cpp_SYSREG_SR_Rt:
+ case A64_OPID_d50b73a0_dvp_SYSREG_SR_Rt:
+ case A64_OPID_d50b7380_cfp_SYSREG_SR_Rt:
+ case A64_OPID_d5080000_tlbi_SYSREG_TLBI_Rt_SYS:
+ case A64_OPID_d5080000_ic_SYSREG_IC_Rt_SYS:
+ case A64_OPID_d5080000_dc_SYSREG_DC_Rt:
+ case A64_OPID_d5080000_at_SYSREG_AT_Rt:
+ case A64_OPID_d5080000_sys_UIMM3_OP1_CRn_CRm_UIMM3_OP2_Rt:
+ value = A64_OPID_d5080000_sys_UIMM3_OP1_CRn_CRm_UIMM3_OP2_Rt;
+ break;
+ case A64_OPID_d5480000_tlbip_SYSREG_TLBIP_Rt_SYS_PAIRREG_OR_XZR:
+ case A64_OPID_d5480000_sysp_UIMM3_OP1_CRn_CRm_UIMM3_OP2_Rt_PAIRREG_OR_XZR:
+ value = A64_OPID_d5480000_sysp_UIMM3_OP1_CRn_CRm_UIMM3_OP2_Rt_PAIRREG_OR_XZR;
+ break;
+ case A64_OPID_d5031000_wfet_Rd:
+ value = A64_OPID_d5031000_wfet_Rd;
+ break;
+ case A64_OPID_d5031020_wfit_Rd:
+ value = A64_OPID_d5031020_wfit_Rd;
+ break;
+ case A64_OPID_05800000_bic_SVE_Zd_SVE_Zd_SVE_INV_LIMM:
+ case A64_OPID_05800000_and_SVE_Zd_SVE_Zd_SVE_LIMM:
+ value = A64_OPID_05800000_and_SVE_Zd_SVE_Zd_SVE_LIMM;
+ break;
+ case A64_OPID_25004000_mov_SVE_Pd_SVE_Pg4_10_SVE_Pn:
+ case A64_OPID_25004000_and_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25004000_and_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_25404000_movs_SVE_Pd_SVE_Pg4_10_SVE_Pn:
+ case A64_OPID_25404000_ands_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25404000_ands_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_24008000_cmple_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_24008000_cmpge_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_24008000_cmpge_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_24008010_cmplt_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_24008010_cmpgt_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_24008010_cmpgt_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_24000010_cmplo_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_24000010_cmphi_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_24000010_cmphi_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_24000000_cmpls_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_24000000_cmphs_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_24000000_cmphs_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_05208000_mov_SVE_Zd_SVE_Pg3_SVE_Vn:
+ case A64_OPID_05208000_cpy_SVE_Zd_SVE_Pg3_SVE_Vn:
+ value = A64_OPID_05208000_cpy_SVE_Zd_SVE_Pg3_SVE_Vn;
+ break;
+ case A64_OPID_0528a000_mov_SVE_Zd_SVE_Pg3_Rn_SP:
+ case A64_OPID_0528a000_cpy_SVE_Zd_SVE_Pg3_Rn_SP:
+ value = A64_OPID_0528a000_cpy_SVE_Zd_SVE_Pg3_Rn_SP;
+ break;
+ case A64_OPID_05104000_fmov_SVE_Zd_SVE_Pg4_16_FPIMM0:
+ case A64_OPID_05100000_mov_SVE_Zd_SVE_Pg4_16_SVE_ASIMM:
+ case A64_OPID_05100000_cpy_SVE_Zd_SVE_Pg4_16_SVE_ASIMM:
+ value = A64_OPID_05100000_cpy_SVE_Zd_SVE_Pg4_16_SVE_ASIMM;
+ break;
+ case A64_OPID_05203800_mov_SVE_Zd_Rn_SP:
+ case A64_OPID_05203800_dup_SVE_Zd_Rn_SP:
+ value = A64_OPID_05203800_dup_SVE_Zd_Rn_SP;
+ break;
+ case A64_OPID_05202000_mov_SVE_Zd_SVE_Zn_INDEX:
+ case A64_OPID_05202000_mov_SVE_Zd_SVE_VZn:
+ case A64_OPID_05202000_dup_SVE_Zd_SVE_Zn_INDEX:
+ value = A64_OPID_05202000_dup_SVE_Zd_SVE_Zn_INDEX;
+ break;
+ case A64_OPID_2538c000_fmov_SVE_Zd_FPIMM0:
+ case A64_OPID_2538c000_mov_SVE_Zd_SVE_ASIMM:
+ case A64_OPID_2538c000_dup_SVE_Zd_SVE_ASIMM:
+ value = A64_OPID_2538c000_dup_SVE_Zd_SVE_ASIMM;
+ break;
+ case A64_OPID_05c00000_mov_SVE_Zd_SVE_LIMM_MOV:
+ case A64_OPID_05c00000_dupm_SVE_Zd_SVE_LIMM:
+ value = A64_OPID_05c00000_dupm_SVE_Zd_SVE_LIMM;
+ break;
+ case A64_OPID_05400000_eon_SVE_Zd_SVE_Zd_SVE_INV_LIMM:
+ case A64_OPID_05400000_eor_SVE_Zd_SVE_Zd_SVE_LIMM:
+ value = A64_OPID_05400000_eor_SVE_Zd_SVE_Zd_SVE_LIMM;
+ break;
+ case A64_OPID_25004200_not_SVE_Pd_SVE_Pg4_10_SVE_Pn:
+ case A64_OPID_25004200_eor_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25004200_eor_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_25404200_nots_SVE_Pd_SVE_Pg4_10_SVE_Pn:
+ case A64_OPID_25404200_eors_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25404200_eors_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_6500c010_facle_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_6500c010_facge_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_6500c010_facge_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_6500e010_faclt_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_6500e010_facgt_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_6500e010_facgt_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_65004000_fcmle_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_65004000_fcmge_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_65004000_fcmge_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_65004010_fcmlt_SVE_Pd_SVE_Pg3_SVE_Zm_16_SVE_Zn:
+ case A64_OPID_65004010_fcmgt_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_65004010_fcmgt_SVE_Pd_SVE_Pg3_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_0510c000_fmov_SVE_Zd_SVE_Pg4_16_SVE_FPIMM8:
+ case A64_OPID_0510c000_fcpy_SVE_Zd_SVE_Pg4_16_SVE_FPIMM8:
+ value = A64_OPID_0510c000_fcpy_SVE_Zd_SVE_Pg4_16_SVE_FPIMM8;
+ break;
+ case A64_OPID_2539c000_fmov_SVE_Zd_SVE_FPIMM8:
+ case A64_OPID_2539c000_fdup_SVE_Zd_SVE_FPIMM8:
+ value = A64_OPID_2539c000_fdup_SVE_Zd_SVE_FPIMM8;
+ break;
+ case A64_OPID_85800000_ldr_SVE_PNt_SVE_ADDR_RI_S9xVL:
+ case A64_OPID_85800000_ldr_SVE_Pt_SVE_ADDR_RI_S9xVL:
+ value = A64_OPID_85800000_ldr_SVE_Pt_SVE_ADDR_RI_S9xVL;
+ break;
+ case A64_OPID_04603000_mov_SVE_Zd_SVE_Zn:
+ case A64_OPID_04603000_orr_SVE_Zd_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_04603000_orr_SVE_Zd_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_05000000_orn_SVE_Zd_SVE_Zd_SVE_INV_LIMM:
+ case A64_OPID_05000000_orr_SVE_Zd_SVE_Zd_SVE_LIMM:
+ value = A64_OPID_05000000_orr_SVE_Zd_SVE_Zd_SVE_LIMM;
+ break;
+ case A64_OPID_25804000_mov_SVE_PNd_SVE_PNn:
+ case A64_OPID_25804000_mov_SVE_Pd_SVE_Pn:
+ case A64_OPID_25804000_orr_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25804000_orr_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_25c04000_movs_SVE_Pd_SVE_Pn:
+ case A64_OPID_25c04000_orrs_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25c04000_orrs_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_2518e400_pfalse_SVE_PNd:
+ case A64_OPID_2518e400_pfalse_SVE_Pd:
+ value = A64_OPID_2518e400_pfalse_SVE_Pd;
+ break;
+ case A64_OPID_0520c000_mov_SVE_Zd_SVE_Pg4_10_SVE_Zn:
+ case A64_OPID_0520c000_sel_SVE_Zd_SVE_Pg4_10_SVE_Zn_SVE_Zm_16:
+ value = A64_OPID_0520c000_sel_SVE_Zd_SVE_Pg4_10_SVE_Zn_SVE_Zm_16;
+ break;
+ case A64_OPID_25004210_mov_SVE_Pd_SVE_Pg4_10_SVE_Pn:
+ case A64_OPID_25004210_sel_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm:
+ value = A64_OPID_25004210_sel_SVE_Pd_SVE_Pg4_10_SVE_Pn_SVE_Pm;
+ break;
+ case A64_OPID_e5800000_str_SVE_PNt_SVE_ADDR_RI_S9xVL:
+ case A64_OPID_e5800000_str_SVE_Pt_SVE_ADDR_RI_S9xVL:
+ value = A64_OPID_e5800000_str_SVE_Pt_SVE_ADDR_RI_S9xVL;
+ break;
+ case A64_OPID_c0020000_mov_SVE_Zd_SVE_Pg3_SME_ZA_HV_idx_src:
+ case A64_OPID_c0020000_mova_SVE_Zd_SVE_Pg3_SME_ZA_HV_idx_src:
+ value = A64_OPID_c0020000_mova_SVE_Zd_SVE_Pg3_SME_ZA_HV_idx_src;
+ break;
+ case A64_OPID_c0000000_mov_SME_ZA_HV_idx_dest_SVE_Pg3_SVE_Zn:
+ case A64_OPID_c0000000_mova_SME_ZA_HV_idx_dest_SVE_Pg3_SVE_Zn:
+ value = A64_OPID_c0000000_mova_SME_ZA_HV_idx_dest_SVE_Pg3_SVE_Zn;
+ break;
+ case A64_OPID_25204000_psel_SVE_PNd_SVE_PNg4_10_SME_PnT_Wm_imm:
+ case A64_OPID_25204000_psel_SVE_Pd_SVE_Pg4_10_SME_PnT_Wm_imm:
+ value = A64_OPID_25204000_psel_SVE_Pd_SVE_Pg4_10_SME_PnT_Wm_imm;
+ break;
+ case A64_OPID_c0060800_mov_SME_Zdnx2_SME_ZA_array_off3_5:
+ case A64_OPID_c0060800_mova_SME_Zdnx2_SME_ZA_array_off3_5:
+ value = A64_OPID_c0060800_mova_SME_Zdnx2_SME_ZA_array_off3_5;
+ break;
+ case A64_OPID_c0060c00_mov_SME_Zdnx4_SME_ZA_array_off3_5:
+ case A64_OPID_c0060c00_mova_SME_Zdnx4_SME_ZA_array_off3_5:
+ value = A64_OPID_c0060c00_mova_SME_Zdnx4_SME_ZA_array_off3_5;
+ break;
+ case A64_OPID_c0060000_mov_SME_Zdnx2_SME_ZA_HV_idx_srcxN:
+ case A64_OPID_c0060000_mova_SME_Zdnx2_SME_ZA_HV_idx_srcxN:
+ value = A64_OPID_c0060000_mova_SME_Zdnx2_SME_ZA_HV_idx_srcxN;
+ break;
+ case A64_OPID_c0060400_mov_SME_Zdnx4_SME_ZA_HV_idx_srcxN:
+ case A64_OPID_c0060400_mova_SME_Zdnx4_SME_ZA_HV_idx_srcxN:
+ value = A64_OPID_c0060400_mova_SME_Zdnx4_SME_ZA_HV_idx_srcxN;
+ break;
+ case A64_OPID_c0040800_mov_SME_ZA_array_off3_0_SME_Znx2:
+ case A64_OPID_c0040800_mova_SME_ZA_array_off3_0_SME_Znx2:
+ value = A64_OPID_c0040800_mova_SME_ZA_array_off3_0_SME_Znx2;
+ break;
+ case A64_OPID_c0040c00_mov_SME_ZA_array_off3_0_SME_Znx4:
+ case A64_OPID_c0040c00_mova_SME_ZA_array_off3_0_SME_Znx4:
+ value = A64_OPID_c0040c00_mova_SME_ZA_array_off3_0_SME_Znx4;
+ break;
+ case A64_OPID_c0040000_mov_SME_ZA_HV_idx_destxN_SME_Znx2:
+ case A64_OPID_c0040000_mova_SME_ZA_HV_idx_destxN_SME_Znx2:
+ value = A64_OPID_c0040000_mova_SME_ZA_HV_idx_destxN_SME_Znx2;
+ break;
+ case A64_OPID_c0040400_mov_SME_ZA_HV_idx_destxN_SME_Znx4:
+ case A64_OPID_c0040400_mova_SME_ZA_HV_idx_destxN_SME_Znx4:
+ value = A64_OPID_c0040400_mova_SME_ZA_HV_idx_destxN_SME_Znx4;
break;
default: return NULL;
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index db6e9b49f68..6e66d54885b 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -19,11 +19,12 @@
see <http://www.gnu.org/licenses/>. */
#include "sysdep.h"
+#include "aarch64-tbl-2.h"
#include "aarch64-dis.h"
/* Called by aarch64_opcode_lookup. */
-static int
+static enum aarch64_opcode_idx
aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 26) & 0x1) == 0)
@@ -48,9 +49,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000000xxxxxxxxxxxxxxxxxxxxx
- udf. */
- return 794;
+ x0000000000xxxxxxxxxxxxxxxxxxxxx. */
+ return A64_OPID_00000000_udf_UNDEFINED;
}
else
{
@@ -60,17 +60,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000100xxxxxxxxxxxxxxxx00xxx
- fmopa. */
- return 2506;
+ x0000000100xxxxxxxxxxxxxxxx00xxx. */
+ return A64_OPID_80800000_fmopa_SME_ZAda_2b_SVE_Pg3_SME_Pm_SVE_Zn_SVE_Zm_16;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000100xxxxxxxxxxxxxxxx10xxx
- fmops. */
- return 2509;
+ x0000000100xxxxxxxxxxxxxxxx10xxx. */
+ return A64_OPID_80800010_fmops_SME_ZAda_2b_SVE_Pg3_SME_Pm_SVE_Zn_SVE_Zm_16;
}
}
else
@@ -79,17 +77,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000100xxxxxxxxxxxxxxxx01xxx
- bmopa. */
- return 2610;
+ x0000000100xxxxxxxxxxxxxxxx01xxx. */
+ return A64_OPID_80800008_bmopa_SME_ZAda_2b_SVE_Pg3_SME_Pm_SVE_Zn_SVE_Zm_16;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000100xxxxxxxxxxxxxxxx11xxx
- bmops. */
- return 2611;
+ x0000000100xxxxxxxxxxxxxxxx11xxx. */
+ return A64_OPID_80800018_bmops_SME_ZAda_2b_SVE_Pg3_SME_Pm_SVE_Zn_SVE_Zm_16;
}
}
}
@@ -100,17 +96,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000x10xxxxxxxxxxxxxxxx0xxxx
- fmopa. */
- return 2507;
+ x0000000x10xxxxxxxxxxxxxxxx0xxxx. */
+ return A64_OPID_80c00000_fmopa_SME_ZAda_3b_SVE_Pg3_SME_Pm_SVE_Zn_SVE_Zm_16;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0000000x10xxxxxxxxxxxxxxxx1xxxx
- fmops. */
- return 2510;
+ x0000000x10xxxxxxxxxxxxxxxx1xxxx. */
+ return A64_OPID_80c00010_fmops_SME_ZAda_3b_SVE_Pg3_SME_Pm_SVE_Zn_SVE_Zm_16;
}
}
}
@@ -126,9 +120,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx00000xxxxxxxxxxxxxxxxx
- mova. */
- return 2532;
+ x1000000xx00000xxxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0000000_mova_SME_ZA_HV_idx_dest_SVE_Pg3_SVE_Zn;
}
else
{
@@ -138,17 +131,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x0010000xxxxxxxxxxxxxxxx
- addha. */
- return 2498;
+ x1000000x0010000xxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0900000_addha_SME_ZAda_2b_SVE_Pg3_SME_Pm_SVE_Zn;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x1010000xxxxxxxxxxxxxxxx
- addha. */
- return 2499;
+ x1000000x1010000xxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0d00000_addha_SME_ZAda_3b_SVE_Pg3_SME_Pm_SVE_Zn;
}
}
else
@@ -157,17 +148,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x0010001xxxxxxxxxxxxxxxx
- addva. */
- return 2502;
+ x1000000x0010001xxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0910000_addva_SME_ZAda_2b_SVE_Pg3_SME_Pm_SVE_Zn;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x1010001xxxxxxxxxxxxxxxx
- addva. */
- return 2503;
+ x1000000x1010001xxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0d10000_addva_SME_ZAda_3b_SVE_Pg3_SME_Pm_SVE_Zn;
}
}
}
@@ -178,17 +167,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x00x100xxxxxxxxxxxxxxxxx
- zero. */
- return 2533;
+ x1000000x00x100xxxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0080000_zero_SME_list_of_64bit_tiles;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x10x100xxxxxxxxxxxxxxxxx
- zero. */
- return 3040;
+ x1000000x10x100xxxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0480001_zero_SME_ZT0_LIST;
}
}
}
@@ -200,9 +187,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0x001xxxxxxx0xxxxxxxxx
- mova. */
- return 2531;
+ x1000000xx0x001xxxxxxx0xxxxxxxxx. */
+ return A64_OPID_c0020000_mova_SVE_Zd_SVE_Pg3_SME_ZA_HV_idx_src;
}
else
{
@@ -214,17 +200,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000x0010xxxxxx1xxxxxxxxx
- movaz. */
- return 3505;
+ x1000000000x0010xxxxxx1xxxxxxxxx. */
+ return A64_OPID_c0020200_movaz_SVE_Zd_SME_ZA_ARRAY4;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000100x0010xxxxxx1xxxxxxxxx
- movaz. */
- return 3507;
+ x1000000100x0010xxxxxx1xxxxxxxxx. */
+ return A64_OPID_c0820200_movaz_SVE_Zd_SME_ZA_ARRAY4;
}
}
else
@@ -233,17 +217,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000010x0010xxxxxx1xxxxxxxxx
- movaz. */
- return 3506;
+ x1000000010x0010xxxxxx1xxxxxxxxx. */
+ return A64_OPID_c0420200_movaz_SVE_Zd_SME_ZA_ARRAY4;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000110x0010xxxxxx1xxxxxxxxx
- movaz. */
- return 3508;
+ x1000000110x0010xxxxxx1xxxxxxxxx. */
+ return A64_OPID_c0c20200_movaz_SVE_Zd_SME_ZA_ARRAY4;
}
}
}
@@ -251,9 +233,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0x0011xxxxxx1xxxxxxxxx
- movaz. */
- return 3509;
+ x1000000xx0x0011xxxxxx1xxxxxxxxx. */
+ return A64_OPID_c0c30200_movaz_SVE_Zd_SME_ZA_ARRAY4;
}
}
}
@@ -269,35 +250,31 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x000101x00xxxxxxxxxxxxxx
- luti4. */
- return 3645;
+ x1000000x000101x00xxxxxxxxxxxxxx. */
+ return A64_OPID_c08b0000_luti4_SME_Zdnx4_SME_ZT0_SME_Znx2_BIT_INDEX;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x000101x10xxxxxxxxxxxxxx
- luti4. */
- return 2754;
+ x1000000x000101x10xxxxxxxxxxxxxx. */
+ return A64_OPID_c08a8000_luti4_SME_Zdnx4_SME_ZT0_SME_Zn_INDEX1_16;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x000101xx1xxxxxxxxxxxxxx
- luti4. */
- return 2753;
+ x1000000x000101xx1xxxxxxxxxxxxxx. */
+ return A64_OPID_c08a4000_luti4_SME_Zdnx2_SME_ZT0_SME_Zn_INDEX2_15;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000x100101xxxxxxxxxxxxxxxxx
- luti4. */
- return 2752;
+ x1000000x100101xxxxxxxxxxxxxxxxx. */
+ return A64_OPID_c0ca0000_luti4_SVE_Zd_SME_ZT0_SME_Zn_INDEX3_14;
}
}
else
@@ -308,26 +285,23 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx01101x00xxxxxxxxxxxxxx
- luti4. */
- return 3646;
+ x1000000xx01101x00xxxxxxxxxxxxxx. */
+ return A64_OPID_c09b0000_luti4_SME_Ztx4_STRIDED_SME_ZT0_SME_Znx2_BIT_INDEX;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx01101x10xxxxxxxxxxxxxx
- luti4. */
- return 3502;
+ x1000000xx01101x10xxxxxxxxxxxxxx. */
+ return A64_OPID_c09a9000_luti4_SME_Ztx4_STRIDED_SME_ZT0_SME_Zn_INDEX1_16;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx01101xx1xxxxxxxxxxxxxx
- luti4. */
- return 3501;
+ x1000000xx01101xx1xxxxxxxxxxxxxx. */
+ return A64_OPID_c09a4000_luti4_SME_Ztx2_STRIDED_SME_ZT0_SME_Zn_INDEX2_15;
}
}
}
@@ -345,9 +319,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0x010xxxxx00xxxxxxxxxx
- mova. */
- return 2769;
+ x1000000xx0x010xxxxx00xxxxxxxxxx. */
+ return A64_OPID_c0040000_mova_SME_ZA_HV_idx_destxN_SME_Znx2;
}
else
{
@@ -355,9 +328,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0x011xxxxx000xxxxxxxxx
- mova. */
- return 2765;
+ x1000000xx0x011xxxxx000xxxxxxxxx. */
+ return A64_OPID_c0060000_mova_SME_Zdnx2_SME_ZA_HV_idx_srcxN;
}
else
{
@@ -367,17 +339,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000x011xxxxx001xxxxxxxxx
- movaz. */
- return 3495;
+ x1000000000x011xxxxx001xxxxxxxxx. */
+ return A64_OPID_c0060200_movaz_SME_Zdnx2_SME_ZA_array_vrsb_1;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000100x011xxxxx001xxxxxxxxx
- movaz. */
- return 3497;
+ x1000000100x011xxxxx001xxxxxxxxx. */
+ return A64_OPID_c0860200_movaz_SME_Zdnx2_SME_ZA_array_vrss_1;
}
}
else
@@ -386,17 +356,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000010x011xxxxx001xxxxxxxxx
- movaz. */
- return 3496;
+ x1000000010x011xxxxx001xxxxxxxxx. */
+ return A64_OPID_c0460200_movaz_SME_Zdnx2_SME_ZA_array_vrsh_1;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000110x011xxxxx001xxxxxxxxx
- movaz. */
- return 3498;
+ x1000000110x011xxxxx001xxxxxxxxx. */
+ return A64_OPID_c0c60200_movaz_SME_Zdnx2_SME_ZA_array_vrsd_1;
}
}
}
@@ -418,17 +386,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011000xxx00xxxxxxxxxx
- zero. */
- return 3510;
+ x1000000000011000xxx00xxxxxxxxxx. */
+ return A64_OPID_c00c0000_zero_SME_ZA_array_off3_0;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011100xxx00xxxxxxxxxx
- zero. */
- return 3511;
+ x1000000000011100xxx00xxxxxxxxxx. */
+ return A64_OPID_c00e0000_zero_SME_ZA_array_off3_0;
}
}
else
@@ -437,17 +403,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011010xxx00xxxxxxxxxx
- zero. */
- return 3513;
+ x1000000000011010xxx00xxxxxxxxxx. */
+ return A64_OPID_c00d0000_zero_SME_ZA_array_off2x2;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011110xxx00xxxxxxxxxx
- zero. */
- return 3516;
+ x1000000000011110xxx00xxxxxxxxxx. */
+ return A64_OPID_c00f0000_zero_SME_ZA_array_off1x4;
}
}
}
@@ -459,17 +423,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011001xxx00xxxxxxxxxx
- zero. */
- return 3512;
+ x1000000000011001xxx00xxxxxxxxxx. */
+ return A64_OPID_c00c8000_zero_SME_ZA_array_off3x2;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011101xxx00xxxxxxxxxx
- zero. */
- return 3515;
+ x1000000000011101xxx00xxxxxxxxxx. */
+ return A64_OPID_c00e8000_zero_SME_ZA_array_off2x4;
}
}
else
@@ -478,17 +440,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011011xxx00xxxxxxxxxx
- zero. */
- return 3514;
+ x1000000000011011xxx00xxxxxxxxxx. */
+ return A64_OPID_c00d8000_zero_SME_ZA_array_off2x2;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000000011111xxx00xxxxxxxxxx
- zero. */
- return 3517;
+ x1000000000011111xxx00xxxxxxxxxx. */
+ return A64_OPID_c00f8000_zero_SME_ZA_array_off1x4;
}
}
}
@@ -499,17 +459,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000100011xxx0xx00xxxxxxxxxx
- luti2. */
- return 2751;
+ x1000000100011xxx0xx00xxxxxxxxxx. */
+ return A64_OPID_c08c8000_luti2_SME_Zdnx4_SME_ZT0_SME_Zn_INDEX2_16;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000100011xxx1xx00xxxxxxxxxx
- luti2. */
- return 2750;
+ x1000000100011xxx1xx00xxxxxxxxxx. */
+ return A64_OPID_c08c4000_luti2_SME_Zdnx2_SME_ZT0_SME_Zn_INDEX3_15;
}
}
}
@@ -523,35 +481,31 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x100000001001100xxxx00xxxxxxxxxx
- movt. */
- return 2772;
+ x100000001001100xxxx00xxxxxxxxxx. */
+ return A64_OPID_c04c03e0_movt_Rt_SME_ZT0_INDEX;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x100000001001110xxxx00xxxxxxxxxx
- movt. */
- return 2771;
+ x100000001001110xxxx00xxxxxxxxxx. */
+ return A64_OPID_c04e03e0_movt_SME_ZT0_INDEX_Rt;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000010011x1xxxx00xxxxxxxxxx
- movt. */
- return 3647;
+ x1000000010011x1xxxx00xxxxxxxxxx. */
+ return A64_OPID_c04f03e0_movt_SME_ZT0_INDEX_MUL_VL_SVE_Zt;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000110011xxxxxx00xxxxxxxxxx
- luti2. */
- return 2749;
+ x1000000110011xxxxxx00xxxxxxxxxx. */
+ return A64_OPID_c0cc0000_luti2_SVE_Zd_SME_ZT0_SME_Zn_INDEX4_14;
}
}
}
@@ -561,17 +515,15 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0111xxx0xx00xxxxxxxxxx
- luti2. */
- return 3500;
+ x1000000xx0111xxx0xx00xxxxxxxxxx. */
+ return A64_OPID_c09c8000_luti2_SME_Ztx4_STRIDED_SME_ZT0_SME_Zn_INDEX2_16;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0111xxx1xx00xxxxxxxxxx
- luti2. */
- return 3499;
+ x1000000xx0111xxx1xx00xxxxxxxxxx. */
+ return A64_OPID_c09c4000_luti2_SME_Ztx2_STRIDED_SME_ZT0_SME_Zn_INDEX3_15;
}
}
}
@@ -582,9 +534,8 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
[...]
[diff truncated at 100000 bytes]
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