[binutils-gdb] aarch64: Fix operand name MOPS_WB_Rd -> MOPS_WB_Rn

[Richard Earnshaw]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=6a35f84cebc9370f2010e9d3ee72692ba1b4b65d

commit 6a35f84cebc9370f2010e9d3ee72692ba1b4b65d
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Tue Jul 15 17:32:20 2025 +0100

    aarch64: Fix operand name MOPS_WB_Rd -> MOPS_WB_Rn
    
    This field was misnamed in aarch64_opcode_table.  It previously didn't
    matter too much as the name field only appeared in dumps.  But it
    doesn't match the enum in include/opcode/aarch64.h and we will shortly
    start to rely on that.

Diff:
---
 opcodes/aarch64-opc-2.c | 2 +-
 opcodes/aarch64-tbl.h   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 58393f5a6b3..ed2de3ee0d2 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -355,7 +355,7 @@ const struct aarch64_operand aarch64_operands[] =
   {AARCH64_OPND_CLASS_SIMD_ELEMENT, "SM3_IMM2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SM3_imm2}, "an indexed SM3 vector immediate"},
   {AARCH64_OPND_CLASS_INT_REG, "MOPS_ADDR_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a register destination address with writeback"},
   {AARCH64_OPND_CLASS_INT_REG, "MOPS_ADDR_Rs", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rs}, "a register source address with writeback"},
-  {AARCH64_OPND_CLASS_INT_REG, "MOPS_WB_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer register with writeback"},
+  {AARCH64_OPND_CLASS_INT_REG, "MOPS_WB_Rn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer register with writeback"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "CSSC_SIMM8", OPD_F_SEXT | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CSSC_imm8}, "an 8-bit signed immediate"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "CSSC_UIMM8", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CSSC_imm8}, "an 8-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_ADDRESS, "RCPC3_ADDR_OPT_POSTIND", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_opc2}, "an address with post-incrementing by ammount of loaded bytes"},
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index b23fc7c6bc5..0ae7342e2e1 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -8199,7 +8199,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
       "a register destination address with writeback")			\
     Y(INT_REG, x0_to_x30, "MOPS_ADDR_Rs", 0, F(FLD_Rs),			\
       "a register source address with writeback")			\
-    Y(INT_REG, x0_to_x30, "MOPS_WB_Rd", 0, F(FLD_Rn),			\
+    Y(INT_REG, x0_to_x30, "MOPS_WB_Rn", 0, F(FLD_Rn),			\
       "an integer register with writeback")				\
     Y(IMMEDIATE, imm, "CSSC_SIMM8", OPD_F_SEXT, F(FLD_CSSC_imm8),	\
       "an 8-bit signed immediate")					\