[binutils-gdb] s390: Do not warn about vector index register 0 in assembly

[Jens Remus]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=d77c7ae0835aec204d7d3247e187103f78d81290

commit d77c7ae0835aec204d7d3247e187103f78d81290
Author: Jens Remus <jremus@linux.ibm.com>
Date:   Mon Jan 27 16:48:58 2025 +0100

    s390: Do not warn about vector index register 0 in assembly
    
    Vector index registers are currently only used in the VRV instruction
    format.  Unlike general purpose index registers an operand value of
    zero (e.g. %v0, 0, or omitted) does not imply a zero value:
    
    "For VRV format instructions, a vector element is used in the formation
    of the intermediate value.  This vector element is an unsigned binary
    integer value that is added to the base address and 12-bit displacement
    to form a 64-bit intermediate sum.  The vector element is designated by
    a vector register and an element index.  A zero V field accesses the
    element in vector register zero and does not imply a zero value." [1]
    
    Therefore when using s390-specific assembler option "-mwarn-areg-zero"
    do not warn if vector index register 0 is specified.
    
    [1]: IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16,
         https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf
    
    gas/
            * config/tc-s390.c (md_gather_operands): Do not warn about
            vector index register 0.
    
    gas/testsuite/
            * gas/s390/zarch-warn-areg-zero.l (vgef): Do not expect warning
            about vector index register 0.
    
    Signed-off-by: Jens Remus <jremus@linux.ibm.com>

Diff:
---
 gas/config/tc-s390.c                          | 1 +
 gas/testsuite/gas/s390/zarch-warn-areg-zero.l | 8 --------
 2 files changed, 1 insertion(+), 8 deletions(-)

diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index b651acc3cf9..274bd944bab 100644
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -1506,6 +1506,7 @@ md_gather_operands (char *str,
 		as_bad (_("operand %d: invalid length field specified"),
 			operand_number);
 	      if ((operand->flags & S390_OPERAND_INDEX)
+		  && !(operand->flags & S390_OPERAND_VR)
 		  && ex.X_add_number == 0
 		  && warn_areg_zero)
 		as_warn (_("operand %d: index register specified but zero"),
diff --git a/gas/testsuite/gas/s390/zarch-warn-areg-zero.l b/gas/testsuite/gas/s390/zarch-warn-areg-zero.l
index daa23b002bd..eed8cc60111 100644
--- a/gas/testsuite/gas/s390/zarch-warn-areg-zero.l
+++ b/gas/testsuite/gas/s390/zarch-warn-areg-zero.l
@@ -57,19 +57,11 @@
 .*:85: Warning: operand 2: base register specified but zero
 .*:88: Warning: operand 2: base register specified but zero
 .*:89: Warning: operand 2: base register specified but zero
-.*:96: Warning: operand 2: index register specified but zero
-.*:97: Warning: operand 2: index register specified but zero
 .*:100: Warning: operand 2: base register specified but zero
 .*:101: Warning: operand 2: base register specified but zero
-.*:103: Warning: operand 2: index register specified but zero
 .*:103: Warning: operand 2: base register specified but zero
-.*:104: Warning: operand 2: index register specified but zero
 .*:104: Warning: operand 2: base register specified but zero
-.*:105: Warning: operand 2: index register specified but zero
-.*:106: Warning: operand 2: index register specified but zero
 .*:106: Warning: operand 2: base register specified but zero
-.*:107: Warning: operand 2: index register specified but zero
 .*:107: Warning: operand 2: base register specified but zero
-.*:108: Warning: operand 2: index register specified but zero
 .*:109: Warning: operand 2: base register specified but zero
 .*:110: Warning: operand 2: base register specified but zero