[binutils-gdb] Fix some broken links in docs and comments

[Yury Khrustalev]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=2a20abdd819fe58bec8b923cadae17171fd5aeda

commit 2a20abdd819fe58bec8b923cadae17171fd5aeda
Author: Yury Khrustalev <yury.khrustalev@arm.com>
Date:   Thu Jan 23 15:24:31 2025 +0000

    Fix some broken links in docs and comments
    
    Reviewed-By Richard Earnshaw <richard.earnshaw@arm.com>

Diff:
---
 gas/doc/c-aarch64.texi | 10 +++++-----
 gas/doc/c-arm.texi     |  3 ++-
 gdb/arm-tdep.c         |  2 +-
 gold/aarch64.cc        |  2 +-
 ld/ld.texi             |  6 +++---
 5 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index e75995323e9..76f65d7c3f9 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -374,9 +374,9 @@ The @samp{#} can be optionally used to indicate immediate operands.
 
 @cindex AArch64 register names
 @cindex register names, AArch64
-Please refer to the section @samp{4.4 Register Names} of
-@samp{ARMv8 Instruction Set Overview}, which is available at
-@uref{http://infocenter.arm.com}.
+Please refer to the section @samp{Register names} of @samp{Arm
+Architecture Reference Manual for A-profile architecture}, which
+is available at @uref{https://developer.arm.com/}.
 
 @node AArch64-Relocations
 @subsection Relocations
@@ -626,8 +626,8 @@ already there) and a PC-relative LDR instruction will be generated.
 @end table
 
 For more information on the AArch64 instruction set and assembly language
-notation, see @samp{ARMv8 Instruction Set Overview} available at
-@uref{http://infocenter.arm.com}.
+notation, see @samp{Arm Architecture Reference Manual for A-profile
+architecture} available at @uref{https://developer.arm.com/}.
 
 
 @node AArch64 Mapping Symbols
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index 82c938d11b9..3a38d0729d6 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -1530,5 +1530,6 @@ The pseudo ops described above are sufficient for writing assembly
 code that calls functions which may throw exceptions.  If you need to
 know more about the object-file format used to represent unwind
 information, you may consult the @cite{Exception Handling ABI for the
-ARM Architecture} available from @uref{http://infocenter.arm.com}.
+Arm Architecture} available from
+@uref{https://github.com/ARM-software/abi-aa/blob/main/ehabi32/ehabi32.rst}.
 
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index b5273c4a049..0c15215b30c 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -6669,7 +6669,7 @@ install_load_store (struct gdbarch *gdbarch, struct regcache *regs,
      Otherwise we don't know what value to write for PC, since the offset is
      architecture-dependent (sometimes PC+8, sometimes PC+12).  More details
      of this can be found in Section "Saving from r15" in
-     http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204g/Cihbjifh.html */
+     https://developer.arm.com/documentation/dui0204/g/ */
 
   dsc->cleanup = load ? &cleanup_load : &cleanup_store;
 }
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index a0a59643b04..fb29a092162 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -2892,7 +2892,7 @@ AArch64_reloc_property_table* aarch64_reloc_property_table = NULL;
 
 // The aarch64 target class.
 // See the ABI at
-// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0056b/IHI0056B_aaelf64.pdf
+// https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst
 template<int size, bool big_endian>
 class Target_aarch64 : public Sized_target<size, big_endian>
 {
diff --git a/ld/ld.texi b/ld/ld.texi
index f6384ad82dd..6d51ccbe572 100644
--- a/ld/ld.texi
+++ b/ld/ld.texi
@@ -8055,9 +8055,9 @@ in certain ARM1176 processors.  The workaround is enabled by default if you
 are targeting ARM v6 (excluding ARM v6T2) or earlier.  It can be disabled
 unconditionally by specifying @samp{--no-fix-arm1176}.
 
-Further information is available in the ``ARM1176JZ-S and ARM1176JZF-S
-Programmer Advice Notice'' available on the ARM documentation website at:
-http://infocenter.arm.com/.
+Further information is available in ``ARM1176JZ-S and ARM1176JZF-S
+Programmer Advice Notice'' (UAN0002) available on the Arm documentation
+website at @uref{https://developer.arm.com/}.
 
 @cindex STM32L4xx erratum workaround
 @kindex --fix-stm32l4xx-629360