[binutils-gdb] x86: have .insn correctly consider AVX10.2's 256-bit embedded rounding
Jan Beulich
jbeulich@sourceware.org
Fri Jan 17 09:29:11 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=247357d23f48c503a3efe56997e73489360c4279
commit 247357d23f48c503a3efe56997e73489360c4279
Author: Jan Beulich <jbeulich@suse.com>
Date: Fri Jan 17 10:27:54 2025 +0100
x86: have .insn correctly consider AVX10.2's 256-bit embedded rounding
Deriving operand size may no longer assume 512-bit vector size when
embedded rounding is in use. In fact it was apparently wrong to do so
in the first place, as that's not correct for scalar insns. Drop the
rounding type check altogether; we fall back to EVEX.LIG when no
suitable operand was specified anyway, later in the function (and, btw,
similarly for VEX encodings).
Diff:
---
gas/config/tc-i386.c | 4 ++--
gas/testsuite/gas/i386/evex.s | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index ea370071282..87926192093 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -13902,8 +13902,8 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
{
if (!i.tm.opcode_modifier.evex)
{
- /* Do _not_ consider AVX512VL here. */
- if (i.rounding.type != rc_none || combined.bitfield.zmmword)
+ /* Do _not_ consider AVX512VL / AVX10.2 here. */
+ if (combined.bitfield.zmmword)
i.tm.opcode_modifier.evex = EVEX512;
else if (combined.bitfield.ymmword)
i.tm.opcode_modifier.evex = EVEX256;
diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s
index 473ea8a2418..890eed9d8eb 100644
--- a/gas/testsuite/gas/i386/evex.s
+++ b/gas/testsuite/gas/i386/evex.s
@@ -13,7 +13,7 @@ _start:
.insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
- .insn EVEX.512.F3.0F.W0 0xe6, {rd-sae},%zmm5,%ymm6
- .insn EVEX.256.F3.0F.W0 0xe6, {rd-sae},%ymm5,%xmm6
- .insn EVEX.512.F3.0F.W0 0x7a, {rd-sae},%zmm5,%ymm6
- .insn EVEX.256.F3.0F.W0 0x7a, {rd-sae},%ymm5,%xmm6
+ .insn EVEX.F3.0F.W0 0xe6, {rd-sae},%zmm5,%ymm6
+ .insn EVEX.F3.0F.W0 0xe6, {rd-sae},%ymm5,%xmm6
+ .insn EVEX.F3.0F.W0 0x7a, {rd-sae},%zmm5,%ymm6
+ .insn EVEX.F3.0F.W0 0x7a, {rd-sae},%ymm5,%xmm6
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