[binutils-gdb] aarch64: Accept .b/.h/.s in movaz (array to vector)
Alice Carlotti
acarlotti@sourceware.org
Mon Dec 29 12:03:42 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=9d5dd3b3429d7d68d1d67a46ac23ffb4cd95d99c
commit 9d5dd3b3429d7d68d1d67a46ac23ffb4cd95d99c
Author: Alice Carlotti <alice.carlotti@arm.com>
Date: Sat Dec 27 20:46:25 2025 +0000
aarch64: Accept .b/.h/.s in movaz (array to vector)
While the .d form is preferred for disassembly, assemblers should accept
any element size that is used consistently. The sme2_mov class handles
this already for mov instructions, so use that here as well.
Diff:
---
gas/testsuite/gas/aarch64/sme2p1-3-bad.l | 22 ++++++++++++++++------
gas/testsuite/gas/aarch64/sme2p1-3-bad.s | 2 --
gas/testsuite/gas/aarch64/sme2p1-3.d | 24 ++++++++++++++++++++++++
gas/testsuite/gas/aarch64/sme2p1-3.s | 24 ++++++++++++++++++++++++
opcodes/aarch64-tbl.h | 4 ++--
5 files changed, 66 insertions(+), 10 deletions(-)
diff --git a/gas/testsuite/gas/aarch64/sme2p1-3-bad.l b/gas/testsuite/gas/aarch64/sme2p1-3-bad.l
index 94dc67bb1fe..61cf9873779 100644
--- a/gas/testsuite/gas/aarch64/sme2p1-3-bad.l
+++ b/gas/testsuite/gas/aarch64/sme2p1-3-bad.l
@@ -1,13 +1,18 @@
.*: Assembler messages:
.*: Error: operand mismatch -- `movaz {z0.s ?- ?z1.s},za.d\[w8,0,vgx2\]'
.*: Info: did you mean this\?
+.*: Info: movaz {z0.s-z1.s}, za.s\[w8, 0, vgx2\]
+.*: Info: other valid variant\(s\):
+.*: Info: movaz {z0.b-z1.b}, za.b\[w8, 0, vgx2\]
+.*: Info: movaz {z0.h-z1.h}, za.h\[w8, 0, vgx2\]
.*: Info: movaz {z0.d-z1.d}, za.d\[w8, 0, vgx2\]
.*: Error: operand mismatch -- `movaz {z30.h ?- ?z31.h},za.d\[w8,0,vgx2\]'
.*: Info: did you mean this\?
+.*: Info: movaz {z30.h-z31.h}, za.h\[w8, 0, vgx2\]
+.*: Info: other valid variant\(s\):
+.*: Info: movaz {z30.b-z31.b}, za.b\[w8, 0, vgx2\]
+.*: Info: movaz {z30.s-z31.s}, za.s\[w8, 0, vgx2\]
.*: Info: movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\]
-.*: Error: operand mismatch -- `movaz {z0.b ?- ?z1.b},za.b\[w11,0,vgx2\]'
-.*: Info: did you mean this\?
-.*: Info: movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\]
.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d ?- ?z1.d},za.d\[w13,7,vgx2\]'
.*: Error: immediate offset out of range 0 to 7 at operand 2 -- `movaz {z30.d ?- ?z31.d},za.d\[w11,15,vgx2\]'
.*: Error: invalid vector group size at operand 2 -- `movaz {z14.d ?- ?z15.d},za.d\[w9,4,vgx3\]'
@@ -15,13 +20,18 @@
.*: Error: missing immediate offset at operand 2 -- `movaz {z2.d ?- ?z4.d},za.d\[w10 6\]'
.*: Error: operand mismatch -- `movaz {z0.s ?- ?z3.s},za.d\[w8,0,vgx4\]'
.*: Info: did you mean this\?
+.*: Info: movaz {z0.s-z3.s}, za.s\[w8, 0, vgx4\]
+.*: Info: other valid variant\(s\):
+.*: Info: movaz {z0.b-z3.b}, za.b\[w8, 0, vgx4\]
+.*: Info: movaz {z0.h-z3.h}, za.h\[w8, 0, vgx4\]
.*: Info: movaz {z0.d-z3.d}, za.d\[w8, 0, vgx4\]
.*: Error: operand mismatch -- `movaz {z28.h ?- ?z31.h},za.d\[w8,0,vgx4\]'
.*: Info: did you mean this\?
+.*: Info: movaz {z28.h-z31.h}, za.h\[w8, 0, vgx4\]
+.*: Info: other valid variant\(s\):
+.*: Info: movaz {z28.b-z31.b}, za.b\[w8, 0, vgx4\]
+.*: Info: movaz {z28.s-z31.s}, za.s\[w8, 0, vgx4\]
.*: Info: movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\]
-.*: Error: operand mismatch -- `movaz {z0.b ?- ?z3.b},za.b\[w11,0,vgx4\]'
-.*: Info: did you mean this\?
-.*: Info: movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\]
.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d ?- ?z3.d},za.d\[w14,7,vgx4\]'
.*: Error: invalid vector group size at operand 2 -- `movaz {z28.d ?- ?z31.d},za.d\[w11,11,vgx3\]'
.*: Error: start register out of range at operand 1 -- `movaz {z14.d ?- ?z17.d},za.d\[w9,4,vgx4\]'
diff --git a/gas/testsuite/gas/aarch64/sme2p1-3-bad.s b/gas/testsuite/gas/aarch64/sme2p1-3-bad.s
index cec5987e535..d51bb412eaf 100644
--- a/gas/testsuite/gas/aarch64/sme2p1-3-bad.s
+++ b/gas/testsuite/gas/aarch64/sme2p1-3-bad.s
@@ -1,7 +1,6 @@
/* MOVAZ (array to vector, two registers). */
movaz {z0.s - z1.s} , za.d[w8, 0, vgx2]
movaz {z30.h - z31.h} , za.d[w8, 0, vgx2]
-movaz {z0.b - z1.b} , za.b[w11, 0, vgx2]
movaz {z0.d - z1.d} , za.d[w13, 7, vgx2]
movaz {z30.d - z31.d} , za.d[w11, 15, vgx2]
movaz {z14.d - z15.d} , za.d[w9, 4, vgx3]
@@ -11,7 +10,6 @@ movaz {z2.d - z4.d} , za.d[w10 6]
/* MOVAZ (array to vector, four registers). */
movaz {z0.s - z3.s} , za.d[w8, 0, vgx4]
movaz {z28.h - z31.h} , za.d[w8, 0, vgx4]
-movaz {z0.b - z3.b} , za.b[w11, 0, vgx4]
movaz {z0.d - z3.d} , za.d[w14, 7, vgx4]
movaz {z28.d - z31.d} , za.d[w11, 11, vgx3]
movaz {z14.d - z17.d} , za.d[w9, 4, vgx4]
diff --git a/gas/testsuite/gas/aarch64/sme2p1-3.d b/gas/testsuite/gas/aarch64/sme2p1-3.d
index f9f20eb8a04..8ba9c1e4b68 100644
--- a/gas/testsuite/gas/aarch64/sme2p1-3.d
+++ b/gas/testsuite/gas/aarch64/sme2p1-3.d
@@ -12,6 +12,18 @@
.*: c0060a1e movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\]
.*: c0066a00 movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\]
.*: c0060ae0 movaz {z0.d-z1.d}, za.d\[w8, 7, vgx2\]
+.*: c0060a00 movaz {z0.d-z1.d}, za.d\[w8, 0, vgx2\]
+.*: c0060a1e movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\]
+.*: c0066a00 movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\]
+.*: c0060ae0 movaz {z0.d-z1.d}, za.d\[w8, 7, vgx2\]
+.*: c0060a00 movaz {z0.d-z1.d}, za.d\[w8, 0, vgx2\]
+.*: c0060a1e movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\]
+.*: c0066a00 movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\]
+.*: c0060ae0 movaz {z0.d-z1.d}, za.d\[w8, 7, vgx2\]
+.*: c0060a00 movaz {z0.d-z1.d}, za.d\[w8, 0, vgx2\]
+.*: c0060a1e movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\]
+.*: c0066a00 movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\]
+.*: c0060ae0 movaz {z0.d-z1.d}, za.d\[w8, 7, vgx2\]
.*: c0066afe movaz {z30.d-z31.d}, za.d\[w11, 7, vgx2\]
.*: c0062a8e movaz {z14.d-z15.d}, za.d\[w9, 4, vgx2\]
.*: c0064a66 movaz {z6.d-z7.d}, za.d\[w10, 3, vgx2\]
@@ -20,6 +32,18 @@
.*: c0060e1c movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\]
.*: c0066e00 movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\]
.*: c0060ee0 movaz {z0.d-z3.d}, za.d\[w8, 7, vgx4\]
+.*: c0060e00 movaz {z0.d-z3.d}, za.d\[w8, 0, vgx4\]
+.*: c0060e1c movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\]
+.*: c0066e00 movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\]
+.*: c0060ee0 movaz {z0.d-z3.d}, za.d\[w8, 7, vgx4\]
+.*: c0060e00 movaz {z0.d-z3.d}, za.d\[w8, 0, vgx4\]
+.*: c0060e1c movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\]
+.*: c0066e00 movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\]
+.*: c0060ee0 movaz {z0.d-z3.d}, za.d\[w8, 7, vgx4\]
+.*: c0060e00 movaz {z0.d-z3.d}, za.d\[w8, 0, vgx4\]
+.*: c0060e1c movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\]
+.*: c0066e00 movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\]
+.*: c0060ee0 movaz {z0.d-z3.d}, za.d\[w8, 7, vgx4\]
.*: c0066efc movaz {z28.d-z31.d}, za.d\[w11, 7, vgx4\]
.*: c0062e8c movaz {z12.d-z15.d}, za.d\[w9, 4, vgx4\]
.*: c0064e64 movaz {z4.d-z7.d}, za.d\[w10, 3, vgx4\]
diff --git a/gas/testsuite/gas/aarch64/sme2p1-3.s b/gas/testsuite/gas/aarch64/sme2p1-3.s
index 3a822da478d..77e91e0ca62 100644
--- a/gas/testsuite/gas/aarch64/sme2p1-3.s
+++ b/gas/testsuite/gas/aarch64/sme2p1-3.s
@@ -1,4 +1,16 @@
/* MOVAZ (array to vector, two registers). */
+movaz {z0.b - z1.b} , za.b[w8, 0, vgx2]
+movaz {z30.b - z31.b} , za.b[w8, 0, vgx2]
+movaz {z0.b - z1.b} , za.b[w11, 0, vgx2]
+movaz {z0.b - z1.b} , za.b[w8, 7, vgx2]
+movaz {z0.h - z1.h} , za.h[w8, 0, vgx2]
+movaz {z30.h - z31.h} , za.h[w8, 0, vgx2]
+movaz {z0.h - z1.h} , za.h[w11, 0, vgx2]
+movaz {z0.h - z1.h} , za.h[w8, 7, vgx2]
+movaz {z0.s - z1.s} , za.s[w8, 0, vgx2]
+movaz {z30.s - z31.s} , za.s[w8, 0, vgx2]
+movaz {z0.s - z1.s} , za.s[w11, 0, vgx2]
+movaz {z0.s - z1.s} , za.s[w8, 7, vgx2]
movaz {z0.d - z1.d} , za.d[w8, 0, vgx2]
movaz {z30.d - z31.d} , za.d[w8, 0, vgx2]
movaz {z0.d - z1.d} , za.d[w11, 0, vgx2]
@@ -9,6 +21,18 @@ movaz {z6.d - z7.d} , za.d[w10, 3, vgx2]
movaz {z2.d - z3.d} , za.d[w10, 6]
/* MOVAZ (array to vector, four registers). */
+movaz {z0.b - z3.b} , za.b[w8, 0, vgx4]
+movaz {z28.b - z31.b} , za.b[w8, 0, vgx4]
+movaz {z0.b - z3.b} , za.b[w11, 0, vgx4]
+movaz {z0.b - z3.b} , za.b[w8, 7, vgx4]
+movaz {z0.h - z3.h} , za.h[w8, 0, vgx4]
+movaz {z28.h - z31.h} , za.h[w8, 0, vgx4]
+movaz {z0.h - z3.h} , za.h[w11, 0, vgx4]
+movaz {z0.h - z3.h} , za.h[w8, 7, vgx4]
+movaz {z0.s - z3.s} , za.s[w8, 0, vgx4]
+movaz {z28.s - z31.s} , za.s[w8, 0, vgx4]
+movaz {z0.s - z3.s} , za.s[w11, 0, vgx4]
+movaz {z0.s - z3.s} , za.s[w8, 7, vgx4]
movaz {z0.d - z3.d} , za.d[w8, 0, vgx4]
movaz {z28.d - z31.d} , za.d[w8, 0, vgx4]
movaz {z0.d - z3.d} , za.d[w11, 0, vgx4]
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 42b1ac406a6..bcfd7e9a086 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -7331,10 +7331,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2p1_INSN ("luti4", 0xc09a9000, 0xfffefc0c, sme_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_ZT0, SME_Zn_INDEX1_16), OP_SVE_HUU, 0, 0),
/* SME2.1 MOVAZ (array to vector, two registers). */
- SME2p1_INSN ("movaz", 0xc0060a00, 0xffff9f01, sme2_movaz, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_D, F_OD (2), 0),
+ SME2p1_INSN ("movaz", 0xc0060a00, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0),
/* SME2.1 MOVAZ (array to vector, four registers). */
- SME2p1_INSN ("movaz", 0xc0060e00, 0xffff9f03, sme2_movaz, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_D, F_OD (4), 0),
+ SME2p1_INSN ("movaz", 0xc0060e00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0),
/* SME2.1 MOVAZ (tile to vector, single). */
SME2p1_INSN ("movaz", 0xc0020200, 0xffff1e00, sme2_movaz, 0, OP2 (SVE_Zd, SME_ZA_ARRAY4), OP_SVE_BB, 0, 0),
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