[binutils-gdb] aarch64: Add support for new BTI <target> "r"
SRINATH PARVATHANENI
sripar01@sourceware.org
Mon Dec 15 11:02:16 GMT 2025
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=d0514e7441a688e8a51f051c58fde179ffae64cf
commit d0514e7441a688e8a51f051c58fde179ffae64cf
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Mon Dec 15 11:01:49 2025 +0000
aarch64: Add support for new BTI <target> "r"
This patch adds support for new BTI <target> "r" (instruction: bti r),
which is an alias to "bti" (with no target), for both "bti" and "bti r"
the preferred disassembly is "bti r". This "bti r" instruction is by
default available from Armv8-A architecture.
The HINT_OPD_F_NOPRINT macro has become redundant with these changes
and has been removed.
Diff:
---
gas/config/tc-aarch64.c | 2 +-
gas/testsuite/gas/aarch64/bti.d | 4 +++-
gas/testsuite/gas/aarch64/bti.s | 2 ++
gas/testsuite/gas/aarch64/hint-bad.l | 2 +-
gas/testsuite/gas/aarch64/system.d | 2 +-
include/opcode/aarch64.h | 1 +
ld/testsuite/ld-aarch64/protections/bti-far-opt.d | 2 +-
opcodes/aarch64-opc-2.c | 2 +-
opcodes/aarch64-opc.c | 7 +++----
opcodes/aarch64-opc.h | 3 ---
opcodes/aarch64-tbl.h | 2 +-
11 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 29de5ee9994..6243ea240ad 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4615,7 +4615,7 @@ parse_hint_opt (const char *name, char **str,
&& o->value != HINT_OPD_CSYNC)
|| ((strcmp ("bti", name) == 0)
&& (o->value != HINT_OPD_C && o->value != HINT_OPD_J
- && o->value != HINT_OPD_JC))
+ && o->value != HINT_OPD_JC && o->value != HINT_OPD_R))
|| ((strcmp ("stshh", name) == 0)
&& (o->value != HINT_OPD_KEEP && o->value != HINT_OPD_STRM)))
return false;
diff --git a/gas/testsuite/gas/aarch64/bti.d b/gas/testsuite/gas/aarch64/bti.d
index 434efa32cde..4312cfab62e 100644
--- a/gas/testsuite/gas/aarch64/bti.d
+++ b/gas/testsuite/gas/aarch64/bti.d
@@ -6,10 +6,12 @@
Disassembly of section \.text:
0+ <.*>:
-.*: d503241f bti
+.*: d503241f bti r
+.*: d503241f bti r
.*: d503245f bti c
.*: d503249f bti j
.*: d50324df bti jc
+.*: d503241f bti r
.*: d503245f bti c
.*: d503249f bti j
.*: d50324df bti jc
diff --git a/gas/testsuite/gas/aarch64/bti.s b/gas/testsuite/gas/aarch64/bti.s
index 528447b4623..70d68c93fe2 100644
--- a/gas/testsuite/gas/aarch64/bti.s
+++ b/gas/testsuite/gas/aarch64/bti.s
@@ -3,10 +3,12 @@
.text
bti
+ bti r
bti c
bti j
bti jc
+ bti R
bti C
bti J
bti JC
diff --git a/gas/testsuite/gas/aarch64/hint-bad.l b/gas/testsuite/gas/aarch64/hint-bad.l
index 57caed10e9a..7017c68d29d 100644
--- a/gas/testsuite/gas/aarch64/hint-bad.l
+++ b/gas/testsuite/gas/aarch64/hint-bad.l
@@ -5,4 +5,4 @@
[^ :]+:[0-9]+: Error: operand 1 must be the PSB/TSB option name CSYNC -- `psb dsync'
[^ :]+:[0-9]+: Error: operand 1 must be the PSB/TSB option name CSYNC -- `tsb'
[^ :]+:[0-9]+: Error: operand 1 must be the PSB/TSB option name CSYNC -- `tsb dsync'
-[^ :]+:[0-9]+: Error: operand 1 must be BTI targets j/c/jc -- `bti jj'
+[^ :]+:[0-9]+: Error: operand 1 must be BTI targets r/j/c/jc -- `bti jj'
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index ee84793d761..6d90420d539 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -50,7 +50,7 @@ Disassembly of section \.text:
.*: d50323bf (hint #0x1d|autiasp)
.*: d50323df (hint #0x1e|autibz)
.*: d50323ff (hint #0x1f|autibsp)
-.*: d503241f (hint #0x20|bti)
+.*: d503241f (hint #0x20|bti r)
.*: d503243f hint #0x21
.*: d503245f (hint #0x22|bti c)
.*: d503247f hint #0x23
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 5db5932b3bd..3754f7082a5 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -1858,6 +1858,7 @@ struct aarch64_inst
/* Defining the HINT #imm values for the aarch64_hint_options. */
#define HINT_OPD_CSYNC 0x11
#define HINT_OPD_DSYNC 0x13
+#define HINT_OPD_R 0x20
#define HINT_OPD_C 0x22
#define HINT_OPD_J 0x24
#define HINT_OPD_JC 0x26
diff --git a/ld/testsuite/ld-aarch64/protections/bti-far-opt.d b/ld/testsuite/ld-aarch64/protections/bti-far-opt.d
index f5038c0cb72..ce202815c9a 100644
--- a/ld/testsuite/ld-aarch64/protections/bti-far-opt.d
+++ b/ld/testsuite/ld-aarch64/protections/bti-far-opt.d
@@ -43,7 +43,7 @@ Disassembly of section \.text:
2000c: d503201f nop
0000000000020010 <baz_bti_>:
- 20010: d503241f bti
+ 20010: d503241f bti r
0000000000020014 <baz_bti_c>:
20014: d503245f bti c
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 7f3b25eae38..f88bc2d9a03 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -149,7 +149,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SYSTEM, "RPRFMOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm1_15, FLD_imm2_12, FLD_imm3_0}, "a range prefetch operation specifier"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB/TSB option name CSYNC"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_GCSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the GCSB option name DSYNC"},
- {AARCH64_OPND_CLASS_SYSTEM, "BTI_TARGET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets j/c/jc"},
+ {AARCH64_OPND_CLASS_SYSTEM, "BTI_TARGET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets r/j/c/jc"},
{AARCH64_OPND_CLASS_SYSTEM, "STSHH_POLICY", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an STSHH policy (keep/strm)"},
{AARCH64_OPND_CLASS_SYSTEM, "BRBOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_brbop}, "Branch Record Buffer operation operand"},
{AARCH64_OPND_CLASS_INT_REG, "Rt_IN_SYS_ALIASES", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "Rt register with defaults for SYS aliases"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 97852a0132d..b697d772556 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -597,7 +597,7 @@ const struct aarch64_name_value_pair aarch64_barrier_dsb_nxs_options[4] =
const struct aarch64_name_value_pair aarch64_hint_options[] =
{
/* BTI. This is also the F_DEFAULT entry for AARCH64_OPND_BTI_TARGET. */
- { " ", HINT_ENCODE (HINT_OPD_F_NOPRINT, 0x20) },
+ { "r", HINT_OPD_R }, /* BTI R. */
{ "csync", HINT_OPD_CSYNC }, /* PSB CSYNC. */
{ "dsync", HINT_OPD_DSYNC }, /* GCSB DSYNC. */
{ "c", HINT_OPD_C }, /* BTI C. */
@@ -5154,9 +5154,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
break;
case AARCH64_OPND_BTI_TARGET:
- if ((HINT_FLAG (opnd->hint_option->value) & HINT_OPD_F_NOPRINT) == 0)
- snprintf (buf, size, "%s",
- style_sub_mnem (styler, opnd->hint_option->name));
+ snprintf (buf, size, "%s",
+ style_sub_mnem (styler, opnd->hint_option->name));
break;
case AARCH64_OPND_STSHH_POLICY:
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 5d544d53baf..544cbe5d569 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -391,9 +391,6 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma,
#define F_REG_MAX_VALUE(X) ((X) << 15)
#define F_GET_REG_MAX_VALUE(X) (((X) >> 15) & 0x0f)
-/* HINT operand flags. */
-#define HINT_OPD_F_NOPRINT (1 << 0) /* Should not be printed. */
-
/* Encode 7-bit HINT #imm in the lower 8 bits. Use higher bits for flags. */
#define HINT_ENCODE(flag, val) ((flag << 8) | val)
#define HINT_FLAG(val) (val >> 8)
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 3b14b6863c6..935a335b416 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -7987,7 +7987,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(SYSTEM, none, "BARRIER_GCSB", 0, F (), \
"the GCSB option name DSYNC") \
Y(SYSTEM, hint, "BTI_TARGET", 0, F (), \
- "BTI targets j/c/jc") \
+ "BTI targets r/j/c/jc") \
Y(SYSTEM, hint, "STSHH_POLICY", 0, F(), \
"an STSHH policy (keep/strm)") \
Y(SYSTEM, imm, "BRBOP", 0, F(FLD_brbop), \
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