[binutils-gdb] x86: Refine instruction check in x86_check_tls_relocation

[Lili Cui]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=9c5b0ee4d5633664733afddfe79ca8fb75cce5cd

commit 9c5b0ee4d5633664733afddfe79ca8fb75cce5cd
Author: Cui, Lili <lili.cui@intel.com>
Date:   Tue Oct 15 14:13:33 2024 +0800

    x86: Refine instruction check in x86_check_tls_relocation
    
    gas/ChangeLog:
    
            * config/tc-i386.c
            (x86_check_tls_relocation): Refine instruction check.

Diff:
---
 gas/config/tc-i386.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index cdefde03717..cfab10d68b8 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6747,9 +6747,10 @@ x86_check_tls_relocation (enum bfd_reloc_code_real r_type)
 	  && i.tm.mnem_off != MN_add
 	  && i.tm.mnem_off != MN_mov)
 	return x86_tls_error_insn;
-      if (i.op[1].regs->reg_type.bitfield.class != Reg
-	  || i.op[0].regs->reg_type.bitfield.class
-	  || i.imm_operands)
+      if (i.imm_operands
+	  || i.disp_operands != 1
+	  || i.reg_operands != 1
+	  || i.types[1].bitfield.class != Reg)
 	return x86_tls_error_opcode;
       if (!i.base_reg)
 	return x86_tls_error_no_base_reg;
@@ -6769,9 +6770,10 @@ x86_check_tls_relocation (enum bfd_reloc_code_real r_type)
        */
       if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
 	return x86_tls_error_insn;
-      if (i.op[1].regs->reg_type.bitfield.class != Reg
-	  || i.op[0].regs->reg_type.bitfield.class
-	  || i.imm_operands)
+      if (i.imm_operands
+	  || i.disp_operands != 1
+	  || i.reg_operands != 1
+	  || i.types[1].bitfield.class != Reg)
 	return x86_tls_error_opcode;
       if (i.base_reg || i.index_reg)
 	return x86_tls_error_require_no_base_index_reg;
@@ -6789,10 +6791,9 @@ x86_check_tls_relocation (enum bfd_reloc_code_real r_type)
        */
       if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
 	return x86_tls_error_insn;
-      if (i.op[i.operands - 1].regs->reg_type.bitfield.class != Reg
-	  || (i.op[0].regs->reg_type.bitfield.class
-	      && i.tm.opcode_modifier.vexvvvv != VexVVVV_DST)
-	  || i.imm_operands)
+      if (i.imm_operands
+	  || i.disp_operands != 1
+	  || i.types[i.operands - 1].bitfield.class != Reg)
 	return x86_tls_error_opcode;
       if (!i.base_reg)
 	return x86_tls_error_no_base_reg;