[binutils-gdb] x86: simplify / consolidate check_{word, long, qword}_reg()
Jan Beulich
jbeulich@sourceware.org
Fri May 24 09:51:37 GMT 2024
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=fb40ea39def796409eaf7f4e35bb143cbbeba0b7
commit fb40ea39def796409eaf7f4e35bb143cbbeba0b7
Author: Jan Beulich <jbeulich@suse.com>
Date: Fri May 24 11:51:21 2024 +0200
x86: simplify / consolidate check_{word,long,qword}_reg()
These run after template matching. Therefore operands are already known
to match the template in use. With the loop bodies skipping anything not
a GPR in the actual operands, there's therefore no need to check the
template's operand type for permitting Reg or Accum.
At the same time bring the three functions in sync for the "byte" part
of the logic, as far as checking the template for other sizes (qword
specifically) goes. Plus drop a stale comment from check_qword_reg(),
when all three are now behaving the same in this regard.
Diff:
---
gas/config/tc-i386.c | 20 ++++----------------
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 1e580b9f6db..69b2670bbbb 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -9867,10 +9867,9 @@ check_long_reg (void)
/* Reject eight bit registers, except where the template requires
them. (eg. movzb) */
else if (i.types[op].bitfield.byte
- && (i.tm.operand_types[op].bitfield.class == Reg
- || i.tm.operand_types[op].bitfield.instance == Accum)
&& (i.tm.operand_types[op].bitfield.word
- || i.tm.operand_types[op].bitfield.dword))
+ || i.tm.operand_types[op].bitfield.dword
+ || i.tm.operand_types[op].bitfield.qword))
{
as_bad (_("`%s%s' not allowed with `%s%c'"),
register_prefix,
@@ -9883,8 +9882,6 @@ check_long_reg (void)
prefix on a general reg is present. */
else if ((i.types[op].bitfield.word
|| i.types[op].bitfield.qword)
- && (i.tm.operand_types[op].bitfield.class == Reg
- || i.tm.operand_types[op].bitfield.instance == Accum)
&& i.tm.operand_types[op].bitfield.dword)
{
as_bad (_("incorrect register `%s%s' used with `%c' suffix"),
@@ -9907,8 +9904,6 @@ check_qword_reg (void)
/* Reject eight bit registers, except where the template requires
them. (eg. movzb) */
else if (i.types[op].bitfield.byte
- && (i.tm.operand_types[op].bitfield.class == Reg
- || i.tm.operand_types[op].bitfield.instance == Accum)
&& (i.tm.operand_types[op].bitfield.word
|| i.tm.operand_types[op].bitfield.dword
|| i.tm.operand_types[op].bitfield.qword))
@@ -9923,12 +9918,8 @@ check_qword_reg (void)
/* Error if the r prefix on a general reg is missing. */
else if ((i.types[op].bitfield.word
|| i.types[op].bitfield.dword)
- && (i.tm.operand_types[op].bitfield.class == Reg
- || i.tm.operand_types[op].bitfield.instance == Accum)
&& i.tm.operand_types[op].bitfield.qword)
{
- /* Prohibit these changes in the 64bit mode, since the
- lowering is more complicated. */
as_bad (_("incorrect register `%s%s' used with `%c' suffix"),
register_prefix, i.op[op].regs->reg_name, i.suffix);
return 0;
@@ -9947,10 +9938,9 @@ check_word_reg (void)
/* Reject eight bit registers, except where the template requires
them. (eg. movzb) */
else if (i.types[op].bitfield.byte
- && (i.tm.operand_types[op].bitfield.class == Reg
- || i.tm.operand_types[op].bitfield.instance == Accum)
&& (i.tm.operand_types[op].bitfield.word
- || i.tm.operand_types[op].bitfield.dword))
+ || i.tm.operand_types[op].bitfield.dword
+ || i.tm.operand_types[op].bitfield.qword))
{
as_bad (_("`%s%s' not allowed with `%s%c'"),
register_prefix,
@@ -9962,8 +9952,6 @@ check_word_reg (void)
/* Error if the e or r prefix on a general reg is present. */
else if ((i.types[op].bitfield.dword
|| i.types[op].bitfield.qword)
- && (i.tm.operand_types[op].bitfield.class == Reg
- || i.tm.operand_types[op].bitfield.instance == Accum)
&& i.tm.operand_types[op].bitfield.word)
{
as_bad (_("incorrect register `%s%s' used with `%c' suffix"),
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