[binutils-gdb] Support APX CCMP and CTEST
Lili Cui
cuilili@sourceware.org
Tue Jun 18 02:57:31 GMT 2024
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=d8ba1c40371a664fe6fa3ed768dbf78289548359
commit d8ba1c40371a664fe6fa3ed768dbf78289548359
Author: Cui, Lili <lili.cui@intel.com>
Date: Tue Jun 18 10:45:49 2024 +0800
Support APX CCMP and CTEST
CCMP and CTEST are two new sets of instructions for conditional CMP
and TEST, SCC and OSZC flags are given as suffixes of CCMP or CTEST
in the instruction mnemonic, e.g.:
ccmp<cc> { dfv=sf , cf , of } %eax, %ecx
also add
{evex} cmp/test %eax, %ecx
as an alias for ccmpt.
For the encoder part, add function check_Scc_OszcOperation to parse
'{ dfv=of , sf, sf, cf}', store scc in the lower 4 bits of base_opcode,
and adjust base_opcode to its normal meaning in install_template.
For the decoder part, add 'SC' and 'DF' macros to add scc and oszc flags
suffixes.
gas/ChangeLog:
* config/tc-i386.c (OSZC_CF): New.
(OSZC_ZF): Ditto.
(OSZC_SF): Ditto.
(OSZC_OF): Ditto.
(set_oszc_flags): Set oszc flags and report error for using the same oszc flags twice.
(check_Scc_OszcOperations): Handle SCC OSZC flags.
(install_template): Add scc and oszc_flags.
(build_apx_evex_prefix): Encode SCC and oszc flags bits.
(parse_insn): Handle check_Scc_OszcOperations.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Add ivalid test case.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
* testsuite/gas/i386/x86-64.exp: Add test for ccmp and ctest.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-intel.d: New test.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.l: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.s: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest.d: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-reg.h: Add ccmp and ctest.
* i386-dis-evex.h: Ditto.
* i386-dis.c (struct instr_info): add scc.
(struct dis386): Add new micro 'NE','SC' and'DF'.
(get_valid_dis386): Get scc value and move MAP4 invalid check to print_insn.
(putop): Handle %NE, %SC and %DF.
* i386-opc.h (SCC): New.
* i386-opc.tbl: Add ccmp/ctest and evex format for cmp/test.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Diff:
---
gas/config/tc-i386.c | 146 +-
.../gas/i386/x86-64-apx-ccmp-ctest-intel.d | 222 ++
.../gas/i386/x86-64-apx-ccmp-ctest-inval.l | 17 +
.../gas/i386/x86-64-apx-ccmp-ctest-inval.s | 20 +
gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.d | 222 ++
gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.s | 218 ++
.../gas/i386/x86-64-apx-evex-promoted-bad.d | 22 +-
.../gas/i386/x86-64-apx-evex-promoted-bad.s | 12 +-
gas/testsuite/gas/i386/x86-64.exp | 3 +
opcodes/i386-dis-evex-reg.h | 11 +-
opcodes/i386-dis-evex.h | 12 +-
opcodes/i386-dis.c | 91 +-
opcodes/i386-mnem.h | 3892 ++++++++++----------
opcodes/i386-opc.h | 2 +
opcodes/i386-opc.tbl | 19 +
opcodes/i386-tbl.h | 2391 ++++++++++--
16 files changed, 5040 insertions(+), 2260 deletions(-)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index e0c69640e01..b8fc3c43819 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -416,6 +416,16 @@ struct _i386_insn
/* Compressed disp8*N attribute. */
unsigned int memshift;
+ /* SCC = EVEX.[SC3,SC2,SC1,SC0]. */
+ unsigned int scc;
+
+ /* Store 4 bits of EVEX.[OF,SF,ZF,CF]. */
+#define OSZC_CF 1
+#define OSZC_ZF 2
+#define OSZC_SF 4
+#define OSZC_OF 8
+ unsigned int oszc_flags;
+
/* Prefer load or store in encoding. */
enum
{
@@ -1929,6 +1939,110 @@ static INLINE bool need_evex_encoding (const insn_template *t)
#define CPU_FLAGS_PERFECT_MATCH \
(CPU_FLAGS_ARCH_MATCH | CPU_FLAGS_64BIT_MATCH)
+static INLINE bool set_oszc_flags (unsigned int oszc_shift)
+{
+ if (i.oszc_flags & oszc_shift)
+ {
+ as_bad (_("same oszc flag used twice"));
+ return false;
+ }
+ i.oszc_flags |= oszc_shift;
+ return true;
+}
+
+/* Handle SCC OSZC flags. */
+
+static int
+check_Scc_OszcOperations (const char *l)
+{
+ const char *suffix_string = l;
+
+ while (is_space_char (*suffix_string))
+ suffix_string++;
+
+ /* If {oszc flags} is absent, just return. */
+ if (*suffix_string != '{')
+ return 0;
+
+ /* Skip '{'. */
+ suffix_string++;
+
+ /* Parse 'dfv='. */
+ while (is_space_char (*suffix_string))
+ suffix_string++;
+
+ if (strncasecmp (suffix_string, "dfv", 3) == 0)
+ suffix_string += 3;
+ else
+ {
+ as_bad (_("unrecognized pseudo-suffix"));
+ return -1;
+ }
+
+ while (is_space_char (*suffix_string))
+ suffix_string++;
+
+ if (*suffix_string == '=')
+ suffix_string++;
+ else
+ {
+ as_bad (_("unrecognized pseudo-suffix"));
+ return -1;
+ }
+
+ /* Parse 'of, sf, zf, cf}'. */
+ while (*suffix_string)
+ {
+ while (is_space_char (*suffix_string))
+ suffix_string++;
+
+ /* Return for '{dfv=}'. */
+ if (*suffix_string == '}')
+ return suffix_string + 1 - l;
+
+ if (strncasecmp (suffix_string, "of", 2) == 0)
+ {
+ if (!set_oszc_flags (OSZC_OF))
+ return -1;
+ }
+ else if (strncasecmp (suffix_string, "sf", 2) == 0)
+ {
+ if (!set_oszc_flags (OSZC_SF))
+ return -1;
+ }
+ else if (strncasecmp (suffix_string, "zf", 2) == 0)
+ {
+ if (!set_oszc_flags (OSZC_ZF))
+ return -1;
+ }
+ else if (strncasecmp (suffix_string, "cf", 2) == 0)
+ {
+ if (!set_oszc_flags (OSZC_CF))
+ return -1;
+ }
+ else
+ {
+ as_bad (_("unrecognized oszc flags or illegal `,' in pseudo-suffix"));
+ return -1;
+ }
+
+ suffix_string += 2;
+
+ while (is_space_char (*suffix_string))
+ suffix_string++;
+
+ if (*suffix_string == '}')
+ return ++suffix_string - l;
+
+ if (*suffix_string != ',')
+ break;
+ suffix_string ++;
+ }
+
+ as_bad (_("missing `}' or `,' in pseudo-suffix"));
+ return -1;
+}
+
/* Return CPU flags match bits. */
static int
@@ -3793,10 +3907,19 @@ install_template (const insn_template *t)
}
}
+ /* For CCMP and CTEST the template has EVEX.SCC in base_opcode. Move it out of
+ there, to then adjust base_opcode to obtain its normal meaning. */
+ if (i.tm.opcode_modifier.operandconstraint == SCC)
+ {
+ /* Get EVEX.SCC value from the lower 4 bits of base_opcode. */
+ i.scc = i.tm.base_opcode & 0xf;
+ i.tm.base_opcode >>= 8;
+ }
+
/* Note that for pseudo prefixes this produces a length of 1. But for them
the length isn't interesting at all. */
for (l = 1; l < 4; ++l)
- if (!(t->base_opcode >> (8 * l)))
+ if (!(i.tm.base_opcode >> (8 * l)))
break;
i.opcode_length = l;
@@ -4290,6 +4413,18 @@ build_apx_evex_prefix (void)
|| i.tm.opcode_modifier.operandconstraint == ZERO_UPPER)
i.vex.bytes[3] |= 0x10;
+ /* Encode SCC and oszc flags bits. */
+ if (i.tm.opcode_modifier.operandconstraint == SCC)
+ {
+ /* The default value of vvvv is 1111 and needs to be cleared. */
+ i.vex.bytes[2] &= ~0x78;
+ i.vex.bytes[2] |= (i.oszc_flags << 3);
+ /* ND and aaa bits shold be 0. */
+ know (!(i.vex.bytes[3] & 0x17));
+ /* The default value of V' is 1 and needs to be cleared. */
+ i.vex.bytes[3] = (i.vex.bytes[3] & ~0x08) | i.scc;
+ }
+
/* Encode the NF bit. */
if (i.has_nf)
i.vex.bytes[3] |= 0x04;
@@ -7428,6 +7563,15 @@ parse_insn (const char *line, char *mnemonic, bool prefix_only)
}
}
+ /* Handle SCC OSZC flgs. */
+ if (current_templates.start->opcode_modifier.operandconstraint == SCC)
+ {
+ int length = check_Scc_OszcOperations (l);
+ if (length < 0)
+ return NULL;
+ l += length;
+ }
+
if (current_templates.start->opcode_modifier.jump == JUMP
|| current_templates.start->opcode_modifier.jump == JUMP_BYTE)
{
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-intel.d b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-intel.d
new file mode 100644
index 00000000000..c9ab3e959bf
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-intel.d
@@ -0,0 +1,222 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 APX_F CCMP and CTEST insns (Intel disassembly)
+#source: x86-64-apx-ccmp-ctest.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 0d 02 39 f8[ ]+ccmpb \{dfv=cf\} ax,r15w
+[ ]*[a-f0-9]+:[ ]*62 54 0c 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=cf\} r15d,DWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 4d 02 83 ff 7b[ ]+ccmpb \{dfv=of, cf\} r15w,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 80 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, cf\} BYTE PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 6d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 ec 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 d4 7d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 fc 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, zf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 74 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, zf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 f4 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, zf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 d4 e4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 64 02 3a 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf\} r8b,BYTE PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 5c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 5c 02 38 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, zf, cf\} BYTE PTR \[r8\+rax\*4\+0x123\],r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 55 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, zf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 54 02 38 c2[ ]+ccmpb \{dfv=of, zf\} dl,r8b
+[ ]*[a-f0-9]+:[ ]*62 74 44 02 39 fa[ ]+ccmpb \{dfv=of\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 54 45 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=of\} r15w,WORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 80 f8 7b[ ]+ccmpb \{dfv=sf, cf\} r8b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 2c 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 54 ac 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\} r15,QWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 3c 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf, cf\} r15d,0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 3d 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf, cf\} r15w,WORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 34 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf\} r15d,0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 34 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 d4 a4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=sf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 39 ff[ ]+ccmpb \{dfv=sf\} r15,r15
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf\} r15,QWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 83 ff 7b[ ]+ccmpb \{dfv=zf, cf\} r15,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 1d 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 94 02 83 ff 7b[ ]+ccmpb \{dfv=zf\} r15,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 15 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=zf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 15 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 05 02 83 ff 7b[ ]+ccmpb \{dfv=\} r15w,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 04 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 04 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=\} r15d,DWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 83 f8 7b[ ]+ccmpo \{dfv=of\} r16,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 83 f9 7b[ ]+ccmpno \{dfv=of\} r17,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 83 fa 7b[ ]+ccmpb \{dfv=of\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 83 fb 7b[ ]+ccmpae \{dfv=of\} r19,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 83 fc 7b[ ]+ccmpe \{dfv=of\} r20,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 83 fd 7b[ ]+ccmpne \{dfv=of\} r21,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 83 fe 7b[ ]+ccmpbe \{dfv=of\} r22,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 83 ff 7b[ ]+ccmpa \{dfv=of\} r23,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 83 f8 7b[ ]+ccmps \{dfv=of\} r24,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 83 f9 7b[ ]+ccmpns \{dfv=of\} r25,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a 83 fa 7b[ ]+ccmpt \{dfv=of\} r26,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b 83 fb 7b[ ]+ccmpf \{dfv=of\} r27,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c 83 fc 7b[ ]+ccmpl \{dfv=of\} r28,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d 83 fd 7b[ ]+ccmpge \{dfv=of\} r29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e 83 fe 7b[ ]+ccmple \{dfv=of\} r30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f 83 ff 7b[ ]+ccmpg \{dfv=of\} r31,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=cf\} r15,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 0d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 f6 84 80 23 01 00 00 7b[ ]+ctestb \{dfv=of, cf\} BYTE PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 cc 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 d4 ec 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=of, sf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 7c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=of, sf, zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 75 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=of, sf, zf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 64 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=of, sf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 65 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, sf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 5d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=of, zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 5d 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 54 02 f6 84 80 23 01 00 00 7b[ ]+ctestb \{dfv=of, zf\} BYTE PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 d4 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 84 84 80 23 01 00 00[ ]+ctestb \{dfv=of\} BYTE PTR \[r8\+rax\*4\+0x123\],r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=sf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 2c 02 85 fa[ ]+ctestb \{dfv=sf, cf\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 54 3c 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=sf, zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 74 3c 02 84 c2[ ]+ctestb \{dfv=sf, zf, cf\} dl,r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 35 02 f7 c7 7b 00[ ]+ctestb \{dfv=sf, zf\} r15w,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 b4 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=sf, zf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 24 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=sf\} r15d,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 25 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=sf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 f6 c0 7b[ ]+ctestb \{dfv=zf, cf\} r8b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=zf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 14 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=zf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 94 02 85 ff[ ]+ctestb \{dfv=zf\} r15,r15
+[ ]*[a-f0-9]+:[ ]*62 d4 84 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 05 02 85 f8[ ]+ctestb \{dfv=\} ax,r15w
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 f7 c0 7b 00 00 00[ ]+ctesto \{dfv=of\} r16,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 f7 c1 7b 00 00 00[ ]+ctestno \{dfv=of\} r17,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 f7 c2 7b 00 00 00[ ]+ctestb \{dfv=of\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 f7 c3 7b 00 00 00[ ]+ctestae \{dfv=of\} r19,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 f7 c4 7b 00 00 00[ ]+cteste \{dfv=of\} r20,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 f7 c5 7b 00 00 00[ ]+ctestne \{dfv=of\} r21,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 f7 c6 7b 00 00 00[ ]+ctestbe \{dfv=of\} r22,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 f7 c7 7b 00 00 00[ ]+ctesta \{dfv=of\} r23,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 f7 c0 7b 00 00 00[ ]+ctests \{dfv=of\} r24,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 f7 c1 7b 00 00 00[ ]+ctestns \{dfv=of\} r25,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=of\} r26,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b f7 c3 7b 00 00 00[ ]+ctestf \{dfv=of\} r27,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c f7 c4 7b 00 00 00[ ]+ctestl \{dfv=of\} r28,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d f7 c5 7b 00 00 00[ ]+ctestge \{dfv=of\} r29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e f7 c6 7b 00 00 00[ ]+ctestle \{dfv=of\} r30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} r31,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} r31,0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 39 fa[ ]+ccmpt \{dfv=\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a 83 fa 7b[ ]+ccmpt \{dfv=\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a 80 fa 7b[ ]+ccmpt \{dfv=\} r18b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 85 fa[ ]+ctestt \{dfv=\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a f6 c2 7b[ ]+ctestt \{dfv=\} r18b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 0d 02 39 f8[ ]+ccmpb \{dfv=cf\} ax,r15w
+[ ]*[a-f0-9]+:[ ]*62 54 0c 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=cf\} r15d,DWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 4d 02 83 ff 7b[ ]+ccmpb \{dfv=of, cf\} r15w,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 80 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, cf\} BYTE PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 6d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 ec 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 d4 7d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 fc 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, zf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 74 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf, zf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 f4 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, zf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 d4 e4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, sf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 64 02 3a 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf\} r8b,BYTE PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 5c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 5c 02 38 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, zf, cf\} BYTE PTR \[r8\+rax\*4\+0x123\],r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 55 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=of, zf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 54 02 38 c2[ ]+ccmpb \{dfv=of, zf\} dl,r8b
+[ ]*[a-f0-9]+:[ ]*62 74 44 02 39 fa[ ]+ccmpb \{dfv=of\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 54 45 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=of\} r15w,WORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 80 f8 7b[ ]+ccmpb \{dfv=sf, cf\} r8b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 2c 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 54 ac 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\} r15,QWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 3c 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf, cf\} r15d,0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 3d 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf, cf\} r15w,WORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 34 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf\} r15d,0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 34 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 d4 a4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=sf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 39 ff[ ]+ccmpb \{dfv=sf\} r15,r15
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf\} r15,QWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 83 ff 7b[ ]+ccmpb \{dfv=zf, cf\} r15,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 1d 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 94 02 83 ff 7b[ ]+ccmpb \{dfv=zf\} r15,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 15 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=zf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 15 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 05 02 83 ff 7b[ ]+ccmpb \{dfv=\} r15w,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 04 02 83 bc 80 23 01 00 00 7b[ ]+ccmpb \{dfv=\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 04 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=\} r15d,DWORD PTR \[r8\+rax\*4\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 83 f8 7b[ ]+ccmpo \{dfv=of\} r16,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 83 f9 7b[ ]+ccmpno \{dfv=of\} r17,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 83 fa 7b[ ]+ccmpb \{dfv=of\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 83 fb 7b[ ]+ccmpae \{dfv=of\} r19,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 83 fc 7b[ ]+ccmpe \{dfv=of\} r20,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 83 fd 7b[ ]+ccmpne \{dfv=of\} r21,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 83 fe 7b[ ]+ccmpbe \{dfv=of\} r22,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 83 ff 7b[ ]+ccmpa \{dfv=of\} r23,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 83 f8 7b[ ]+ccmps \{dfv=of\} r24,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 83 f9 7b[ ]+ccmpns \{dfv=of\} r25,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a 83 fa 7b[ ]+ccmpt \{dfv=of\} r26,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b 83 fb 7b[ ]+ccmpf \{dfv=of\} r27,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c 83 fc 7b[ ]+ccmpl \{dfv=of\} r28,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d 83 fd 7b[ ]+ccmpge \{dfv=of\} r29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e 83 fe 7b[ ]+ccmple \{dfv=of\} r30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f 83 ff 7b[ ]+ccmpg \{dfv=of\} r31,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=cf\} r15,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 0d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 f6 84 80 23 01 00 00 7b[ ]+ctestb \{dfv=of, cf\} BYTE PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 cc 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 d4 ec 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=of, sf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 7c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=of, sf, zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 75 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=of, sf, zf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 64 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=of, sf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 65 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, sf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 5d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=of, zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 5d 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf, cf\} WORD PTR \[r8\+rax\*4\+0x123\],r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 54 02 f6 84 80 23 01 00 00 7b[ ]+ctestb \{dfv=of, zf\} BYTE PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 d4 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf\} QWORD PTR \[r8\+rax\*4\+0x123\],r15
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 84 84 80 23 01 00 00[ ]+ctestb \{dfv=of\} BYTE PTR \[r8\+rax\*4\+0x123\],r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=sf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 2c 02 85 fa[ ]+ctestb \{dfv=sf, cf\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 54 3c 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=sf, zf, cf\} DWORD PTR \[r8\+rax\*4\+0x123\],r15d
+[ ]*[a-f0-9]+:[ ]*62 74 3c 02 84 c2[ ]+ctestb \{dfv=sf, zf, cf\} dl,r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 35 02 f7 c7 7b 00[ ]+ctestb \{dfv=sf, zf\} r15w,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 b4 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=sf, zf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 24 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=sf\} r15d,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 25 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestb \{dfv=sf\} WORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 f6 c0 7b[ ]+ctestb \{dfv=zf, cf\} r8b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=zf, cf\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 d4 14 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=zf\} DWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 54 94 02 85 ff[ ]+ctestb \{dfv=zf\} r15,r15
+[ ]*[a-f0-9]+:[ ]*62 d4 84 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestb \{dfv=\} QWORD PTR \[r8\+rax\*4\+0x123\],0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 05 02 85 f8[ ]+ctestb \{dfv=\} ax,r15w
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 f7 c0 7b 00 00 00[ ]+ctesto \{dfv=of\} r16,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 f7 c1 7b 00 00 00[ ]+ctestno \{dfv=of\} r17,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 f7 c2 7b 00 00 00[ ]+ctestb \{dfv=of\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 f7 c3 7b 00 00 00[ ]+ctestae \{dfv=of\} r19,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 f7 c4 7b 00 00 00[ ]+cteste \{dfv=of\} r20,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 f7 c5 7b 00 00 00[ ]+ctestne \{dfv=of\} r21,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 f7 c6 7b 00 00 00[ ]+ctestbe \{dfv=of\} r22,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 f7 c7 7b 00 00 00[ ]+ctesta \{dfv=of\} r23,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 f7 c0 7b 00 00 00[ ]+ctests \{dfv=of\} r24,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 f7 c1 7b 00 00 00[ ]+ctestns \{dfv=of\} r25,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=of\} r26,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b f7 c3 7b 00 00 00[ ]+ctestf \{dfv=of\} r27,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c f7 c4 7b 00 00 00[ ]+ctestl \{dfv=of\} r28,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d f7 c5 7b 00 00 00[ ]+ctestge \{dfv=of\} r29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e f7 c6 7b 00 00 00[ ]+ctestle \{dfv=of\} r30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} r31,0x7b
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} r31,0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 39 fa[ ]+ccmpt \{dfv=\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a 83 fa 7b[ ]+ccmpt \{dfv=\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a 80 fa 7b[ ]+ccmpt \{dfv=\} r18b,0x7b
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 85 fa[ ]+ctestt \{dfv=\} edx,r15d
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=\} r18,0x7b
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a f6 c2 7b[ ]+ctestt \{dfv=\} r18b,0x7b
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.l b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.l
new file mode 100644
index 00000000000..44ed7106258
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.l
@@ -0,0 +1,17 @@
+.* Assembler messages:
+.*:[0-9]+: Error: unrecognized oszc flags or illegal `,' in pseudo-suffix
+.*:[0-9]+: Error: unrecognized oszc flags or illegal `,' in pseudo-suffix
+.*:[0-9]+: Error: missing `}' or `,' in pseudo-suffix
+.*:[0-9]+: Error: missing `}' or `,' in pseudo-suffix
+.*:[0-9]+: Error: same oszc flag used twice
+.*:[0-9]+: Error: unrecognized pseudo-suffix
+.*:[0-9]+: Error: unrecognized oszc flags or illegal `,' in pseudo-suffix
+.*:[0-9]+: Error: unrecognized oszc flags or illegal `,' in pseudo-suffix
+.*:[0-9]+: Error: unrecognized oszc flags or illegal `,' in pseudo-suffix
+.*:[0-9]+: Error: no such instruction.*
+.*:[0-9]+: Error: no such instruction.*
+.*:[0-9]+: Error: no such instruction.*
+.*:[0-9]+: Error: no such instruction.*
+.*:[0-9]+: Error: no such instruction.*
+.*:[0-9]+: Error: no such instruction.*
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.s b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.s
new file mode 100644
index 00000000000..fd1be34a960
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.s
@@ -0,0 +1,20 @@
+# Check APX_F ccmp ctest instructions with illegal instructions.
+
+ .text
+ ccmpb {dfv=ct} $0x7b,%r18
+ ctestb {dfv=sae} $0x7b,%r18
+ ccmpb {dfv=of $0x7b,%r18
+ ccmpb {dfv=of
+ ccmpb {dfv=cf, cf, of, of} $0x7b,%r18
+ ccmpb {dfv dfv=cf} $0x7b,%r18
+ ccmpb {dfv=cf, ,cf} $0x7b,%r18
+ ccmpb {dfv=cf,,} $0x7b,%r18
+ ccmpb {dfv=,cf} $0x7b,%r18
+ /* SCC insns don't support p/pe and np/po cc. */
+ ccmpp {dfv=cf} %r15w,%ax
+ ccmppe {dfv=cf} %r15w,%ax
+ ctestnp {dfv=cf} %r15w,%ax
+ ctestpo {dfv=cf} %r15w,%ax
+ /* Normal CC insns don't support t and f. */
+ sett %r8b
+ setf %r8b
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.d b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.d
new file mode 100644
index 00000000000..0f100f06e74
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.d
@@ -0,0 +1,222 @@
+#as:
+#objdump: -dw
+#name: x86_64 APX_F CCMP and CTEST insns
+#source: x86-64-apx-ccmp-ctest.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 0d 02 39 f8[ ]+ccmpb \{dfv=cf\} %r15w,%ax
+[ ]*[a-f0-9]+:[ ]*62 54 0c 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=cf\}\s+0x123\(%r8,%rax,4\),%r15d
+[ ]*[a-f0-9]+:[ ]*62 d4 4d 02 83 ff 7b[ ]+ccmpb \{dfv=of, cf\}\s+\$0x7b,%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 80 bc 80 23 01 00 00 7b[ ]+ccmpbb \{dfv=of, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 6d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=of, sf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 ec 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, cf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 7d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=of, sf, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 fc 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=of, sf, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 74 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=of, sf, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 f4 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, zf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 e4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=of, sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 64 02 3a 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf\}\s+0x123\(%r8,%rax,4\),%r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 5c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=of, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 5c 02 38 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, zf, cf\} %r8b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 55 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=of, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 54 02 38 c2[ ]+ccmpb \{dfv=of, zf\} %r8b,%dl
+[ ]*[a-f0-9]+:[ ]*62 74 44 02 39 fa[ ]+ccmpb \{dfv=of\} %r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 54 45 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=of\}\s+0x123\(%r8,%rax,4\),%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 80 f8 7b[ ]+ccmpb \{dfv=sf, cf\}\s+\$0x7b,%r8b
+[ ]*[a-f0-9]+:[ ]*62 54 2c 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 ac 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\}\s+0x123\(%r8,%rax,4\),%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 3c 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf, cf\}\s+\$0x7b,%r15d
+[ ]*[a-f0-9]+:[ ]*62 54 3d 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf, cf\}\s+0x123\(%r8,%rax,4\),%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 34 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf\}\s+\$0x7b,%r15d
+[ ]*[a-f0-9]+:[ ]*62 54 34 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 a4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 39 ff[ ]+ccmpb \{dfv=sf\} %r15,%r15
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf\}\s+0x123\(%r8,%rax,4\),%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 83 ff 7b[ ]+ccmpb \{dfv=zf, cf\}\s+\$0x7b,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 1d 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf, cf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 94 02 83 ff 7b[ ]+ccmpb \{dfv=zf\}\s+\$0x7b,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 15 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 15 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 05 02 83 ff 7b[ ]+ccmpb \{dfv=\}\s+\$0x7b,%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 04 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 04 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=\}\s+0x123\(%r8,%rax,4\),%r15d
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 83 f8 7b[ ]+ccmpo \{dfv=of\} \$0x7b,%r16
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 83 f9 7b[ ]+ccmpno \{dfv=of\} \$0x7b,%r17
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 83 fa 7b[ ]+ccmpb \{dfv=of\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 83 fb 7b[ ]+ccmpae \{dfv=of\} \$0x7b,%r19
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 83 fc 7b[ ]+ccmpe \{dfv=of\} \$0x7b,%r20
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 83 fd 7b[ ]+ccmpne \{dfv=of\} \$0x7b,%r21
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 83 fe 7b[ ]+ccmpbe \{dfv=of\} \$0x7b,%r22
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 83 ff 7b[ ]+ccmpa \{dfv=of\} \$0x7b,%r23
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 83 f8 7b[ ]+ccmps \{dfv=of\} \$0x7b,%r24
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 83 f9 7b[ ]+ccmpns \{dfv=of\} \$0x7b,%r25
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a 83 fa 7b[ ]+ccmpt \{dfv=of\} \$0x7b,%r26
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b 83 fb 7b[ ]+ccmpf \{dfv=of\} \$0x7b,%r27
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c 83 fc 7b[ ]+ccmpl \{dfv=of\} \$0x7b,%r28
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d 83 fd 7b[ ]+ccmpge \{dfv=of\} \$0x7b,%r29
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e 83 fe 7b[ ]+ccmple \{dfv=of\} \$0x7b,%r30
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f 83 ff 7b[ ]+ccmpg \{dfv=of\} \$0x7b,%r31
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=cf\}\s+\$0x7b,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 0d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 f6 84 80 23 01 00 00 7b[ ]+ctestbb \{dfv=of, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 cc 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, cf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 ec 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=of, sf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 7c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=of, sf, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 75 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=of, sf, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 64 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=of, sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 65 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, sf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 5d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=of, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 5d 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf, cf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 54 02 f6 84 80 23 01 00 00 7b[ ]+ctestbb \{dfv=of, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 d4 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 84 84 80 23 01 00 00[ ]+ctestb \{dfv=of\} %r8b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=sf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 2c 02 85 fa[ ]+ctestb \{dfv=sf, cf\} %r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 54 3c 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=sf, zf, cf\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 3c 02 84 c2[ ]+ctestb \{dfv=sf, zf, cf\} %r8b,%dl
+[ ]*[a-f0-9]+:[ ]*62 d4 35 02 f7 c7 7b 00[ ]+ctestb \{dfv=sf, zf\}\s+\$0x7b,%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 b4 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=sf, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 24 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=sf\}\s+\$0x7b,%r15d
+[ ]*[a-f0-9]+:[ ]*62 d4 25 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 f6 c0 7b[ ]+ctestb \{dfv=zf, cf\}\s+\$0x7b,%r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 14 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 94 02 85 ff[ ]+ctestb \{dfv=zf\} %r15,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 84 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 05 02 85 f8[ ]+ctestb \{dfv=\} %r15w,%ax
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 f7 c0 7b 00 00 00[ ]+ctesto \{dfv=of\} \$0x7b,%r16
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 f7 c1 7b 00 00 00[ ]+ctestno \{dfv=of\} \$0x7b,%r17
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 f7 c2 7b 00 00 00[ ]+ctestb \{dfv=of\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 f7 c3 7b 00 00 00[ ]+ctestae \{dfv=of\} \$0x7b,%r19
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 f7 c4 7b 00 00 00[ ]+cteste \{dfv=of\} \$0x7b,%r20
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 f7 c5 7b 00 00 00[ ]+ctestne \{dfv=of\} \$0x7b,%r21
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 f7 c6 7b 00 00 00[ ]+ctestbe \{dfv=of\} \$0x7b,%r22
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 f7 c7 7b 00 00 00[ ]+ctesta \{dfv=of\} \$0x7b,%r23
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 f7 c0 7b 00 00 00[ ]+ctests \{dfv=of\} \$0x7b,%r24
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 f7 c1 7b 00 00 00[ ]+ctestns \{dfv=of\} \$0x7b,%r25
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=of\} \$0x7b,%r26
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b f7 c3 7b 00 00 00[ ]+ctestf \{dfv=of\} \$0x7b,%r27
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c f7 c4 7b 00 00 00[ ]+ctestl \{dfv=of\} \$0x7b,%r28
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d f7 c5 7b 00 00 00[ ]+ctestge \{dfv=of\} \$0x7b,%r29
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e f7 c6 7b 00 00 00[ ]+ctestle \{dfv=of\} \$0x7b,%r30
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} \$0x7b,%r31
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} \$0x7b,%r31
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 39 fa[ ]+ccmpt \{dfv=\} %r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a 83 fa 7b[ ]+ccmpt \{dfv=\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a 80 fa 7b[ ]+ccmpt \{dfv=\} \$0x7b,%r18b
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 85 fa[ ]+ctestt \{dfv=\} \%r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a f6 c2 7b[ ]+ctestt \{dfv=\} \$0x7b,%r18b
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 0d 02 39 f8[ ]+ccmpb \{dfv=cf\} %r15w,%ax
+[ ]*[a-f0-9]+:[ ]*62 54 0c 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=cf\}\s+0x123\(%r8,%rax,4\),%r15d
+[ ]*[a-f0-9]+:[ ]*62 d4 4d 02 83 ff 7b[ ]+ccmpb \{dfv=of, cf\}\s+\$0x7b,%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 80 bc 80 23 01 00 00 7b[ ]+ccmpbb \{dfv=of, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 6d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=of, sf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 ec 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, cf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 7d 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=of, sf, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 fc 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=of, sf, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 74 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=of, sf, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 f4 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf, zf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 e4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=of, sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 64 02 3a 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, sf\}\s+0x123\(%r8,%rax,4\),%r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 5c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=of, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 5c 02 38 84 80 23 01 00 00[ ]+ccmpb \{dfv=of, zf, cf\} %r8b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 55 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=of, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 54 02 38 c2[ ]+ccmpb \{dfv=of, zf\} %r8b,%dl
+[ ]*[a-f0-9]+:[ ]*62 74 44 02 39 fa[ ]+ccmpb \{dfv=of\} %r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 54 45 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=of\}\s+0x123\(%r8,%rax,4\),%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 80 f8 7b[ ]+ccmpb \{dfv=sf, cf\}\s+\$0x7b,%r8b
+[ ]*[a-f0-9]+:[ ]*62 54 2c 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 ac 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, cf\}\s+0x123\(%r8,%rax,4\),%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 3c 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf, cf\}\s+\$0x7b,%r15d
+[ ]*[a-f0-9]+:[ ]*62 54 3d 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf, cf\}\s+0x123\(%r8,%rax,4\),%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 34 02 83 ff 7b[ ]+ccmpb \{dfv=sf, zf\}\s+\$0x7b,%r15d
+[ ]*[a-f0-9]+:[ ]*62 54 34 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf, zf\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 a4 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbq \{dfv=sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 39 ff[ ]+ccmpb \{dfv=sf\} %r15,%r15
+[ ]*[a-f0-9]+:[ ]*62 54 a4 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=sf\}\s+0x123\(%r8,%rax,4\),%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 83 ff 7b[ ]+ccmpb \{dfv=zf, cf\}\s+\$0x7b,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 1d 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf, cf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 94 02 83 ff 7b[ ]+ccmpb \{dfv=zf\}\s+\$0x7b,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 15 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbw \{dfv=zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 15 02 39 bc 80 23 01 00 00[ ]+ccmpb \{dfv=zf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 05 02 83 ff 7b[ ]+ccmpb \{dfv=\}\s+\$0x7b,%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 04 02 83 bc 80 23 01 00 00 7b[ ]+ccmpbl \{dfv=\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 04 02 3b bc 80 23 01 00 00[ ]+ccmpb \{dfv=\}\s+0x123\(%r8,%rax,4\),%r15d
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 83 f8 7b[ ]+ccmpo \{dfv=of\} \$0x7b,%r16
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 83 f9 7b[ ]+ccmpno \{dfv=of\} \$0x7b,%r17
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 83 fa 7b[ ]+ccmpb \{dfv=of\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 83 fb 7b[ ]+ccmpae \{dfv=of\} \$0x7b,%r19
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 83 fc 7b[ ]+ccmpe \{dfv=of\} \$0x7b,%r20
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 83 fd 7b[ ]+ccmpne \{dfv=of\} \$0x7b,%r21
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 83 fe 7b[ ]+ccmpbe \{dfv=of\} \$0x7b,%r22
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 83 ff 7b[ ]+ccmpa \{dfv=of\} \$0x7b,%r23
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 83 f8 7b[ ]+ccmps \{dfv=of\} \$0x7b,%r24
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 83 f9 7b[ ]+ccmpns \{dfv=of\} \$0x7b,%r25
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a 83 fa 7b[ ]+ccmpt \{dfv=of\} \$0x7b,%r26
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b 83 fb 7b[ ]+ccmpf \{dfv=of\} \$0x7b,%r27
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c 83 fc 7b[ ]+ccmpl \{dfv=of\} \$0x7b,%r28
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d 83 fd 7b[ ]+ccmpge \{dfv=of\} \$0x7b,%r29
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e 83 fe 7b[ ]+ccmple \{dfv=of\} \$0x7b,%r30
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f 83 ff 7b[ ]+ccmpg \{dfv=of\} \$0x7b,%r31
+[ ]*[a-f0-9]+:[ ]*62 d4 8c 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=cf\}\s+\$0x7b,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 0d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 4c 02 f6 84 80 23 01 00 00 7b[ ]+ctestbb \{dfv=of, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 cc 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, cf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 ec 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=of, sf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 7c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=of, sf, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 75 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=of, sf, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 64 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=of, sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 65 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, sf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 5d 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=of, zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 5d 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf, cf\} %r15w,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 54 02 f6 84 80 23 01 00 00 7b[ ]+ctestbb \{dfv=of, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 d4 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of, zf\} %r15,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=of\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 44 02 84 84 80 23 01 00 00[ ]+ctestb \{dfv=of\} %r8b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 2c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=sf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 2c 02 85 fa[ ]+ctestb \{dfv=sf, cf\} %r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 54 3c 02 85 bc 80 23 01 00 00[ ]+ctestb \{dfv=sf, zf, cf\} %r15d,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 3c 02 84 c2[ ]+ctestb \{dfv=sf, zf, cf\} %r8b,%dl
+[ ]*[a-f0-9]+:[ ]*62 d4 35 02 f7 c7 7b 00[ ]+ctestb \{dfv=sf, zf\}\s+\$0x7b,%r15w
+[ ]*[a-f0-9]+:[ ]*62 d4 b4 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=sf, zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 24 02 f7 c7 7b 00 00 00[ ]+ctestb \{dfv=sf\}\s+\$0x7b,%r15d
+[ ]*[a-f0-9]+:[ ]*62 d4 25 02 f7 84 80 23 01 00 00 7b 00[ ]+ctestbw \{dfv=sf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 1c 02 f6 c0 7b[ ]+ctestb \{dfv=zf, cf\}\s+\$0x7b,%r8b
+[ ]*[a-f0-9]+:[ ]*62 d4 9c 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=zf, cf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 d4 14 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbl \{dfv=zf\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 54 94 02 85 ff[ ]+ctestb \{dfv=zf\} %r15,%r15
+[ ]*[a-f0-9]+:[ ]*62 d4 84 02 f7 84 80 23 01 00 00 7b 00 00 00[ ]+ctestbq \{dfv=\}\s+\$0x7b,0x123\(%r8,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 74 05 02 85 f8[ ]+ctestb \{dfv=\} %r15w,%ax
+[ ]*[a-f0-9]+:[ ]*62 fc c4 00 f7 c0 7b 00 00 00[ ]+ctesto \{dfv=of\} \$0x7b,%r16
+[ ]*[a-f0-9]+:[ ]*62 fc c4 01 f7 c1 7b 00 00 00[ ]+ctestno \{dfv=of\} \$0x7b,%r17
+[ ]*[a-f0-9]+:[ ]*62 fc c4 02 f7 c2 7b 00 00 00[ ]+ctestb \{dfv=of\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc c4 03 f7 c3 7b 00 00 00[ ]+ctestae \{dfv=of\} \$0x7b,%r19
+[ ]*[a-f0-9]+:[ ]*62 fc c4 04 f7 c4 7b 00 00 00[ ]+cteste \{dfv=of\} \$0x7b,%r20
+[ ]*[a-f0-9]+:[ ]*62 fc c4 05 f7 c5 7b 00 00 00[ ]+ctestne \{dfv=of\} \$0x7b,%r21
+[ ]*[a-f0-9]+:[ ]*62 fc c4 06 f7 c6 7b 00 00 00[ ]+ctestbe \{dfv=of\} \$0x7b,%r22
+[ ]*[a-f0-9]+:[ ]*62 fc c4 07 f7 c7 7b 00 00 00[ ]+ctesta \{dfv=of\} \$0x7b,%r23
+[ ]*[a-f0-9]+:[ ]*62 dc c4 08 f7 c0 7b 00 00 00[ ]+ctests \{dfv=of\} \$0x7b,%r24
+[ ]*[a-f0-9]+:[ ]*62 dc c4 09 f7 c1 7b 00 00 00[ ]+ctestns \{dfv=of\} \$0x7b,%r25
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=of\} \$0x7b,%r26
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0b f7 c3 7b 00 00 00[ ]+ctestf \{dfv=of\} \$0x7b,%r27
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0c f7 c4 7b 00 00 00[ ]+ctestl \{dfv=of\} \$0x7b,%r28
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0d f7 c5 7b 00 00 00[ ]+ctestge \{dfv=of\} \$0x7b,%r29
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0e f7 c6 7b 00 00 00[ ]+ctestle \{dfv=of\} \$0x7b,%r30
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} \$0x7b,%r31
+[ ]*[a-f0-9]+:[ ]*62 dc c4 0f f7 c7 7b 00 00 00[ ]+ctestg \{dfv=of\} \$0x7b,%r31
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 39 fa[ ]+ccmpt \{dfv=\} %r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a 83 fa 7b[ ]+ccmpt \{dfv=\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a 80 fa 7b[ ]+ccmpt \{dfv=\} \$0x7b,%r18b
+[ ]*[a-f0-9]+:[ ]*62 74 04 0a 85 fa[ ]+ctestt \{dfv=\} \%r15d,%edx
+[ ]*[a-f0-9]+:[ ]*62 fc 84 0a f7 c2 7b 00 00 00[ ]+ctestt \{dfv=\} \$0x7b,%r18
+[ ]*[a-f0-9]+:[ ]*62 fc 04 0a f6 c2 7b[ ]+ctestt \{dfv=\} \$0x7b,%r18b
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.s b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.s
new file mode 100644
index 00000000000..66bf224c5bd
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-ccmp-ctest.s
@@ -0,0 +1,218 @@
+# Check 64bit APX_F CCMP and CTEST instructions
+
+ .text
+_start:
+ ccmpbq {dfv=cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=cf} %r15w,%ax
+ ccmpb {dfv=cf} 0x123(%r8,%rax,4),%r15d
+ ccmpb {dfv=of, cf} $0x7b,%r15w
+ ccmpbb {dfv=of, cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpbw {dfv=of, sf, cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=of, sf, cf} %r15,0x123(%r8,%rax,4)
+ ccmpbw {dfv=of, sf, zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpbq {dfv=of, sf, zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpbl {dfv=of, sf, zf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=of, sf, zf} %r15,0x123(%r8,%rax,4)
+ ccmpbq {dfv=of, sf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=of, sf} 0x123(%r8,%rax,4),%r8b
+ ccmpbl {dfv=of, zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=of, zf, cf} %r8b,0x123(%r8,%rax,4)
+ ccmpbw {dfv=of, zf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=of, zf} %r8b,%dl
+ ccmpb {dfv=of} %r15d,%edx
+ ccmpb {dfv=of} 0x123(%r8,%rax,4),%r15w
+ ccmpb {dfv=sf, cf} $0x7b,%r8b
+ ccmpb {dfv=sf, cf} %r15d,0x123(%r8,%rax,4)
+ ccmpb {dfv=sf, cf} 0x123(%r8,%rax,4),%r15
+ ccmpb {dfv=sf, zf, cf} $0x7b,%r15d
+ ccmpb {dfv=sf, zf, cf} 0x123(%r8,%rax,4),%r15w
+ ccmpb {dfv=sf, zf} $0x7b,%r15d
+ ccmpb {dfv=sf, zf} %r15d,0x123(%r8,%rax,4)
+ ccmpbq {dfv=sf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=sf} %r15,%r15
+ ccmpb {dfv=sf} 0x123(%r8,%rax,4),%r15
+ ccmpb {dfv=zf, cf} $0x7b,%r15
+ ccmpbl {dfv=zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=zf, cf} %r15w,0x123(%r8,%rax,4)
+ ccmpb {dfv=zf} $0x7b,%r15
+ ccmpbw {dfv=zf} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=zf} %r15w,0x123(%r8,%rax,4)
+ ccmpb {dfv=} $0x7b,%r15w
+ ccmpbl {dfv=} $0x7b,0x123(%r8,%rax,4)
+ ccmpb {dfv=} 0x123(%r8,%rax,4),%r15d
+ ccmpo {dfv=of} $0x7b,%r16
+ ccmpno {dfv=of} $0x7b,%r17
+ ccmpb {dfv=of} $0x7b,%r18
+ ccmpae {dfv=of} $0x7b,%r19
+ ccmpe {dfv=of} $0x7b,%r20
+ ccmpne {dfv=of} $0x7b,%r21
+ ccmpbe {dfv=of} $0x7b,%r22
+ ccmpa {dfv=of} $0x7b,%r23
+ ccmps {dfv=of} $0x7b,%r24
+ ccmpns {dfv=of} $0x7b,%r25
+ ccmpt {dfv=of} $0x7b,%r26
+ ccmpf {dfv=of} $0x7b,%r27
+ ccmpl {dfv=of} $0x7b,%r28
+ ccmpge {dfv=of} $0x7b,%r29
+ ccmple {dfv=of} $0x7b,%r30
+ ccmpg {dfv=of} $0x7b,%r31
+ ctestb {dfv=cf} $0x7b,%r15
+ ctestbw {dfv=cf} $0x7b,0x123(%r8,%rax,4)
+ ctestbb {dfv=of, cf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=of, cf} %r15,0x123(%r8,%rax,4)
+ ctestbq {dfv=of, sf, cf} $0x7b,0x123(%r8,%rax,4)
+ ctestbl {dfv=of, sf, zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ctestbw {dfv=of, sf, zf} $0x7b,0x123(%r8,%rax,4)
+ ctestbl {dfv=of, sf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=of, sf} %r15w,0x123(%r8,%rax,4)
+ ctestbw {dfv=of, zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=of, zf, cf} %r15w,0x123(%r8,%rax,4)
+ ctestbb {dfv=of, zf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=of, zf} %r15,0x123(%r8,%rax,4)
+ ctestb {dfv=of} %r15d,0x123(%r8,%rax,4)
+ ctestb {dfv=of} %r8b,0x123(%r8,%rax,4)
+ ctestbl {dfv=sf, cf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=sf, cf} %r15d,%edx
+ ctestb {dfv=sf, zf, cf} %r15d,0x123(%r8,%rax,4)
+ ctestb {dfv=sf, zf, cf} %r8b,%dl
+ ctestb {dfv=sf, zf} $0x7b,%r15w
+ ctestbq {dfv=sf, zf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=sf} $0x7b,%r15d
+ ctestbw {dfv=sf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=zf, cf} $0x7b,%r8b
+ ctestbq {dfv=zf, cf} $0x7b,0x123(%r8,%rax,4)
+ ctestbl {dfv=zf} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=zf} %r15,%r15
+ ctestbq {dfv=} $0x7b,0x123(%r8,%rax,4)
+ ctestb {dfv=} %r15w,%ax
+ ctesto {dfv=of} $0x7b,%r16
+ ctestno {dfv=of} $0x7b,%r17
+ ctestb {dfv=of} $0x7b,%r18
+ ctestnb {dfv=of} $0x7b,%r19
+ ctestz {dfv=of} $0x7b,%r20
+ ctestnz {dfv=of} $0x7b,%r21
+ ctestbe {dfv=of} $0x7b,%r22
+ ctestnbe {dfv=of} $0x7b,%r23
+ ctests {dfv=of} $0x7b,%r24
+ ctestns {dfv=of} $0x7b,%r25
+ ctestt {dfv=of} $0x7b,%r26
+ ctestf {dfv=of} $0x7b,%r27
+ ctestl {dfv=of} $0x7b,%r28
+ ctestnl {dfv=of} $0x7b,%r29
+ ctestle {dfv=of} $0x7b,%r30
+ ctestnle {dfv=of} $0x7b,%r31
+ CTESTNLE {DFV=OF} $0x7b,%r31
+ {evex} cmp %r15d,%edx
+ {evex} cmp $0x7b,%r18
+ {evex} cmp $0x7b,%r18b
+ {evex} test %r15d,%edx
+ {evex} test $0x7b,%r18
+ {evex} test $0x7b,%r18b
+
+ .intel_syntax noprefix
+ ccmpb {dfv=cf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=cf} ax,r15w
+ ccmpb {dfv=cf} r15d,DWORD PTR [r8+rax*4+0x123]
+ ccmpb {dfv=of, cf} r15w,0x7b
+ ccmpb {dfv=of, cf} BYTE PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, sf, cf} WORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, sf, cf} QWORD PTR [r8+rax*4+0x123],r15
+ ccmpb {dfv=of, sf, zf, cf} WORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, sf, zf, cf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, sf, zf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, sf, zf} QWORD PTR [r8+rax*4+0x123],r15
+ ccmpb {dfv=of, sf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, sf} r8b,BYTE PTR [r8+rax*4+0x123]
+ ccmpb {dfv=of, zf, cf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, zf, cf} BYTE PTR [r8+rax*4+0x123],r8b
+ ccmpb {dfv=of, zf} WORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=of, zf} dl,r8b
+ ccmpb {dfv=of} edx,r15d
+ ccmpb {dfv=of} r15w,WORD PTR [r8+rax*4+0x123]
+ ccmpb {dfv=sf, cf} r8b,0x7b
+ ccmpb {dfv=sf, cf} DWORD PTR [r8+rax*4+0x123],r15d
+ ccmpb {dfv=sf, cf} r15,QWORD PTR [r8+rax*4+0x123]
+ ccmpb {dfv=sf, zf, cf} r15d,0x7b
+ ccmpb {dfv=sf, zf, cf} r15w,WORD PTR [r8+rax*4+0x123]
+ ccmpb {dfv=sf, zf} r15d,0x7b
+ ccmpb {dfv=sf, zf} DWORD PTR [r8+rax*4+0x123],r15d
+ ccmpb {dfv=sf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=sf} r15,r15
+ ccmpb {dfv=sf} r15,QWORD PTR [r8+rax*4+0x123]
+ ccmpb {dfv=zf, cf} r15,0x7b
+ ccmpb {dfv=zf, cf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=zf, cf} WORD PTR [r8+rax*4+0x123],r15w
+ ccmpb {dfv=zf} r15,0x7b
+ ccmpb {dfv=zf} WORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=zf} WORD PTR [r8+rax*4+0x123],r15w
+ ccmpb {dfv=} r15w,0x7b
+ ccmpb {dfv=} DWORD PTR [r8+rax*4+0x123],0x7b
+ ccmpb {dfv=} r15d,DWORD PTR [r8+rax*4+0x123]
+ ccmpo {dfv=of} r16,0x7b
+ ccmpno {dfv=of} r17,0x7b
+ ccmpb {dfv=of} r18,0x7b
+ ccmpae {dfv=of} r19,0x7b
+ ccmpe {dfv=of} r20,0x7b
+ ccmpne {dfv=of} r21,0x7b
+ ccmpbe {dfv=of} r22,0x7b
+ ccmpa {dfv=of} r23,0x7b
+ ccmps {dfv=of} r24,0x7b
+ ccmpns {dfv=of} r25,0x7b
+ ccmpt {dfv=of} r26,0x7b
+ ccmpf {dfv=of} r27,0x7b
+ ccmpl {dfv=of} r28,0x7b
+ ccmpge {dfv=of} r29,0x7b
+ ccmple {dfv=of} r30,0x7b
+ ccmpg {dfv=of} r31,0x7b
+ ctestb {dfv=cf} r15,0x7b
+ ctestb {dfv=cf} WORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, cf} BYTE PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, cf} QWORD PTR [r8+rax*4+0x123],r15
+ ctestb {dfv=of, sf, cf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, sf, zf, cf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, sf, zf} WORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, sf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, sf} WORD PTR [r8+rax*4+0x123],r15w
+ ctestb {dfv=of, zf, cf} WORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, zf, cf} WORD PTR [r8+rax*4+0x123],r15w
+ ctestb {dfv=of, zf} BYTE PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=of, zf} QWORD PTR [r8+rax*4+0x123],r15
+ ctestb {dfv=of} DWORD PTR [r8+rax*4+0x123],r15d
+ ctestb {dfv=of} BYTE PTR [r8+rax*4+0x123],r8b
+ ctestb {dfv=sf, cf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=sf, cf} edx,r15d
+ ctestb {dfv=sf, zf, cf} DWORD PTR [r8+rax*4+0x123],r15d
+ ctestb {dfv=sf, zf, cf} dl,r8b
+ ctestb {dfv=sf, zf} r15w,0x7b
+ ctestb {dfv=sf, zf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=sf} r15d,0x7b
+ ctestb {dfv=sf} WORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=zf, cf} r8b,0x7b
+ ctestb {dfv=zf, cf} QWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=zf} DWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=zf} r15,r15
+ ctestb {dfv=} QWORD PTR [r8+rax*4+0x123],0x7b
+ ctestb {dfv=} ax,r15w
+ ctesto {dfv=of} r16,0x7b
+ ctestno {dfv=of} r17,0x7b
+ ctestb {dfv=of} r18,0x7b
+ ctestnb {dfv=of} r19,0x7b
+ ctestz {dfv=of} r20,0x7b
+ ctestnz {dfv=of} r21,0x7b
+ ctestbe {dfv=of} r22,0x7b
+ ctestnbe {dfv=of} r23,0x7b
+ ctests {dfv=of} r24,0x7b
+ ctestns {dfv=of} r25,0x7b
+ ctestt {dfv=of} r26,0x7b
+ ctestf {dfv=of} r27,0x7b
+ ctestl {dfv=of} r28,0x7b
+ ctestnl {dfv=of} r29,0x7b
+ ctestle {dfv=of} r30,0x7b
+ ctestnle {dfv=of} r31,0x7b
+ CTESTNLE {DFV=OF} r31,0x7b
+ {evex} cmp edx, r15d
+ {evex} cmp r18, 0x7b
+ {evex} cmp r18b, 0x7b
+ {evex} test edx, r15d
+ {evex} test r18, 0x7b
+ {evex} test r18b, 0x7b
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
index 6330367194c..7c2efb08d71 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
@@ -15,13 +15,13 @@ Disassembly of section .text:
[ ]*[a-f0-9]+:[ ]+62 e2 f9 41 91 84[ ]+vpgatherqq \(bad\),%zmm16\{%k1\}
[ ]*[a-f0-9]+:[ ]+cd ff[ ]+int \$0xff
[ ]*[a-f0-9]+:[ ]+62 fd 7d 08 60[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+c7[ ]+.*
+[ ]*[a-f0-9]+:[ ]+62 fc 7d 09 60[ ]+\(bad\).*
[ ]*[a-f0-9]+:[ ]+c7[ ]+\(bad\)
-[ ]*[a-f0-9]+:[ ]+62 fc 7d[ ]+\(bad\).*
-[ ]*[a-f0-9]+:[ ]+09 60 c7[ ]+or %esp,-0x39\(%rax\)
-[ ]*[a-f0-9]+:[ ]+62 fc 7d[ ]+\(bad\).*
-[ ]*[a-f0-9]+:[ ]+28 60 c7[ ]+.*
-[ ]*[a-f0-9]+:[ ]+62 fc 7d[ ]+\(bad\).*
-[ ]*[a-f0-9]+:[ ]+8b 60 c7[ ]+.*
+[ ]*[a-f0-9]+:[ ]+62 fc 7d 28 60[ ]+\(bad\).*
+[ ]*[a-f0-9]+:[ ]+c7[ ]+.*
+[ ]*[a-f0-9]+:[ ]+62 fc 7d 8b 60[ ]+\(bad\).*
+[ ]*[a-f0-9]+:[ ]+c7[ ]+.*
[ ]*[a-f0-9]+:[ ]+62 f2 fc 09 f5[ ]+\(bad\).*
[ ]*[a-f0-9]+:[ ]+0c 18[ ]+or.*
[ ]*[a-f0-9]+:[ ]+62 f2 fc 28 f5[ ]+\(bad\)
@@ -30,15 +30,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+:[ ]+0c 18[ ]+or.*
[ ]*[a-f0-9]+:[ ]+62 f2 fc 18 f5[ ]+\(bad\)
[ ]*[a-f0-9]+:[ ]+0c 18[ ]+or.*
-[ ]*[a-f0-9]+:[ ]+62 f4 e4[ ]+\(bad\)
-[ ]*[a-f0-9]+:[ ]+08 ff[ ]+.*
+[ ]*[a-f0-9]+:[ ]+62 f4 e4 08 ff[ ]+\(bad\)
[ ]*[a-f0-9]+:[ ]+04 08[ ]+.*
-[ ]*[a-f0-9]+:[ ]+62 f4 3c[ ]+\(bad\)
-[ ]*[a-f0-9]+:[ ]+08 8f c0 ff ff ff[ ]+or.*
+[ ]*[a-f0-9]+:[ ]+62 f4 3c 08 8f[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+c7[ ]+.*
[ ]*[a-f0-9]+:[ ]+62 74 7c 18 8f c0[ ]+pop2 %rax,\(bad\)
[ ]*[a-f0-9]+:[ ]+62 d4 24 18 8f[ ]+\(bad\)
[ ]*[a-f0-9]+:[ ]+c3[ ]+.*
[ ]*[a-f0-9]+:[ ]+62 fc 7d 0c 60 c7[ ]+movbe \{bad-nf\},%r23w,%ax
[ ]*[a-f0-9]+:[ ]+62 fc 79 08 60[ ]+\(bad\)
-[ ]*[a-f0-9]+:[ ]+c2[ ]+.*
+[ ]*[a-f0-9]+:[ ]+c7[ ]+.*
+[ ]*[a-f0-9]+:[ ]+62 d4 fc 18 38 d7[ ]+ccmps\(bad\) \{dfv=of, sf, zf, cf\} %dl,%r15b
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
index cbf34515bab..959e4e1fb43 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
@@ -41,9 +41,8 @@ _start:
#{evex} inc %rax %rbx EVEX.vvvv != 1111 && EVEX.ND = 0.
.byte 0x62, 0xf4, 0xe4, 0x08, 0xff, 0x04, 0x08
- # pop2 %rax, %r8 set EVEX.ND=0.
- .byte 0x62, 0xf4, 0x3c, 0x08, 0x8f, 0xc0
- .byte 0xff, 0xff, 0xff
+ # pop2 %rdi, %r8 set EVEX.ND=0.
+ .byte 0x62, 0xf4, 0x3c, 0x08, 0x8f, 0xc7
# pop2 %rax, %r8 set EVEX.vvvv = 1111.
.insn EVEX.L0.M4.W0 0x8f, %rax, {rn-sae},%r8
@@ -54,5 +53,8 @@ _start:
#EVEX_MAP4 movbe %r18w,%ax set EVEX.nf = 1.
.insn EVEX.L0.66.M12.W0 0x60, %di, %ax {%k4}
- # EVEX_MAP4 movbe %r18w,%ax set EVEX.P[10] = 0.
- .byte 0x62, 0xfc, 0x79, 0x08, 0x60, 0xc2
+ # EVEX_MAP4 movbe %r23w,%ax set EVEX.P[10] = 0.
+ .byte 0x62, 0xfc, 0x79, 0x08, 0x60, 0xc7
+
+ # ccmps {dfv=of,sf,zf,cf} %r15, %rdx set EVEX.ND = 1.
+ .insn EVEX.L0.M4.W1 0x38, %r15, {rn-sae},%rdx
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 8ac7aca1fec..a8d49cefe8c 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -353,6 +353,9 @@ run_dump_test "x86-64-avx512dq-rcigrne"
run_dump_test "x86-64-apx-push2pop2"
run_dump_test "x86-64-apx-push2pop2-intel"
run_list_test "x86-64-apx-push2pop2-inval"
+run_dump_test "x86-64-apx-ccmp-ctest"
+run_dump_test "x86-64-apx-ccmp-ctest-intel"
+run_list_test "x86-64-apx-ccmp-ctest-inval"
run_dump_test "x86-64-apx-pushp-popp"
run_dump_test "x86-64-apx-pushp-popp-intel"
run_list_test "x86-64-apx-pushp-popp-inval"
diff --git a/opcodes/i386-dis-evex-reg.h b/opcodes/i386-dis-evex-reg.h
index 7408295f8e5..eda0e824aef 100644
--- a/opcodes/i386-dis-evex-reg.h
+++ b/opcodes/i386-dis-evex-reg.h
@@ -58,6 +58,7 @@
{ "%NFandA", { VexGb, Eb, Ib }, NO_PREFIX },
{ "%NFsubA", { VexGb, Eb, Ib }, NO_PREFIX },
{ "%NFxorA", { VexGb, Eb, Ib }, NO_PREFIX },
+ { "%NEccmp%SCA%DF", { Eb, Ib }, NO_PREFIX },
},
/* REG_EVEX_MAP4_81 */
{
@@ -68,6 +69,7 @@
{ "%NFandQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
{ "%NFsubQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
{ "%NFxorQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
+ { "%NEccmp%SCQ%DF", { Ev, Iv }, PREFIX_NP_OR_DATA },
},
/* REG_EVEX_MAP4_83 */
{
@@ -78,6 +80,7 @@
{ "%NFandQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
{ "%NFsubQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
{ "%NFxorQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
+ { "%NEccmp%SCQ%DF", { Ev, sIb }, PREFIX_NP_OR_DATA },
},
/* REG_EVEX_MAP4_8F */
{
@@ -85,8 +88,8 @@
},
/* REG_EVEX_MAP4_F6 */
{
- { Bad_Opcode },
- { Bad_Opcode },
+ { "%NEctest%SCA%DF", { Eb, Ib }, NO_PREFIX },
+ { "%NEctest%SCA%DF", { Eb, Ib }, NO_PREFIX },
{ "notA", { VexGb, Eb }, NO_PREFIX },
{ "%NFnegA", { VexGb, Eb }, NO_PREFIX },
{ "%NFmulA", { Eb }, NO_PREFIX },
@@ -96,8 +99,8 @@
},
/* REG_EVEX_MAP4_F7 */
{
- { Bad_Opcode },
- { Bad_Opcode },
+ { "%NEctest%SCQ%DF", { Ev, Iv }, PREFIX_NP_OR_DATA },
+ { "%NEctest%SCQ%DF", { Ev, Iv }, PREFIX_NP_OR_DATA },
{ "notQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
{ "%NFnegQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
{ "%NFmulQ", { Ev }, PREFIX_NP_OR_DATA },
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index a3d3fbe204d..77c2ee772d1 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -938,10 +938,10 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
/* 38 */
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
+ { "%NEccmp%SCB%DF", { Eb, Gb }, 0 },
+ { "%NEccmp%SCS%DF", { Ev, Gv }, PREFIX_NP_OR_DATA },
+ { "%NEccmp%SCB%DF", { Gb, EbS }, 0 },
+ { "%NEccmp%SCS%DF", { Gv, EvS }, PREFIX_NP_OR_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1023,8 +1023,8 @@ static const struct dis386 evex_table[][256] = {
{ REG_TABLE (REG_EVEX_MAP4_81) },
{ Bad_Opcode },
{ REG_TABLE (REG_EVEX_MAP4_83) },
- { Bad_Opcode },
- { Bad_Opcode },
+ { "%NEctest%SCB%DF", { Eb, Gb }, NO_PREFIX },
+ { "%NEctest%SCS%DF", { Ev, Gv }, PREFIX_NP_OR_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 88 */
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 5e9e53c4939..86745a1b933 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -219,6 +219,7 @@ struct instr_info
int length;
int prefix;
int mask_register_specifier;
+ int scc;
int ll;
bool w;
bool evex;
@@ -1804,7 +1805,10 @@ struct dis386 {
instruction.
"NF" => print "{nf} " pseudo prefix when EVEX.NF = 1 and print "{evex} "
pseudo prefix when instructions without NF, EGPR and VVVV,
+ "NE" => don't print "{evex} " pseudo prefix for some special instructions
+ in MAP4.
"ZU" => print 'zu' if EVEX.ZU=1.
+ "SC" => print suffix SCC for SCC insns
"YK" keep unused, to avoid ambiguity with the combined use of Y and K.
"YX" keep unused, to avoid ambiguity with the combined use of Y and X.
"LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
@@ -1814,6 +1818,7 @@ struct dis386 {
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
"DQ" => print 'd' or 'q' depending on the VEX.W bit
+ "DF" => print default flag value for SCC insns
"BW" => print 'b' or 'w' depending on the VEX.W bit
"LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
an operand size prefix, or suffix_always is true. print
@@ -9047,6 +9052,7 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
ins->vex.v = *ins->codep & 0x8;
ins->vex.mask_register_specifier = *ins->codep & 0x7;
+ ins->vex.scc = *ins->codep & 0xf;
ins->vex.zeroing = *ins->codep & 0x80;
/* Set the NF bit for EVEX-Promoted instructions, this bit will be cleared
when it's an evex_default one. */
@@ -9064,22 +9070,8 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
ins->rex2 &= ~REX_R;
}
- /* EVEX from legacy instructions, when the EVEX.ND bit is 0,
- all bits of EVEX.vvvv and EVEX.V' must be 1. */
- if (ins->evex_type == evex_from_legacy && !ins->vex.nd
- && (ins->vex.register_specifier || !ins->vex.v))
- return &bad_opcode;
-
ins->need_vex = 4;
- /* EVEX from legacy instructions require that EVEX.z, EVEX.L’L and the
- lower 2 bits of EVEX.aaa must be 0. */
- if (ins->evex_type == evex_from_legacy
- && ((ins->vex.mask_register_specifier & 0x3) != 0
- || ins->vex.ll != 0
- || ins->vex.zeroing != 0))
- return &bad_opcode;
-
ins->codep++;
vindex = *ins->codep++;
ins->condition_code = vindex & 0xf;
@@ -9186,7 +9178,7 @@ i386_dis_printf (const disassemble_info *info, enum disassembler_style style,
va_list ap;
enum disassembler_style curr_style = style;
const char *start, *curr;
- char staging_area[40];
+ char staging_area[50];
va_start (ap, fmt);
/* In particular print_insn()'s processing of op_txt[] can hand rather long
@@ -9630,7 +9622,32 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
? dis_jsr : dis_branch;
}
}
+ /* The purpose of placing the check here is to wait for the EVEX prefix for
+ conditional CMP and TEST to be consumed and cleared, and then make a
+ unified judgment. Because they are both in map4, we can not distinguish
+ EVEX prefix for conditional CMP and TEST from others during the
+ EVEX prefix stage of parsing. */
+ if (ins.evex_type == evex_from_legacy)
+ {
+ /* EVEX from legacy instructions, when the EVEX.ND bit is 0,
+ all bits of EVEX.vvvv and EVEX.V' must be 1. */
+ if (!ins.vex.nd && (ins.vex.register_specifier || !ins.vex.v))
+ {
+ i386_dis_printf (info, dis_style_text, "(bad)");
+ ret = ins.end_codep - priv.the_buffer;
+ goto out;
+ }
+ /* EVEX from legacy instructions require that EVEX.z, EVEX.L’L and the
+ lower 2 bits of EVEX.aaa must be 0. */
+ if ((ins.vex.mask_register_specifier & 0x3) != 0
+ || ins.vex.ll != 0 || ins.vex.zeroing != 0)
+ {
+ i386_dis_printf (info, dis_style_text, "(bad)");
+ ret = ins.end_codep - priv.the_buffer;
+ goto out;
+ }
+ }
/* If VEX.vvvv and EVEX.vvvv are unused, they must be all 1s, which
are all 0s in inverted form. */
if (ins.need_vex && ins.vex.register_specifier != 0)
@@ -10216,6 +10233,18 @@ static const char *const fgrps[][8] = {
},
};
+static const char *const oszc_flags[16] = {
+ " {dfv=}", " {dfv=cf}", " {dfv=zf}", " {dfv=zf, cf}", " {dfv=sf}",
+ " {dfv=sf, cf}", " {dfv=sf, zf}", " {dfv=sf, zf, cf}", " {dfv=of}",
+ " {dfv=of, cf}", " {dfv=of, zf}", " {dfv=of, zf, cf}", " {dfv=of, sf}",
+ " {dfv=of, sf, cf}", " {dfv=of, sf, zf}", " {dfv=of, sf, zf, cf}"
+};
+
+static const char *const scc_suffix[16] = {
+ "o", "no", "b", "ae", "e", "ne", "be", "a", "s", "ns", "t", "f",
+ "l", "ge", "le", "g"
+};
+
static void
swap_operand (instr_info *ins)
{
@@ -10398,6 +10427,23 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
*ins->obufp++ = *q;
break;
}
+ else if (l == 1 && last[0] == 'S')
+ {
+ /* Add scc suffix. */
+ oappend (ins, scc_suffix[ins->vex.scc]);
+
+ /* For SCC insns, the ND bit is required to be set to 0. */
+ if (ins->vex.nd)
+ oappend (ins, "(bad)");
+
+ /* These bits have been consumed and should be cleared or restored
+ to default values. */
+ ins->vex.v = 1;
+ ins->vex.nf = false;
+ ins->vex.mask_register_specifier = 0;
+ break;
+ }
+
if (l)
abort ();
if (ins->intel_syntax && !alt)
@@ -10477,6 +10523,10 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
*ins->obufp++ = '}';
*ins->obufp++ = ' ';
break;
+ case 'N':
+ /* Skip printing {evex} for some special instructions in MAP4. */
+ evex_printed = true;
+ break;
case 'M':
if (ins->modrm.mod != 3 && !(ins->rex2 & 7))
oappend (ins, "{evex} ");
@@ -10532,6 +10582,17 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
evex_printed = true;
}
}
+ else if (l == 1 && last[0] == 'D')
+ {
+ /* Get oszc flags value from register_specifier. */
+ int oszc_value = ~ins->vex.register_specifier & 0xf;
+
+ /* Add {dfv=of, sf, zf, cf} flags. */
+ oappend (ins, oszc_flags[oszc_value]);
+
+ /* These bits have been consumed and should be cleared. */
+ ins->vex.register_specifier = 0;
+ }
else
abort ();
break;
diff --git a/opcodes/i386-mnem.h b/opcodes/i386-mnem.h
index c2ef4f464f0..5f01bb969dd 100644
--- a/opcodes/i386-mnem.h
+++ b/opcodes/i386-mnem.h
@@ -132,2272 +132,2328 @@ extern const char i386_mnemonics[];
#define MN_pusha 0x462
#define MN_ja 0x468
#define MN_jna 0x46b
-#define MN_setna 0x46f
-#define MN_setzuna 0x475
+#define MN_ccmpna 0x46f
+#define MN_setna 0x476
+#define MN_ctestna 0x47c
+#define MN_setzuna 0x484
#define MN_cmovna (MN_fcmovna + 1)
-#define MN_fcmovna 0x47d
-#define MN_popa 0x485
+#define MN_fcmovna 0x48c
+#define MN_ccmpa 0x494
+#define MN_popa 0x49a
#define MN_movntdqa (MN_vmovntdqa + 1)
-#define MN_vmovntdqa 0x48a
+#define MN_vmovntdqa 0x49f
#define MN_movdqa (MN_vmovdqa + 1)
-#define MN_vmovdqa 0x494
-#define MN_seta 0x49c
-#define MN_prefetchnta 0x4a1
-#define MN_setzua 0x4ad
+#define MN_vmovdqa 0x4a9
+#define MN_seta 0x4b1
+#define MN_prefetchnta 0x4b6
+#define MN_ctesta 0x4c2
+#define MN_setzua 0x4c9
#define MN_cmova (MN_fcmova + 1)
-#define MN_fcmova 0x4b4
-#define MN_rex_b 0x4bb
-#define MN_ud2b 0x4c1
-#define MN_vpermi2b 0x4c6
-#define MN_vpmovm2b 0x4cf
-#define MN_vpermt2b 0x4d8
-#define MN_movdir64b 0x4e1
-#define MN_cmpxchg16b 0x4eb
-#define MN_cmpxchg8b 0x4f6
-#define MN_vpshab 0x500
-#define MN_sbb 0x507
+#define MN_fcmova 0x4d0
+#define MN_rex_b 0x4d7
+#define MN_ud2b 0x4dd
+#define MN_vpermi2b 0x4e2
+#define MN_vpmovm2b 0x4eb
+#define MN_vpermt2b 0x4f4
+#define MN_movdir64b 0x4fd
+#define MN_cmpxchg16b 0x507
+#define MN_cmpxchg8b 0x512
+#define MN_vpshab 0x51c
+#define MN_sbb 0x523
#define MN_psubb (MN_vpsubb + 1)
-#define MN_vpsubb 0x50b
-#define MN_xcrypt_ecb 0x512
-#define MN_xcryptecb 0x51d
-#define MN_llwpcb 0x527
-#define MN_slwpcb 0x52e
-#define MN_kaddb 0x535
+#define MN_vpsubb 0x527
+#define MN_xcrypt_ecb 0x52e
+#define MN_xcryptecb 0x539
+#define MN_llwpcb 0x543
+#define MN_slwpcb 0x54a
+#define MN_kaddb 0x551
#define MN_paddb (MN_vpaddb + 1)
-#define MN_vpaddb 0x53b
-#define MN_kandb 0x542
-#define MN_vpexpandb 0x548
-#define MN_vpmovusdb 0x552
-#define MN_vpmovsdb 0x55c
-#define MN_vpmovdb 0x565
-#define MN_vpcomgeb 0x56d
-#define MN_vpcomleb 0x576
-#define MN_vpcmpnleb 0x57f
-#define MN_vpcmpleb 0x589
-#define MN_vpcomfalseb 0x592
-#define MN_vpcomtrueb 0x59e
-#define MN_xcrypt_cfb 0x5a9
-#define MN_xcryptcfb 0x5b4
-#define MN_xcrypt_ofb 0x5be
-#define MN_xcryptofb 0x5c9
+#define MN_vpaddb 0x557
+#define MN_kandb 0x55e
+#define MN_vpexpandb 0x564
+#define MN_vpmovusdb 0x56e
+#define MN_vpmovsdb 0x578
+#define MN_vpmovdb 0x581
+#define MN_vpcomgeb 0x589
+#define MN_vpcomleb 0x592
+#define MN_vpcmpnleb 0x59b
+#define MN_vpcmpleb 0x5a5
+#define MN_vpcomfalseb 0x5ae
+#define MN_vpcomtrueb 0x5ba
+#define MN_xcrypt_cfb 0x5c5
+#define MN_xcryptcfb 0x5d0
+#define MN_xcrypt_ofb 0x5da
+#define MN_xcryptofb 0x5e5
#define MN_pshufb (MN_vpshufb + 1)
-#define MN_vpshufb 0x5d3
-#define MN_invlpgb 0x5db
+#define MN_vpshufb 0x5ef
+#define MN_invlpgb 0x5f7
#define MN_pavgb (MN_vpavgb + 1)
-#define MN_vpavgb 0x5e3
-#define MN_jb 0x5ea
-#define MN_pbndkb 0x5ed
+#define MN_vpavgb 0x5ff
+#define MN_jb 0x606
+#define MN_pbndkb 0x609
#define MN_pmovmskb (MN_vpmovmskb + 1)
-#define MN_vpmovmskb 0x5f4
-#define MN_vpshlb 0x5fe
-#define MN_kshiftlb 0x605
+#define MN_vpmovmskb 0x610
+#define MN_vpshlb 0x61a
+#define MN_kshiftlb 0x621
#define MN_gf2p8mulb (MN_vgf2p8mulb + 1)
-#define MN_vgf2p8mulb 0x60e
-#define MN_vpblendmb 0x619
-#define MN_vptestnmb 0x623
-#define MN_vpcomb 0x62d
-#define MN_vpshufbitqmb 0x634
-#define MN_vpermb 0x641
-#define MN_vptestmb 0x648
-#define MN_kandnb 0x651
+#define MN_vgf2p8mulb 0x62a
+#define MN_vpblendmb 0x635
+#define MN_vptestnmb 0x63f
+#define MN_vpcomb 0x649
+#define MN_vpshufbitqmb 0x650
+#define MN_vpermb 0x65d
+#define MN_vptestmb 0x664
+#define MN_kandnb 0x66d
#define MN_psignb (MN_vpsignb + 1)
-#define MN_vpsignb 0x658
-#define MN_jnb 0x660
-#define MN_setnb 0x664
-#define MN_setzunb 0x66a
+#define MN_vpsignb 0x674
+#define MN_jnb 0x67c
+#define MN_ccmpnb 0x680
+#define MN_setnb 0x687
+#define MN_ctestnb 0x68d
+#define MN_setzunb 0x695
#define MN_cmovnb (MN_fcmovnb + 1)
-#define MN_fcmovnb 0x672
-#define MN_vpcmpb 0x67a
-#define MN_vpcomeqb 0x681
+#define MN_fcmovnb 0x69d
+#define MN_ccmpb 0x6a5
+#define MN_vpcmpb 0x6ab
+#define MN_vpcomeqb 0x6b2
#define MN_gf2p8affineqb (MN_vgf2p8affineqb + 1)
-#define MN_vgf2p8affineqb 0x68a
-#define MN_vpcomneqb 0x699
-#define MN_vpcmpneqb 0x6a3
+#define MN_vgf2p8affineqb 0x6bb
+#define MN_vpcomneqb 0x6ca
+#define MN_vpcmpneqb 0x6d4
#define MN_pcmpeqb (MN_vpcmpeqb + 1)
-#define MN_vpcmpeqb 0x6ad
-#define MN_vpmovusqb 0x6b6
-#define MN_vpmovsqb 0x6c0
-#define MN_vpmultishiftqb 0x6c9
+#define MN_vpcmpeqb 0x6de
+#define MN_vpmovusqb 0x6e7
+#define MN_vpmovsqb 0x6f1
+#define MN_vpmultishiftqb 0x6fa
#define MN_gf2p8affineinvqb (MN_vgf2p8affineinvqb + 1)
-#define MN_vgf2p8affineinvqb 0x6d8
-#define MN_vpmovqb 0x6ea
-#define MN_rex_rb 0x6f2
-#define MN_korb 0x6f9
-#define MN_kxnorb 0x6fe
-#define MN_kxorb 0x705
+#define MN_vgf2p8affineinvqb 0x709
+#define MN_vpmovqb 0x71b
+#define MN_rex_rb 0x723
+#define MN_korb 0x72a
+#define MN_kxnorb 0x72f
+#define MN_kxorb 0x736
#define MN_pinsrb (MN_vpinsrb + 1)
-#define MN_vpinsrb 0x70b
-#define MN_kshiftrb 0x713
+#define MN_vpinsrb 0x73c
+#define MN_kshiftrb 0x744
#define MN_pextrb (MN_vpextrb + 1)
-#define MN_vpextrb 0x71c
-#define MN_rex_wrb 0x724
+#define MN_vpextrb 0x74d
+#define MN_rex_wrb 0x755
#define MN_pabsb (MN_vpabsb + 1)
-#define MN_vpabsb 0x72c
+#define MN_vpabsb 0x75d
#define MN_psubsb (MN_vpsubsb + 1)
-#define MN_vpsubsb 0x733
+#define MN_vpsubsb 0x764
#define MN_paddsb (MN_vpaddsb + 1)
-#define MN_vpaddsb 0x73b
+#define MN_vpaddsb 0x76c
#define MN_pminsb (MN_vpminsb + 1)
-#define MN_vpminsb 0x743
-#define MN_vpcompressb 0x74b
+#define MN_vpminsb 0x774
+#define MN_vpcompressb 0x77c
#define MN_psubusb (MN_vpsubusb + 1)
-#define MN_vpsubusb 0x757
+#define MN_vpsubusb 0x788
#define MN_paddusb (MN_vpaddusb + 1)
-#define MN_vpaddusb 0x760
-#define MN_pavgusb 0x769
-#define MN_movsb 0x771
+#define MN_vpaddusb 0x791
+#define MN_pavgusb 0x79a
+#define MN_movsb 0x7a2
#define MN_pmaxsb (MN_vpmaxsb + 1)
-#define MN_vpmaxsb 0x777
-#define MN_setb 0x77f
-#define MN_vpcomgtb 0x784
+#define MN_vpmaxsb 0x7a8
+#define MN_setb 0x7b0
+#define MN_vpcomgtb 0x7b5
#define MN_pcmpgtb (MN_vpcmpgtb + 1)
-#define MN_vpcmpgtb 0x78d
-#define MN_vpcomltb 0x796
-#define MN_vpcmpnltb 0x79f
-#define MN_vpcmpltb 0x7a9
-#define MN_vpopcntb 0x7b2
-#define MN_knotb 0x7bb
-#define MN_vprotb 0x7c1
-#define MN_vpbroadcastb 0x7c8
-#define MN_ktestb 0x7d5
-#define MN_kortestb 0x7dc
-#define MN_vpcomgeub 0x7e5
-#define MN_vpcomleub 0x7ef
-#define MN_vpcmpnleub 0x7f9
-#define MN_vpcmpleub 0x804
-#define MN_vpcomfalseub 0x80e
-#define MN_vpcomtrueub 0x81b
-#define MN_vpcomub 0x827
+#define MN_vpcmpgtb 0x7be
+#define MN_vpcomltb 0x7c7
+#define MN_vpcmpnltb 0x7d0
+#define MN_vpcmpltb 0x7da
+#define MN_vpopcntb 0x7e3
+#define MN_knotb 0x7ec
+#define MN_vprotb 0x7f2
+#define MN_vpbroadcastb 0x7f9
+#define MN_ctestb 0x806
+#define MN_ktestb 0x80d
+#define MN_kortestb 0x814
+#define MN_vpcomgeub 0x81d
+#define MN_vpcomleub 0x827
+#define MN_vpcmpnleub 0x831
+#define MN_vpcmpleub 0x83c
+#define MN_vpcomfalseub 0x846
+#define MN_vpcomtrueub 0x853
+#define MN_vpcomub 0x85f
#define MN_pminub (MN_vpminub + 1)
-#define MN_vpminub 0x82f
-#define MN_vpcmpub 0x837
-#define MN_vpcomequb 0x83f
-#define MN_vpcomnequb 0x849
-#define MN_vpcmpnequb 0x854
-#define MN_vpcmpequb 0x85f
+#define MN_vpminub 0x867
+#define MN_vpcmpub 0x86f
+#define MN_vpcomequb 0x877
+#define MN_vpcomnequb 0x881
+#define MN_vpcmpnequb 0x88c
+#define MN_vpcmpequb 0x897
#define MN_sub (MN_fsub + 1)
#define MN_fsub (MN_pfsub + 1)
-#define MN_pfsub 0x869
-#define MN_fisub 0x86f
-#define MN_vpcomgtub 0x875
-#define MN_vpcomltub 0x87f
-#define MN_vpcmpnltub 0x889
-#define MN_vpcmpltub 0x894
+#define MN_pfsub 0x8a1
+#define MN_fisub 0x8a7
+#define MN_vpcomgtub 0x8ad
+#define MN_vpcomltub 0x8b7
+#define MN_vpcmpnltub 0x8c1
+#define MN_vpcmpltub 0x8cc
#define MN_pmaxub (MN_vpmaxub + 1)
-#define MN_vpmaxub 0x89e
-#define MN_setzub 0x8a6
+#define MN_vpmaxub 0x8d6
+#define MN_setzub 0x8de
#define MN_pblendvb (MN_vpblendvb + 1)
-#define MN_vpblendvb 0x8ad
+#define MN_vpblendvb 0x8e5
#define MN_cmovb (MN_fcmovb + 1)
-#define MN_fcmovb 0x8b7
-#define MN_kmovb 0x8be
-#define MN_rex_wb 0x8c4
-#define MN_clwb 0x8cb
+#define MN_fcmovb 0x8ef
+#define MN_kmovb 0x8f6
+#define MN_rex_wb 0x8fc
+#define MN_clwb 0x903
#define MN_packsswb (MN_vpacksswb + 1)
-#define MN_vpacksswb 0x8d0
+#define MN_vpacksswb 0x908
#define MN_packuswb (MN_vpackuswb + 1)
-#define MN_vpackuswb 0x8da
-#define MN_vpmovuswb 0x8e4
-#define MN_vpmovswb 0x8ee
-#define MN_vpmovwb 0x8f7
-#define MN_rex_xb 0x8ff
-#define MN_rex_rxb 0x906
-#define MN_rex_wrxb 0x90e
-#define MN_rex_wxb 0x917
-#define MN_movzb 0x91f
-#define MN_clac 0x925
-#define MN_stac 0x92a
-#define MN_xcrypt_cbc 0x92f
-#define MN_xcryptcbc 0x93a
-#define MN_pfacc 0x944
-#define MN_pfnacc 0x94a
-#define MN_pfpnacc 0x951
-#define MN_adc 0x959
+#define MN_vpackuswb 0x912
+#define MN_vpmovuswb 0x91c
+#define MN_vpmovswb 0x926
+#define MN_vpmovwb 0x92f
+#define MN_rex_xb 0x937
+#define MN_rex_rxb 0x93e
+#define MN_rex_wrxb 0x946
+#define MN_rex_wxb 0x94f
+#define MN_movzb 0x957
+#define MN_clac 0x95d
+#define MN_stac 0x962
+#define MN_xcrypt_cbc 0x967
+#define MN_xcryptcbc 0x972
+#define MN_pfacc 0x97c
+#define MN_pfnacc 0x982
+#define MN_pfpnacc 0x989
+#define MN_adc 0x991
#define MN_dec (MN_aesdec + 3)
#define MN_aesdec (MN_vaesdec + 1)
-#define MN_vaesdec 0x95d
-#define MN_getsec 0x965
-#define MN_xsavec 0x96c
-#define MN_blcic 0x973
-#define MN_blsic 0x979
-#define MN_jc 0x97f
-#define MN_t1mskc 0x982
-#define MN_clc 0x989
-#define MN_cmc 0x98d
+#define MN_vaesdec 0x995
+#define MN_getsec 0x99d
+#define MN_xsavec 0x9a4
+#define MN_blcic 0x9ab
+#define MN_blsic 0x9b1
+#define MN_jc 0x9b7
+#define MN_t1mskc 0x9ba
+#define MN_clc 0x9c1
+#define MN_cmc 0x9c5
#define MN_aesimc (MN_vaesimc + 1)
-#define MN_vaesimc 0x991
-#define MN_rdpmc 0x999
+#define MN_vaesimc 0x9c9
+#define MN_rdpmc 0x9d1
#define MN_aesenc (MN_vaesenc + 1)
-#define MN_vaesenc 0x99f
-#define MN_inc 0x9a7
-#define MN_jnc 0x9ab
-#define MN_setnc 0x9af
-#define MN_vmfunc 0x9b5
-#define MN_setzunc 0x9bc
-#define MN_cmovnc 0x9c4
-#define MN_tlbsync 0x9cb
-#define MN_rdtsc 0x9d3
-#define MN_btc 0x9d9
-#define MN_setc 0x9dd
-#define MN_stc 0x9e2
-#define MN_setzuc 0x9e6
-#define MN_cmovc 0x9ed
-#define MN_vpermi2d 0x9f3
-#define MN_vpmovm2d 0x9fc
-#define MN_vpermt2d 0xa05
-#define MN_vpbroadcastmw2d 0xa0e
-#define MN_aad 0xa1e
-#define MN_vmread 0xa22
-#define MN_vpshad 0xa29
-#define MN_vmload 0xa30
+#define MN_vaesenc 0x9d7
+#define MN_inc 0x9df
+#define MN_jnc 0x9e3
+#define MN_ccmpnc 0x9e7
+#define MN_setnc 0x9ee
+#define MN_ctestnc 0x9f4
+#define MN_vmfunc 0x9fc
+#define MN_setzunc 0xa03
+#define MN_cmovnc 0xa0b
+#define MN_tlbsync 0xa12
+#define MN_ccmpc 0xa1a
+#define MN_rdtsc 0xa20
+#define MN_btc 0xa26
+#define MN_setc 0xa2a
+#define MN_stc (MN_ctestc + 3)
+#define MN_ctestc 0xa2f
+#define MN_setzuc 0xa36
+#define MN_cmovc 0xa3d
+#define MN_vpermi2d 0xa43
+#define MN_vpmovm2d 0xa4c
+#define MN_vpermt2d 0xa55
+#define MN_vpbroadcastmw2d 0xa5e
+#define MN_aad 0xa6e
+#define MN_vmread 0xa72
+#define MN_vpshad 0xa79
+#define MN_vmload 0xa80
#define MN_psrad (MN_vpsrad + 1)
-#define MN_vpsrad 0xa37
-#define MN_vphaddbd 0xa3e
-#define MN_vphaddubd 0xa47
+#define MN_vpsrad 0xa87
+#define MN_vphaddbd 0xa8e
+#define MN_vphaddubd 0xa97
#define MN_phsubd (MN_vphsubd + 1)
-#define MN_vphsubd 0xa51
+#define MN_vphsubd 0xaa1
#define MN_psubd (MN_vpsubd + 1)
-#define MN_vpsubd 0xa59
+#define MN_vpsubd 0xaa9
#define MN_pmovsxbd (MN_vpmovsxbd + 1)
-#define MN_vpmovsxbd 0xa60
+#define MN_vpmovsxbd 0xab0
#define MN_pmovzxbd (MN_vpmovzxbd + 1)
-#define MN_vpmovzxbd 0xa6a
+#define MN_vpmovzxbd 0xaba
#define MN_add (MN_aadd + 1)
-#define MN_aadd 0xa74
+#define MN_aadd 0xac4
#define MN_fadd (MN_pfadd + 1)
-#define MN_pfadd 0xa79
-#define MN_fiadd 0xa7f
-#define MN_tileloadd 0xa85
+#define MN_pfadd 0xac9
+#define MN_fiadd 0xacf
+#define MN_tileloadd 0xad5
#define MN_xadd (MN_cmpnaxadd + 5)
-#define MN_cmpnaxadd 0xa8f
-#define MN_cmpaxadd 0xa99
-#define MN_cmpnbxadd 0xaa2
-#define MN_cmpbxadd 0xaac
-#define MN_cmpncxadd 0xab5
-#define MN_cmpcxadd 0xabf
-#define MN_cmpnaexadd 0xac8
-#define MN_cmpaexadd 0xad3
-#define MN_cmpnbexadd 0xadd
-#define MN_cmpbexadd 0xae8
-#define MN_cmpngexadd 0xaf2
-#define MN_cmpgexadd 0xafd
-#define MN_cmpnlexadd 0xb07
-#define MN_cmplexadd 0xb12
-#define MN_cmpnexadd 0xb1c
-#define MN_cmpexadd 0xb26
-#define MN_cmppexadd 0xb2f
-#define MN_cmpngxadd 0xb39
-#define MN_cmpgxadd 0xb43
-#define MN_cmpnlxadd 0xb4c
-#define MN_cmplxadd 0xb56
-#define MN_cmpnoxadd 0xb5f
-#define MN_cmpoxadd 0xb69
-#define MN_cmppoxadd 0xb72
-#define MN_cmpnpxadd 0xb7c
-#define MN_cmppxadd 0xb86
-#define MN_cmpnsxadd 0xb8f
-#define MN_cmpsxadd 0xb99
-#define MN_cmpnzxadd 0xba2
-#define MN_cmpzxadd 0xbac
+#define MN_cmpnaxadd 0xadf
+#define MN_cmpaxadd 0xae9
+#define MN_cmpnbxadd 0xaf2
+#define MN_cmpbxadd 0xafc
+#define MN_cmpncxadd 0xb05
+#define MN_cmpcxadd 0xb0f
+#define MN_cmpnaexadd 0xb18
+#define MN_cmpaexadd 0xb23
+#define MN_cmpnbexadd 0xb2d
+#define MN_cmpbexadd 0xb38
+#define MN_cmpngexadd 0xb42
+#define MN_cmpgexadd 0xb4d
+#define MN_cmpnlexadd 0xb57
+#define MN_cmplexadd 0xb62
+#define MN_cmpnexadd 0xb6c
+#define MN_cmpexadd 0xb76
+#define MN_cmppexadd 0xb7f
+#define MN_cmpngxadd 0xb89
+#define MN_cmpgxadd 0xb93
+#define MN_cmpnlxadd 0xb9c
+#define MN_cmplxadd 0xba6
+#define MN_cmpnoxadd 0xbaf
+#define MN_cmpoxadd 0xbb9
+#define MN_cmppoxadd 0xbc2
+#define MN_cmpnpxadd 0xbcc
+#define MN_cmppxadd 0xbd6
+#define MN_cmpnsxadd 0xbdf
+#define MN_cmpsxadd 0xbe9
+#define MN_cmpnzxadd 0xbf2
+#define MN_cmpzxadd 0xbfc
#define MN_phaddd (MN_vphaddd + 1)
-#define MN_vphaddd 0xbb5
-#define MN_kaddd 0xbbd
+#define MN_vphaddd 0xc05
+#define MN_kaddd 0xc0d
#define MN_paddd (MN_vpaddd + 1)
-#define MN_vpaddd 0xbc3
-#define MN_vpshldd 0xbca
-#define MN_kandd 0xbd2
-#define MN_vpandd 0xbd8
-#define MN_vpexpandd 0xbdf
-#define MN_vpblendd 0xbe9
-#define MN_vpgatherdd 0xbf2
-#define MN_vpscatterdd 0xbfd
-#define MN_vpshrdd 0xc09
-#define MN_vpmacsdd 0xc11
-#define MN_vpmacssdd 0xc1a
-#define MN_rdseed 0xc24
-#define MN_vpcomged 0xc2b
-#define MN_vpcomled 0xc34
-#define MN_vpcmpnled 0xc3d
-#define MN_vpcmpled 0xc47
-#define MN_tilestored 0xc50
-#define MN_vpcomfalsed 0xc5b
-#define MN_vpcomtrued 0xc67
-#define MN_pi2fd 0xc72
+#define MN_vpaddd 0xc13
+#define MN_vpshldd 0xc1a
+#define MN_kandd 0xc22
+#define MN_vpandd 0xc28
+#define MN_vpexpandd 0xc2f
+#define MN_vpblendd 0xc39
+#define MN_vpgatherdd 0xc42
+#define MN_vpscatterdd 0xc4d
+#define MN_vpshrdd 0xc59
+#define MN_vpmacsdd 0xc61
+#define MN_vpmacssdd 0xc6a
+#define MN_rdseed 0xc74
+#define MN_vpcomged 0xc7b
+#define MN_vpcomled 0xc84
+#define MN_vpcmpnled 0xc8d
+#define MN_vpcmpled 0xc97
+#define MN_tilestored 0xca0
+#define MN_vpcomfalsed 0xcab
+#define MN_vpcomtrued 0xcb7
+#define MN_pi2fd 0xcc2
#define MN_pshufd (MN_vpshufd + 1)
-#define MN_vpshufd 0xc78
-#define MN_vpternlogd 0xc80
-#define MN_pf2id 0xc8b
-#define MN_invpcid 0xc91
-#define MN_rdpid 0xc99
-#define MN_invvpid 0xc9f
-#define MN_cpuid 0xca7
-#define MN_fbld 0xcad
-#define MN_cld 0xcb2
-#define MN_fld 0xcb6
+#define MN_vpshufd 0xcc8
+#define MN_vpternlogd 0xcd0
+#define MN_pf2id 0xcdb
+#define MN_invpcid 0xce1
+#define MN_rdpid 0xce9
+#define MN_invvpid 0xcef
+#define MN_cpuid 0xcf7
+#define MN_fbld 0xcfd
+#define MN_cld 0xd02
+#define MN_fld 0xd06
#define MN_shld (MN_vpshld + 2)
-#define MN_vpshld 0xcba
-#define MN_fild 0xcc1
+#define MN_vpshld 0xd0a
+#define MN_fild 0xd11
#define MN_pslld (MN_vpslld + 1)
-#define MN_vpslld 0xcc6
+#define MN_vpslld 0xd16
#define MN_pmulld (MN_vpmulld + 1)
-#define MN_vpmulld 0xccd
-#define MN_vprold 0xcd5
+#define MN_vpmulld 0xd1d
+#define MN_vprold 0xd25
#define MN_psrld (MN_vpsrld + 1)
-#define MN_vpsrld 0xcdc
-#define MN_vmptrld 0xce3
-#define MN_kshiftld 0xceb
-#define MN_enqcmd 0xcf4
-#define MN_vpblendmd 0xcfb
-#define MN_vptestnmd 0xd05
-#define MN_vpcomd 0xd0f
-#define MN_vpermd 0xd16
-#define MN_vptestmd 0xd1d
+#define MN_vpsrld 0xd2c
+#define MN_vmptrld 0xd33
+#define MN_kshiftld 0xd3b
+#define MN_enqcmd 0xd44
+#define MN_vpblendmd 0xd4b
+#define MN_vptestnmd 0xd55
+#define MN_vpcomd 0xd5f
+#define MN_vpermd 0xd66
+#define MN_vptestmd 0xd6d
#define MN_and (MN_aand + 1)
-#define MN_aand 0xd26
+#define MN_aand 0xd76
#define MN_pand (MN_vpand + 1)
-#define MN_vpand 0xd2b
-#define MN_rdrand 0xd31
-#define MN_bnd 0xd38
-#define MN_kandnd 0xd3c
-#define MN_vpandnd 0xd43
-#define MN_xend 0xd4b
-#define MN_valignd 0xd50
+#define MN_vpand 0xd7b
+#define MN_rdrand 0xd81
+#define MN_bnd 0xd88
+#define MN_kandnd 0xd8c
+#define MN_vpandnd 0xd93
+#define MN_xend 0xd9b
+#define MN_valignd 0xda0
#define MN_psignd (MN_vpsignd + 1)
-#define MN_vpsignd 0xd58
-#define MN_bound 0xd60
-#define MN_slod 0xd66
-#define MN_vfmaddsub231pd 0xd6b
-#define MN_vfmsub231pd 0xd7a
-#define MN_vfnmsub231pd 0xd86
-#define MN_vfmsubadd231pd 0xd93
-#define MN_vfmadd231pd 0xda2
-#define MN_vfnmadd231pd 0xdae
-#define MN_vfmaddsub132pd 0xdbb
-#define MN_vfmsub132pd 0xdca
-#define MN_vfnmsub132pd 0xdd6
-#define MN_vfmsubadd132pd 0xde3
-#define MN_vfmadd132pd 0xdf2
-#define MN_vfnmadd132pd 0xdfe
-#define MN_vcvtph2pd 0xe0b
-#define MN_vpermi2pd 0xe15
-#define MN_cvtpi2pd 0xe1f
-#define MN_vpermil2pd 0xe28
-#define MN_vexp2pd 0xe33
+#define MN_vpsignd 0xda8
+#define MN_bound 0xdb0
+#define MN_slod 0xdb6
+#define MN_vfmaddsub231pd 0xdbb
+#define MN_vfmsub231pd 0xdca
+#define MN_vfnmsub231pd 0xdd6
+#define MN_vfmsubadd231pd 0xde3
+#define MN_vfmadd231pd 0xdf2
+#define MN_vfnmadd231pd 0xdfe
+#define MN_vfmaddsub132pd 0xe0b
+#define MN_vfmsub132pd 0xe1a
+#define MN_vfnmsub132pd 0xe26
+#define MN_vfmsubadd132pd 0xe33
+#define MN_vfmadd132pd 0xe42
+#define MN_vfnmadd132pd 0xe4e
+#define MN_vcvtph2pd 0xe5b
+#define MN_vpermi2pd 0xe65
+#define MN_cvtpi2pd 0xe6f
+#define MN_vpermil2pd 0xe78
+#define MN_vexp2pd 0xe83
#define MN_cvtdq2pd (MN_vcvtdq2pd + 1)
-#define MN_vcvtdq2pd 0xe3b
-#define MN_vcvtudq2pd 0xe45
-#define MN_vcvtqq2pd 0xe50
-#define MN_vcvtuqq2pd 0xe5a
+#define MN_vcvtdq2pd 0xe8b
+#define MN_vcvtudq2pd 0xe95
+#define MN_vcvtqq2pd 0xea0
+#define MN_vcvtuqq2pd 0xeaa
#define MN_cvtps2pd (MN_vcvtps2pd + 1)
-#define MN_vcvtps2pd 0xe65
-#define MN_vpermt2pd 0xe6f
-#define MN_vfmaddsub213pd 0xe79
-#define MN_vfmsub213pd 0xe88
-#define MN_vfnmsub213pd 0xe94
-#define MN_vfmsubadd213pd 0xea1
-#define MN_vfmadd213pd 0xeb0
-#define MN_vfnmadd213pd 0xebc
-#define MN_vrcp14pd 0xec9
-#define MN_vrsqrt14pd 0xed2
-#define MN_vrcp28pd 0xedd
-#define MN_vrsqrt28pd 0xee6
+#define MN_vcvtps2pd 0xeb5
+#define MN_vpermt2pd 0xebf
+#define MN_vfmaddsub213pd 0xec9
+#define MN_vfmsub213pd 0xed8
+#define MN_vfnmsub213pd 0xee4
+#define MN_vfmsubadd213pd 0xef1
+#define MN_vfmadd213pd 0xf00
+#define MN_vfnmadd213pd 0xf0c
+#define MN_vrcp14pd 0xf19
+#define MN_vrsqrt14pd 0xf22
+#define MN_vrcp28pd 0xf2d
+#define MN_vrsqrt28pd 0xf36
#define MN_movapd (MN_vmovapd + 1)
-#define MN_vmovapd 0xef1
-#define MN_pswapd 0xef9
+#define MN_vmovapd 0xf41
+#define MN_pswapd 0xf49
#define MN_subpd (MN_addsubpd + 3)
#define MN_addsubpd (MN_vfmaddsubpd + 3)
-#define MN_vfmaddsubpd 0xf00
-#define MN_vaddsubpd 0xf0c
+#define MN_vfmaddsubpd 0xf50
+#define MN_vaddsubpd 0xf5c
#define MN_hsubpd (MN_vhsubpd + 1)
-#define MN_vhsubpd 0xf16
-#define MN_vfmsubpd 0xf1e
-#define MN_vfnmsubpd 0xf27
-#define MN_vsubpd 0xf31
-#define MN_vgatherpf0dpd 0xf38
-#define MN_vscatterpf0dpd 0xf46
-#define MN_vgatherpf1dpd 0xf55
-#define MN_vscatterpf1dpd 0xf63
+#define MN_vhsubpd 0xf66
+#define MN_vfmsubpd 0xf6e
+#define MN_vfnmsubpd 0xf77
+#define MN_vsubpd 0xf81
+#define MN_vgatherpf0dpd 0xf88
+#define MN_vscatterpf0dpd 0xf96
+#define MN_vgatherpf1dpd 0xfa5
+#define MN_vscatterpf1dpd 0xfb3
#define MN_addpd (MN_vfmsubaddpd + 6)
-#define MN_vfmsubaddpd 0xf72
+#define MN_vfmsubaddpd 0xfc2
#define MN_haddpd (MN_vhaddpd + 1)
-#define MN_vhaddpd 0xf7e
-#define MN_vfmaddpd 0xf86
-#define MN_vfnmaddpd 0xf8f
-#define MN_vaddpd 0xf99
+#define MN_vhaddpd 0xfce
+#define MN_vfmaddpd 0xfd6
+#define MN_vfnmaddpd 0xfdf
+#define MN_vaddpd 0xfe9
#define MN_andpd (MN_vexpandpd + 4)
-#define MN_vexpandpd 0xfa0
-#define MN_vandpd 0xfaa
+#define MN_vexpandpd 0xff0
+#define MN_vandpd 0xffa
#define MN_blendpd (MN_vblendpd + 1)
-#define MN_vblendpd 0xfb1
+#define MN_vblendpd 0x1001
#define MN_roundpd (MN_vroundpd + 1)
-#define MN_vroundpd 0xfba
-#define MN_vgatherdpd 0xfc3
-#define MN_vscatterdpd 0xfce
+#define MN_vroundpd 0x100a
+#define MN_vgatherdpd 0x1013
+#define MN_vscatterdpd 0x101e
#define MN_cmpunordpd (MN_vcmpunordpd + 1)
-#define MN_vcmpunordpd 0xfda
+#define MN_vcmpunordpd 0x102a
#define MN_cmpordpd (MN_vcmpordpd + 1)
-#define MN_vcmpordpd 0xfe6
-#define MN_vreducepd 0xff0
-#define MN_vrangepd 0xffa
-#define MN_vcmpngepd 0x1003
-#define MN_vcmpgepd 0x100d
-#define MN_vrndscalepd 0x1016
+#define MN_vcmpordpd 0x1036
+#define MN_vreducepd 0x1040
+#define MN_vrangepd 0x104a
+#define MN_vcmpngepd 0x1053
+#define MN_vcmpgepd 0x105d
+#define MN_vrndscalepd 0x1066
#define MN_cmpnlepd (MN_vcmpnlepd + 1)
-#define MN_vcmpnlepd 0x1022
+#define MN_vcmpnlepd 0x1072
#define MN_cmplepd (MN_vcmplepd + 1)
-#define MN_vcmplepd 0x102c
-#define MN_vcmpfalsepd 0x1035
-#define MN_vcmptruepd 0x1041
-#define MN_vscalefpd 0x104c
+#define MN_vcmplepd 0x107c
+#define MN_vcmpfalsepd 0x1085
+#define MN_vcmptruepd 0x1091
+#define MN_vscalefpd 0x109c
#define MN_shufpd (MN_vshufpd + 1)
-#define MN_vshufpd 0x1056
+#define MN_vshufpd 0x10a6
#define MN_unpckhpd (MN_vunpckhpd + 1)
-#define MN_vunpckhpd 0x105e
+#define MN_vunpckhpd 0x10ae
#define MN_movhpd (MN_vmovhpd + 1)
-#define MN_vmovhpd 0x1068
+#define MN_vmovhpd 0x10b8
#define MN_movmskpd (MN_vmovmskpd + 1)
-#define MN_vmovmskpd 0x1070
-#define MN_vpermilpd 0x107a
+#define MN_vmovmskpd 0x10c0
+#define MN_vpermilpd 0x10ca
#define MN_unpcklpd (MN_vunpcklpd + 1)
-#define MN_vunpcklpd 0x1084
+#define MN_vunpcklpd 0x10d4
#define MN_mulpd (MN_vmulpd + 1)
-#define MN_vmulpd 0x108e
+#define MN_vmulpd 0x10de
#define MN_movlpd (MN_vmovlpd + 1)
-#define MN_vmovlpd 0x1095
-#define MN_vpcmpd 0x109d
-#define MN_vblendmpd 0x10a4
-#define MN_vfixupimmpd 0x10ae
-#define MN_vpermpd 0x10ba
+#define MN_vmovlpd 0x10e5
+#define MN_vpcmpd 0x10ed
+#define MN_vblendmpd 0x10f4
+#define MN_vfixupimmpd 0x10fe
+#define MN_vpermpd 0x110a
#define MN_andnpd (MN_vandnpd + 1)
-#define MN_vandnpd 0x10c2
+#define MN_vandnpd 0x1112
#define MN_minpd (MN_vminpd + 1)
-#define MN_vminpd 0x10ca
+#define MN_vminpd 0x111a
#define MN_dppd (MN_vdppd + 1)
-#define MN_vdppd 0x10d1
+#define MN_vdppd 0x1121
#define MN_cmppd (MN_vcmppd + 1)
-#define MN_vcmppd 0x10d7
-#define MN_vgetexppd 0x10de
-#define MN_vgatherpf0qpd 0x10e8
-#define MN_vscatterpf0qpd 0x10f6
-#define MN_vgatherpf1qpd 0x1105
-#define MN_vscatterpf1qpd 0x1113
-#define MN_vcmpunord_qpd 0x1122
-#define MN_vcmpord_qpd 0x1130
+#define MN_vcmppd 0x1127
+#define MN_vgetexppd 0x112e
+#define MN_vgatherpf0qpd 0x1138
+#define MN_vscatterpf0qpd 0x1146
+#define MN_vgatherpf1qpd 0x1155
+#define MN_vscatterpf1qpd 0x1163
+#define MN_vcmpunord_qpd 0x1172
+#define MN_vcmpord_qpd 0x1180
#define MN_cmpneqpd (MN_vcmpneqpd + 1)
-#define MN_vcmpneqpd 0x113c
+#define MN_vcmpneqpd 0x118c
#define MN_cmpeqpd (MN_vcmpeqpd + 1)
-#define MN_vcmpeqpd 0x1146
-#define MN_vcmpge_oqpd 0x114f
-#define MN_vcmple_oqpd 0x115b
-#define MN_vcmpfalse_oqpd 0x1167
-#define MN_vcmpneq_oqpd 0x1176
-#define MN_vcmpeq_oqpd 0x1183
-#define MN_vcmpgt_oqpd 0x118f
-#define MN_vcmplt_oqpd 0x119b
-#define MN_vgatherqpd 0x11a7
-#define MN_vscatterqpd 0x11b2
-#define MN_vcmpnge_uqpd 0x11be
-#define MN_vcmpnle_uqpd 0x11cb
-#define MN_vcmptrue_uqpd 0x11d8
-#define MN_vcmpneq_uqpd 0x11e6
-#define MN_vcmpeq_uqpd 0x11f3
-#define MN_vcmpngt_uqpd 0x11ff
-#define MN_vcmpnlt_uqpd 0x120c
+#define MN_vcmpeqpd 0x1196
+#define MN_vcmpge_oqpd 0x119f
+#define MN_vcmple_oqpd 0x11ab
+#define MN_vcmpfalse_oqpd 0x11b7
+#define MN_vcmpneq_oqpd 0x11c6
+#define MN_vcmpeq_oqpd 0x11d3
+#define MN_vcmpgt_oqpd 0x11df
+#define MN_vcmplt_oqpd 0x11eb
+#define MN_vgatherqpd 0x11f7
+#define MN_vscatterqpd 0x1202
+#define MN_vcmpnge_uqpd 0x120e
+#define MN_vcmpnle_uqpd 0x121b
+#define MN_vcmptrue_uqpd 0x1228
+#define MN_vcmpneq_uqpd 0x1236
+#define MN_vcmpeq_uqpd 0x1243
+#define MN_vcmpngt_uqpd 0x124f
+#define MN_vcmpnlt_uqpd 0x125c
#define MN_orpd (MN_vorpd + 1)
-#define MN_vorpd 0x1219
+#define MN_vorpd 0x1269
#define MN_xorpd (MN_vxorpd + 1)
-#define MN_vxorpd 0x121f
-#define MN_vcmpunord_spd 0x1226
-#define MN_vcmpord_spd 0x1234
-#define MN_vcmpge_ospd 0x1240
-#define MN_vcmple_ospd 0x124c
-#define MN_vcmpfalse_ospd 0x1258
-#define MN_vcmpneq_ospd 0x1267
-#define MN_vcmpeq_ospd 0x1274
-#define MN_vcmpgt_ospd 0x1280
-#define MN_vcmplt_ospd 0x128c
-#define MN_vfpclasspd 0x1298
-#define MN_incsspd 0x12a3
-#define MN_rdsspd 0x12ab
-#define MN_vcompresspd 0x12b2
-#define MN_vcmpnge_uspd 0x12be
-#define MN_vcmpnle_uspd 0x12cb
-#define MN_vcmptrue_uspd 0x12d8
-#define MN_vcmpneq_uspd 0x12e6
-#define MN_vcmpeq_uspd 0x12f3
-#define MN_vcmpngt_uspd 0x12ff
-#define MN_vcmpnlt_uspd 0x130c
-#define MN_vcmpngtpd 0x1319
-#define MN_vcmpgtpd 0x1323
+#define MN_vxorpd 0x126f
+#define MN_vcmpunord_spd 0x1276
+#define MN_vcmpord_spd 0x1284
+#define MN_vcmpge_ospd 0x1290
+#define MN_vcmple_ospd 0x129c
+#define MN_vcmpfalse_ospd 0x12a8
+#define MN_vcmpneq_ospd 0x12b7
+#define MN_vcmpeq_ospd 0x12c4
+#define MN_vcmpgt_ospd 0x12d0
+#define MN_vcmplt_ospd 0x12dc
+#define MN_vfpclasspd 0x12e8
+#define MN_incsspd 0x12f3
+#define MN_rdsspd 0x12fb
+#define MN_vcompresspd 0x1302
+#define MN_vcmpnge_uspd 0x130e
+#define MN_vcmpnle_uspd 0x131b
+#define MN_vcmptrue_uspd 0x1328
+#define MN_vcmpneq_uspd 0x1336
+#define MN_vcmpeq_uspd 0x1343
+#define MN_vcmpngt_uspd 0x134f
+#define MN_vcmpnlt_uspd 0x135c
+#define MN_vcmpngtpd 0x1369
+#define MN_vcmpgtpd 0x1373
#define MN_cmpnltpd (MN_vcmpnltpd + 1)
-#define MN_vcmpnltpd 0x132c
+#define MN_vcmpnltpd 0x137c
#define MN_cmpltpd (MN_vcmpltpd + 1)
-#define MN_vcmpltpd 0x1336
-#define MN_vgetmantpd 0x133f
+#define MN_vcmpltpd 0x1386
+#define MN_vgetmantpd 0x138f
#define MN_movntpd (MN_vmovntpd + 1)
-#define MN_vmovntpd 0x134a
+#define MN_vmovntpd 0x139a
#define MN_sqrtpd (MN_vsqrtpd + 1)
-#define MN_vsqrtpd 0x1353
-#define MN_vtestpd 0x135b
+#define MN_vsqrtpd 0x13a3
+#define MN_vtestpd 0x13ab
#define MN_movupd (MN_vmovupd + 1)
-#define MN_vmovupd 0x1363
+#define MN_vmovupd 0x13b3
#define MN_blendvpd (MN_vblendvpd + 1)
-#define MN_vblendvpd 0x136b
+#define MN_vblendvpd 0x13bb
#define MN_divpd (MN_vdivpd + 1)
-#define MN_vdivpd 0x1375
-#define MN_vmaskmovpd 0x137c
+#define MN_vdivpd 0x13c5
+#define MN_vmaskmovpd 0x13cc
#define MN_maxpd (MN_vmaxpd + 1)
-#define MN_vmaxpd 0x1387
-#define MN_vfrczpd 0x138e
-#define MN_vpcomeqd 0x1396
-#define MN_vpcomneqd 0x139f
-#define MN_vpcmpneqd 0x13a9
+#define MN_vmaxpd 0x13d7
+#define MN_vfrczpd 0x13de
+#define MN_vpcomeqd 0x13e6
+#define MN_vpcomneqd 0x13ef
+#define MN_vpcmpneqd 0x13f9
#define MN_pcmpeqd (MN_vpcmpeqd + 1)
-#define MN_vpcmpeqd 0x13b3
-#define MN_vpgatherqd 0x13bc
-#define MN_vpscatterqd 0x13c7
-#define MN_vpmovusqd 0x13d3
-#define MN_vpmovsqd 0x13dd
-#define MN_vpmovqd 0x13e6
-#define MN_shrd 0x13ee
-#define MN_kord 0x13f3
-#define MN_kxnord 0x13f8
-#define MN_vpord 0x13ff
-#define MN_vprord 0x1405
+#define MN_vpcmpeqd 0x1403
+#define MN_vpgatherqd 0x140c
+#define MN_vpscatterqd 0x1417
+#define MN_vpmovusqd 0x1423
+#define MN_vpmovsqd 0x142d
+#define MN_vpmovqd 0x1436
+#define MN_shrd 0x143e
+#define MN_kord 0x1443
+#define MN_kxnord 0x1448
+#define MN_vpord 0x144f
+#define MN_vprord 0x1455
#define MN_word (MN_aword + 1)
-#define MN_aword 0x140c
+#define MN_aword 0x145c
#define MN_dword (MN_adword + 1)
-#define MN_adword 0x1412
-#define MN_kxord 0x1419
-#define MN_vpxord 0x141f
+#define MN_adword 0x1462
+#define MN_kxord 0x1469
+#define MN_vpxord 0x146f
#define MN_pinsrd (MN_vpinsrd + 1)
-#define MN_vpinsrd 0x1426
-#define MN_kshiftrd 0x142e
+#define MN_vpinsrd 0x1476
+#define MN_kshiftrd 0x147e
#define MN_pextrd (MN_vpextrd + 1)
-#define MN_vpextrd 0x1437
-#define MN_vfmsub231sd 0x143f
-#define MN_vfnmsub231sd 0x144b
-#define MN_vfmadd231sd 0x1458
-#define MN_vfnmadd231sd 0x1464
-#define MN_vfmsub132sd 0x1471
-#define MN_vfnmsub132sd 0x147d
-#define MN_vfmadd132sd 0x148a
-#define MN_vfnmadd132sd 0x1496
-#define MN_vcvtsh2sd 0x14a3
+#define MN_vpextrd 0x1487
+#define MN_vfmsub231sd 0x148f
+#define MN_vfnmsub231sd 0x149b
+#define MN_vfmadd231sd 0x14a8
+#define MN_vfnmadd231sd 0x14b4
+#define MN_vfmsub132sd 0x14c1
+#define MN_vfnmsub132sd 0x14cd
+#define MN_vfmadd132sd 0x14da
+#define MN_vfnmadd132sd 0x14e6
+#define MN_vcvtsh2sd 0x14f3
#define MN_cvtsi2sd (MN_vcvtsi2sd + 1)
-#define MN_vcvtsi2sd 0x14ad
-#define MN_vcvtusi2sd 0x14b7
+#define MN_vcvtsi2sd 0x14fd
+#define MN_vcvtusi2sd 0x1507
#define MN_cvtss2sd (MN_vcvtss2sd + 1)
-#define MN_vcvtss[...]
[diff truncated at 100000 bytes]
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