https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=72476aca8f585a026a54cf71ccdf7bed26db1903
commit 72476aca8f585a026a54cf71ccdf7bed26db1903
Author: Claudio Bantaloukas <claudio.bantaloukas@arm.com>
Date: Fri Jun 7 13:59:02 2024 +0000
aarch64: add Branch Record Buffer extension instructions
The FEAT_BRBE extension provides two aliases of sys:
- brb iall (Invalidates all Branch records in the Branch Record Buffer)
- brb inj (Injects the Branch Record held in BRBINFINJ_EL1,
BRBSRCINJ_EL1, and BRBTGTINJ_EL1 into the Branch Record Buffer)
This patch adds:
- the feature option "brbe" that must be added for the aliases to be available
- a new operand flag AARCH64_OPND_Rt_IN_SYS_ALIASES that warns in a comment
when Rt is set to the non default value 0b11111 (it is constrained
unpredictable whether the instruction is undefined or behaves as if the Rt
field is set to 0b11111).
- a new operand flag AARCH64_OPND_BRBOP that encodes and decodes Op2 values
from bit 5
- support for the two brb aliases above
See:
- https://developer.arm.com/documentation/ddi0602/2024-03/Base-Instructions/BRB--Branch-Record-Buffer--an-alias-of-SYS-?lang=en
- https://developer.arm.com/documentation/ddi0601/2024-03/AArch64-Instructions/BRB-INJ--Branch-Record-Injection-into-the-Branch-Record-Buffer?lang=en
- https://developer.arm.com/documentation/ddi0601/2024-03/AArch64-Instructions/BRB-IALL--Invalidate-the-Branch-Record-Buffer?lang=en
Diff:
---
gas/config/tc-aarch64.c | 8 +
gas/doc/c-aarch64.texi | 2 +
gas/testsuite/gas/aarch64/brbe-brb-bad.d | 2 +
gas/testsuite/gas/aarch64/brbe-brb-bad.l | 4 +
gas/testsuite/gas/aarch64/brbe-brb-bad.s | 6 +
gas/testsuite/gas/aarch64/brbe-brb-inst.d | 14 +
gas/testsuite/gas/aarch64/brbe-brb-inst.s | 5 +
gas/testsuite/gas/aarch64/brbe-brb-invalid.d | 3 +
gas/testsuite/gas/aarch64/brbe-brb-invalid.l | 3 +
gas/testsuite/gas/aarch64/brbe-brb.d | 12 +
gas/testsuite/gas/aarch64/brbe-brb.s | 5 +
include/opcode/aarch64.h | 7 +-
opcodes/aarch64-asm-2.c | 363 ++-
opcodes/aarch64-dis-2.c | 4523 +++++++++++++-------------
opcodes/aarch64-opc-2.c | 18 +-
opcodes/aarch64-opc.c | 24 +
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 15 +
18 files changed, 2566 insertions(+), 2449 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 73b733ff727..885ea65b8eb 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6235,6 +6235,7 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode,
case AARCH64_OPND_Rs:
case AARCH64_OPND_Ra:
case AARCH64_OPND_Rt_SYS:
+ case AARCH64_OPND_Rt_IN_SYS_ALIASES:
case AARCH64_OPND_Rd_SP:
case AARCH64_OPND_Rn_SP:
case AARCH64_OPND_Rm_SP:
@@ -6619,6 +6620,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_Ra:
case AARCH64_OPND_Rt_LS64:
case AARCH64_OPND_Rt_SYS:
+ case AARCH64_OPND_Rt_IN_SYS_ALIASES:
case AARCH64_OPND_PAIRREG:
case AARCH64_OPND_PAIRREG_OR_XZR:
case AARCH64_OPND_SVE_Rm:
@@ -8076,6 +8078,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = val;
break;
+ case AARCH64_OPND_BRBOP:
+ po_strict_enum_or_fail (aarch64_brbop_array);
+ info->imm.value = val;
+ break;
+
case AARCH64_OPND_MOPS_ADDR_Rd:
case AARCH64_OPND_MOPS_ADDR_Rs:
po_char_or_fail ('[');
@@ -10589,6 +10596,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"faminmax", AARCH64_FEATURE (FAMINMAX), AARCH64_FEATURE (SIMD)},
{"fp8", AARCH64_FEATURE (FP8), AARCH64_FEATURE (SIMD)},
{"lut", AARCH64_FEATURE (LUT), AARCH64_FEATURE (SIMD)},
+ {"brbe", AARCH64_FEATURE (BRBE), AARCH64_NO_FEATURES},
{NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
};
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index b622f30b146..b29da1f0e8f 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -165,6 +165,8 @@ automatically cause those extensions to be disabled.
@tab Enable BFloat16 to BFloat16 arithmetic for SVE2 and SME2.
@item @code{bf16} @tab @code{fp}
@tab Enable BFloat16 extension.
+@item @code{brbe} @tab
+ @tab Enable the Branch Record Buffer extension.
@item @code{chk} @tab
@tab Enable the Check Feature Status Extension.
@item @code{compnum} @tab @code{simd}
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-bad.d b/gas/testsuite/gas/aarch64/brbe-brb-bad.d
new file mode 100644
index 00000000000..6afe74d6a1a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-bad.d
@@ -0,0 +1,2 @@
+#as: -march=armv9.1-a+brbe
+#error_output: brbe-brb-bad.l
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-bad.l b/gas/testsuite/gas/aarch64/brbe-brb-bad.l
new file mode 100644
index 00000000000..b220d9a9c8d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-bad.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*: Error: operand 1 must be Branch Record Buffer operation operand -- `brb foobar'
+.*: Error: operand 1 must be Branch Record Buffer operation operand -- `brb #123'
+.*: Error: operand 1 must be Branch Record Buffer operation operand -- `brb'
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-bad.s b/gas/testsuite/gas/aarch64/brbe-brb-bad.s
new file mode 100644
index 00000000000..862290f1f56
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-bad.s
@@ -0,0 +1,6 @@
+/* brb only accepts iall and inj as arguments */
+.text
+
+brb foobar
+brb #123
+brb
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-inst.d b/gas/testsuite/gas/aarch64/brbe-brb-inst.d
new file mode 100644
index 00000000000..748d36c38a9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-inst.d
@@ -0,0 +1,14 @@
+#as: -march=armv9.1-a+brbe
+#objdump: -dr
+# This test is only valid on ELF based ports.
+#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d509729f brb iall
+.*: d509729e brb iall // unpredictable encoding \(Rt!=31\): #30
+.*: d50972bf brb inj
+.*: d50972be brb inj // unpredictable encoding \(Rt!=31\): #30
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-inst.s b/gas/testsuite/gas/aarch64/brbe-brb-inst.s
new file mode 100644
index 00000000000..e05a8808ad1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-inst.s
@@ -0,0 +1,5 @@
+ .text
+ .inst 0xd509729f // brb iall
+ .inst 0xd509729e // brb iall with non default Rt
+ .inst 0xd50972bf // brb inj
+ .inst 0xd50972be // brb inj with non default Rt
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-invalid.d b/gas/testsuite/gas/aarch64/brbe-brb-invalid.d
new file mode 100644
index 00000000000..fbd2608696b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv9.1-a
+#source: brbe-brb.s
+#error_output: brbe-brb-invalid.l
diff --git a/gas/testsuite/gas/aarch64/brbe-brb-invalid.l b/gas/testsuite/gas/aarch64/brbe-brb-invalid.l
new file mode 100644
index 00000000000..98e164acab4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb-invalid.l
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*: Error: selected processor does not support `brb iall'
+.*: Error: selected processor does not support `brb inj'
diff --git a/gas/testsuite/gas/aarch64/brbe-brb.d b/gas/testsuite/gas/aarch64/brbe-brb.d
new file mode 100644
index 00000000000..0ab23849614
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb.d
@@ -0,0 +1,12 @@
+#as: -march=armv9.1-a+brbe
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d509729f brb iall
+.*: d509729f brb iall
+.*: d50972bf brb inj
+.*: d50972bf brb inj
diff --git a/gas/testsuite/gas/aarch64/brbe-brb.s b/gas/testsuite/gas/aarch64/brbe-brb.s
new file mode 100644
index 00000000000..01b684e42e3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/brbe-brb.s
@@ -0,0 +1,5 @@
+ .text
+ brb iall
+ .inst 0xd509729f // brb iall
+ brb inj
+ .inst 0xd50972bf // brb inj
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 8a21611e3ff..c83c0a4ebb4 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -238,6 +238,8 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_FP8,
/* LUT instructions. */
AARCH64_FEATURE_LUT,
+ /* Branch Record Buffer Extension */
+ AARCH64_FEATURE_BRBE,
AARCH64_NUM_FEATURES
};
@@ -625,6 +627,8 @@ enum aarch64_opnd
AARCH64_OPND_BARRIER_PSB, /* Barrier operand for PSB. */
AARCH64_OPND_BARRIER_GCSB, /* Barrier operand for GCSB. */
AARCH64_OPND_BTI_TARGET, /* BTI {<target>}. */
+ AARCH64_OPND_BRBOP, /* BRB operation IALL or INJ in bit 5. */
+ AARCH64_OPND_Rt_IN_SYS_ALIASES, /* Defaulted and omitted Rt used in SYS aliases such as brb. */
AARCH64_OPND_LSE128_Rt, /* LSE128 <Xt1>. */
AARCH64_OPND_LSE128_Rt2, /* LSE128 <Xt2>. */
AARCH64_OPND_SVE_ADDR_RI_S4x16, /* SVE [<Xn|SP>, #<simm4>*16]. */
@@ -822,7 +826,7 @@ enum aarch64_opnd
AARCH64_OPND_RCPC3_ADDR_OPT_PREIND_WB, /* [<Xn|SP>] or [<Xn|SP>, #<imm>]!. */
AARCH64_OPND_RCPC3_ADDR_POSTIND, /* [<Xn|SP>], #<imm>. */
AARCH64_OPND_RCPC3_ADDR_PREIND_WB, /* [<Xn|SP>, #<imm>]!. */
- AARCH64_OPND_RCPC3_ADDR_OFFSET
+ AARCH64_OPND_RCPC3_ADDR_OFFSET,
};
/* Qualifier constrains an operand. It either specifies a variant of an
@@ -1918,6 +1922,7 @@ extern const char *const aarch64_sve_pattern_array[32];
extern const char *const aarch64_sve_prfop_array[16];
extern const char *const aarch64_rprfmop_array[64];
extern const char *const aarch64_sme_vlxn_array[2];
+extern const char *const aarch64_brbop_array[2];
#ifdef __cplusplus
}
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index a4b02cd9a25..6c58452efda 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -426,15 +426,15 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1218: /* movz */
value = 1218; /* --> movz. */
break;
- case 3215: /* clrbhb */
- case 1298: /* autibsp */
- case 1297: /* autibz */
- case 1296: /* autiasp */
- case 1295: /* autiaz */
- case 1294: /* pacibsp */
- case 1293: /* pacibz */
- case 1292: /* paciasp */
- case 1291: /* paciaz */
+ case 3216: /* clrbhb */
+ case 1299: /* autibsp */
+ case 1298: /* autibz */
+ case 1297: /* autiasp */
+ case 1296: /* autiaz */
+ case 1295: /* pacibsp */
+ case 1294: /* pacibz */
+ case 1293: /* paciasp */
+ case 1292: /* paciaz */
case 1271: /* gcsb */
case 1251: /* clearbhb */
case 1250: /* tsb */
@@ -465,7 +465,8 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1254: /* dsb */
value = 1254; /* --> dsb. */
break;
- case 3216: /* trcit */
+ case 3217: /* trcit */
+ case 1285: /* brb */
case 1284: /* cosp */
case 1283: /* cpp */
case 1282: /* dvp */
@@ -487,126 +488,126 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1280: /* wfit */
value = 1280; /* --> wfit. */
break;
- case 2100: /* bic */
- case 1347: /* and */
- value = 1347; /* --> and. */
+ case 2101: /* bic */
+ case 1348: /* and */
+ value = 1348; /* --> and. */
break;
- case 1330: /* mov */
- case 1349: /* and */
- value = 1349; /* --> and. */
+ case 1331: /* mov */
+ case 1350: /* and */
+ value = 1350; /* --> and. */
break;
- case 1334: /* movs */
- case 1350: /* ands */
- value = 1350; /* --> ands. */
+ case 1335: /* movs */
+ case 1351: /* ands */
+ value = 1351; /* --> ands. */
break;
- case 2101: /* cmple */
- case 1385: /* cmpge */
- value = 1385; /* --> cmpge. */
+ case 2102: /* cmple */
+ case 1386: /* cmpge */
+ value = 1386; /* --> cmpge. */
break;
- case 2104: /* cmplt */
- case 1388: /* cmpgt */
- value = 1388; /* --> cmpgt. */
+ case 2105: /* cmplt */
+ case 1389: /* cmpgt */
+ value = 1389; /* --> cmpgt. */
break;
- case 2102: /* cmplo */
- case 1390: /* cmphi */
- value = 1390; /* --> cmphi. */
+ case 2103: /* cmplo */
+ case 1391: /* cmphi */
+ value = 1391; /* --> cmphi. */
break;
- case 2103: /* cmpls */
- case 1393: /* cmphs */
- value = 1393; /* --> cmphs. */
+ case 2104: /* cmpls */
+ case 1394: /* cmphs */
+ value = 1394; /* --> cmphs. */
break;
- case 1327: /* mov */
- case 1415: /* cpy */
- value = 1415; /* --> cpy. */
- break;
- case 1329: /* mov */
+ case 1328: /* mov */
case 1416: /* cpy */
value = 1416; /* --> cpy. */
break;
- case 2111: /* fmov */
- case 1332: /* mov */
+ case 1330: /* mov */
case 1417: /* cpy */
value = 1417; /* --> cpy. */
break;
- case 1321: /* mov */
- case 1429: /* dup */
- value = 1429; /* --> dup. */
+ case 2112: /* fmov */
+ case 1333: /* mov */
+ case 1418: /* cpy */
+ value = 1418; /* --> cpy. */
break;
- case 1324: /* mov */
- case 1320: /* mov */
+ case 1322: /* mov */
case 1430: /* dup */
value = 1430; /* --> dup. */
break;
- case 2110: /* fmov */
- case 1326: /* mov */
+ case 1325: /* mov */
+ case 1321: /* mov */
case 1431: /* dup */
value = 1431; /* --> dup. */
break;
- case 1325: /* mov */
- case 1432: /* dupm */
- value = 1432; /* --> dupm. */
+ case 2111: /* fmov */
+ case 1327: /* mov */
+ case 1432: /* dup */
+ value = 1432; /* --> dup. */
break;
- case 2105: /* eon */
- case 1434: /* eor */
- value = 1434; /* --> eor. */
+ case 1326: /* mov */
+ case 1433: /* dupm */
+ value = 1433; /* --> dupm. */
break;
- case 1335: /* not */
- case 1436: /* eor */
- value = 1436; /* --> eor. */
+ case 2106: /* eon */
+ case 1435: /* eor */
+ value = 1435; /* --> eor. */
break;
- case 1336: /* nots */
- case 1437: /* eors */
- value = 1437; /* --> eors. */
+ case 1336: /* not */
+ case 1437: /* eor */
+ value = 1437; /* --> eor. */
break;
- case 2106: /* facle */
- case 1442: /* facge */
- value = 1442; /* --> facge. */
+ case 1337: /* nots */
+ case 1438: /* eors */
+ value = 1438; /* --> eors. */
break;
- case 2107: /* faclt */
- case 1443: /* facgt */
- value = 1443; /* --> facgt. */
+ case 2107: /* facle */
+ case 1443: /* facge */
+ value = 1443; /* --> facge. */
break;
- case 2108: /* fcmle */
- case 1456: /* fcmge */
- value = 1456; /* --> fcmge. */
+ case 2108: /* faclt */
+ case 1444: /* facgt */
+ value = 1444; /* --> facgt. */
break;
- case 2109: /* fcmlt */
- case 1458: /* fcmgt */
- value = 1458; /* --> fcmgt. */
+ case 2109: /* fcmle */
+ case 1457: /* fcmge */
+ value = 1457; /* --> fcmge. */
break;
- case 1318: /* fmov */
- case 1464: /* fcpy */
- value = 1464; /* --> fcpy. */
+ case 2110: /* fcmlt */
+ case 1459: /* fcmgt */
+ value = 1459; /* --> fcmgt. */
break;
- case 1317: /* fmov */
- case 1487: /* fdup */
- value = 1487; /* --> fdup. */
+ case 1319: /* fmov */
+ case 1465: /* fcpy */
+ value = 1465; /* --> fcpy. */
break;
- case 1319: /* mov */
- case 1819: /* orr */
- value = 1819; /* --> orr. */
+ case 1318: /* fmov */
+ case 1488: /* fdup */
+ value = 1488; /* --> fdup. */
break;
- case 2112: /* orn */
+ case 1320: /* mov */
case 1820: /* orr */
value = 1820; /* --> orr. */
break;
- case 1323: /* mov */
- case 1322: /* mov */
- case 1822: /* orr */
- value = 1822; /* --> orr. */
+ case 2113: /* orn */
+ case 1821: /* orr */
+ value = 1821; /* --> orr. */
break;
- case 1333: /* movs */
- case 1823: /* orrs */
- value = 1823; /* --> orrs. */
+ case 1324: /* mov */
+ case 1323: /* mov */
+ case 1823: /* orr */
+ value = 1823; /* --> orr. */
break;
- case 1328: /* mov */
- case 1886: /* sel */
- value = 1886; /* --> sel. */
+ case 1334: /* movs */
+ case 1824: /* orrs */
+ value = 1824; /* --> orrs. */
break;
- case 1331: /* mov */
+ case 1329: /* mov */
case 1887: /* sel */
value = 1887; /* --> sel. */
break;
+ case 1332: /* mov */
+ case 1888: /* sel */
+ value = 1888; /* --> sel. */
+ break;
default: return NULL;
}
@@ -650,10 +651,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 32:
case 33:
case 34:
- case 121:
case 122:
- case 180:
- case 181:
+ case 123:
+ case 124:
case 182:
case 183:
case 184:
@@ -666,30 +666,32 @@ aarch64_insert_operand (const aarch64_operand *self,
case 191:
case 192:
case 193:
- case 208:
- case 209:
+ case 194:
+ case 195:
case 210:
case 211:
- case 220:
- case 221:
+ case 212:
+ case 213:
case 222:
case 223:
case 224:
- case 235:
- case 239:
- case 243:
- case 250:
- case 251:
- case 258:
- case 259:
+ case 225:
+ case 226:
+ case 237:
+ case 241:
+ case 245:
+ case 252:
+ case 253:
case 260:
case 261:
+ case 262:
+ case 263:
return aarch64_ins_regno (self, info, code, inst, errors);
case 6:
case 118:
case 119:
- case 293:
case 295:
+ case 297:
return aarch64_ins_none (self, info, code, inst, errors);
case 17:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -703,18 +705,16 @@ aarch64_insert_operand (const aarch64_operand *self,
case 36:
case 37:
case 38:
- case 297:
+ case 299:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 39:
case 40:
case 41:
- case 225:
- case 226:
- case 229:
- case 262:
- case 263:
- case 278:
- case 279:
+ case 227:
+ case 228:
+ case 231:
+ case 264:
+ case 265:
case 280:
case 281:
case 282:
@@ -726,6 +726,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 288:
case 289:
case 290:
+ case 291:
+ case 292:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 42:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -763,23 +765,24 @@ aarch64_insert_operand (const aarch64_operand *self,
case 90:
case 91:
case 117:
- case 177:
+ case 121:
case 179:
- case 200:
- case 201:
+ case 181:
case 202:
case 203:
case 204:
case 205:
case 206:
case 207:
- case 264:
- case 291:
- case 292:
+ case 208:
+ case 209:
+ case 266:
+ case 293:
case 294:
case 296:
- case 301:
- case 302:
+ case 298:
+ case 303:
+ case 304:
return aarch64_ins_imm (self, info, code, inst, errors);
case 51:
case 52:
@@ -789,10 +792,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 55:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 59:
- case 167:
+ case 169:
return aarch64_ins_fpimm (self, info, code, inst, errors);
case 77:
- case 175:
+ case 177:
return aarch64_ins_limm (self, info, code, inst, errors);
case 78:
return aarch64_ins_aimm (self, info, code, inst, errors);
@@ -802,11 +805,11 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_fbits (self, info, code, inst, errors);
case 82:
case 83:
- case 172:
+ case 174:
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 84:
- case 171:
case 173:
+ case 175:
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 85:
case 86:
@@ -851,25 +854,23 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_prfop (self, info, code, inst, errors);
case 120:
return aarch64_ins_hint (self, info, code, inst, errors);
- case 123:
- case 124:
- return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 125:
case 126:
+ return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 127:
case 128:
- return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 129:
- return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 130:
- return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 131:
+ return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 132:
+ return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 133:
case 134:
- return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 135:
case 136:
+ return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 137:
case 138:
case 139:
@@ -883,125 +884,127 @@ aarch64_insert_operand (const aarch64_operand *self,
case 147:
case 148:
case 149:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 150:
case 151:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 152:
case 153:
case 154:
case 155:
case 156:
case 157:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 158:
case 159:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 160:
case 161:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 162:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 163:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 164:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 165:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 166:
- return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ case 167:
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
case 168:
+ return aarch64_ins_sve_asimm (self, info, code, inst, errors);
+ case 170:
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
- case 169:
+ case 171:
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
- case 170:
+ case 172:
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
- case 174:
- return aarch64_ins_inv_limm (self, info, code, inst, errors);
case 176:
- return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
+ return aarch64_ins_inv_limm (self, info, code, inst, errors);
case 178:
+ return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
+ case 180:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 194:
- case 195:
case 196:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 197:
case 198:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 199:
- case 277:
+ case 200:
+ case 201:
+ case 279:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 212:
- case 213:
case 214:
case 215:
- return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 216:
case 217:
+ return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 218:
case 219:
+ case 220:
+ case 221:
return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
- case 227:
- case 228:
+ case 229:
case 230:
- case 231:
case 232:
case 233:
case 234:
- return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 235:
case 236:
+ return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 238:
return aarch64_ins_sve_index_imm (self, info, code, inst, errors);
- case 237:
+ case 239:
return aarch64_ins_sve_index (self, info, code, inst, errors);
- case 238:
case 240:
- case 257:
- case 303:
- case 304:
+ case 242:
+ case 259:
case 305:
+ case 306:
+ case 307:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
- case 241:
- case 242:
+ case 243:
case 244:
- case 245:
case 246:
case 247:
- case 256:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 248:
case 249:
+ case 258:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
+ case 250:
+ case 251:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 252:
case 254:
- case 265:
+ case 256:
+ case 267:
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
- case 253:
case 255:
+ case 257:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 266:
- case 267:
case 268:
case 269:
case 270:
case 271:
case 272:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 273:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 274:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 275:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 276:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 277:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 278:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 298:
- case 299:
case 300:
+ case 301:
+ case 302:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
- case 306:
- case 307:
case 308:
case 309:
- return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
case 310:
+ case 311:
+ return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
+ case 312:
return aarch64_ins_rcpc3_addr_offset (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 35501d6777e..3d17f18c9a5 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -62,7 +62,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx00xxx
fmopa. */
- return 2412;
+ return 2413;
}
else
{
@@ -70,7 +70,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx10xxx
fmops. */
- return 2415;
+ return 2416;
}
}
else
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2526;
+ return 2527;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2527;
+ return 2528;
}
}
}
@@ -102,7 +102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx0xxxx
fmopa. */
- return 2413;
+ return 2414;
}
else
{
@@ -110,7 +110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx1xxxx
fmops. */
- return 2416;
+ return 2417;
}
}
}
@@ -128,7 +128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx00000xxxxxxxxxxxxxxxxx
mov. */
- return 2436;
+ return 2437;
}
else
{
@@ -140,7 +140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x0010000xxxxxxxxxxxxxxxx
addha. */
- return 2404;
+ return 2405;
}
else
{
@@ -148,7 +148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x1010000xxxxxxxxxxxxxxxx
addha. */
- return 2405;
+ return 2406;
}
}
else
@@ -159,7 +159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x0010001xxxxxxxxxxxxxxxx
addva. */
- return 2408;
+ return 2409;
}
else
{
@@ -167,7 +167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x1010001xxxxxxxxxxxxxxxx
addva. */
- return 2409;
+ return 2410;
}
}
}
@@ -180,7 +180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x100xxxxxxxxxxxxxxxxx
zero. */
- return 2439;
+ return 2440;
}
else
{
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2956;
+ return 2957;
}
}
}
@@ -200,7 +200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x001xxxxxxxxxxxxxxxxx
mov. */
- return 2435;
+ return 2436;
}
else
{
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2670;
+ return 2671;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2669;
+ return 2670;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2668;
+ return 2669;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2677;
+ return 2678;
}
else
{
@@ -258,7 +258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx000xxxxxxxxx
mov. */
- return 2673;
+ return 2674;
}
else
{
@@ -270,7 +270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000x011xxxxx001xxxxxxxxx
movaz. */
- return 3301;
+ return 3302;
}
else
{
@@ -278,7 +278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100x011xxxxx001xxxxxxxxx
movaz. */
- return 3303;
+ return 3304;
}
}
else
@@ -289,7 +289,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x011xxxxx001xxxxxxxxx
movaz. */
- return 3302;
+ return 3303;
}
else
{
@@ -297,7 +297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x011xxxxx001xxxxxxxxx
movaz. */
- return 3304;
+ return 3305;
}
}
}
@@ -313,7 +313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2667;
+ return 2668;
}
else
{
@@ -321,7 +321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2666;
+ return 2667;
}
}
else
@@ -334,7 +334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2688;
+ return 2689;
}
else
{
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2687;
+ return 2688;
}
}
else
@@ -351,7 +351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2665;
+ return 2666;
}
}
}
@@ -364,7 +364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2675;
+ return 2676;
}
else
{
@@ -372,7 +372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2671;
+ return 2672;
}
}
}
@@ -386,7 +386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2678;
+ return 2679;
}
else
{
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx010xxxxxxxxx
mov. */
- return 2674;
+ return 2675;
}
else
{
@@ -408,7 +408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000000xx11xxxxx011xxxxxxxxx
movaz. */
- return 3297;
+ return 3298;
}
else
{
@@ -416,7 +416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000100xx11xxxxx011xxxxxxxxx
movaz. */
- return 3299;
+ return 3300;
}
}
else
@@ -427,7 +427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010xx11xxxxx011xxxxxxxxx
movaz. */
- return 3298;
+ return 3299;
}
else
{
@@ -435,7 +435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110xx11xxxxx011xxxxxxxxx
movaz. */
- return 3300;
+ return 3301;
}
}
}
@@ -449,7 +449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2676;
+ return 2677;
}
else
{
@@ -457,7 +457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2672;
+ return 2673;
}
}
}
@@ -484,7 +484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2604;
+ return 2605;
}
else
{
@@ -492,7 +492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2605;
+ return 2606;
}
}
else
@@ -503,7 +503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2628;
+ return 2629;
}
else
{
@@ -511,7 +511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2629;
+ return 2630;
}
}
}
@@ -525,7 +525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2620;
+ return 2621;
}
else
{
@@ -533,7 +533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2621;
+ return 2622;
}
}
else
@@ -544,7 +544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2612;
+ return 2613;
}
else
{
@@ -552,7 +552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2613;
+ return 2614;
}
}
}
@@ -569,7 +569,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2636;
+ return 2637;
}
else
{
@@ -577,7 +577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2637;
+ return 2638;
}
}
else
@@ -588,7 +588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2660;
+ return 2661;
}
else
{
@@ -596,7 +596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2661;
+ return 2662;
}
}
}
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2652;
+ return 2653;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2653;
+ return 2654;
}
}
else
@@ -629,7 +629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2644;
+ return 2645;
}
else
{
@@ -637,7 +637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2645;
+ return 2646;
}
}
}
@@ -649,7 +649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000000xxxxxxxxxxxxxxxxxxxxx
ld1b. */
- return 2440;
+ return 2441;
}
}
else
@@ -664,7 +664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx00xxx
smopa. */
- return 2419;
+ return 2420;
}
else
{
@@ -672,7 +672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2750;
+ return 2751;
}
}
else
@@ -681,7 +681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000100xxxxxxxxxxxxxxxx0xxxx
ld1w. */
- return 2442;
+ return 2443;
}
}
else
@@ -692,7 +692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx10xxx
smops. */
- return 2421;
+ return 2422;
}
else
{
@@ -700,7 +700,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2751;
+ return 2752;
}
}
}
@@ -723,7 +723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2600;
+ return 2601;
}
else
{
@@ -731,7 +731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2601;
+ return 2602;
}
}
else
@@ -742,7 +742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2624;
+ return 2625;
}
else
{
@@ -750,7 +750,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2625;
+ return 2626;
}
}
}
@@ -764,7 +764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2616;
+ return 2617;
}
else
{
@@ -772,7 +772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2617;
+ return 2618;
}
}
else
@@ -783,7 +783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2608;
+ return 2609;
}
else
{
@@ -791,7 +791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2609;
+ return 2610;
}
}
}
@@ -808,7 +808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2632;
+ return 2633;
}
else
{
@@ -816,7 +816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2633;
+ return 2634;
}
}
else
@@ -827,7 +827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2656;
+ return 2657;
}
else
{
@@ -835,7 +835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2657;
+ return 2658;
}
}
}
@@ -849,7 +849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2648;
+ return 2649;
}
else
{
@@ -857,7 +857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2649;
+ return 2650;
}
}
else
@@ -868,7 +868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2640;
+ return 2641;
}
else
{
@@ -876,7 +876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2641;
+ return 2642;
}
}
}
@@ -888,7 +888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000010xxxxxxxxxxxxxxxxxxxxx
ld1h. */
- return 2441;
+ return 2442;
}
}
else
@@ -901,7 +901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000110xxxxxxxxxxxxxxxx0xxxx
smopa. */
- return 2420;
+ return 2421;
}
else
{
@@ -909,7 +909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000110xxxxxxxxxxxxxxxx0xxxx
ld1d. */
- return 2443;
+ return 2444;
}
}
else
@@ -918,7 +918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000110xxxxxxxxxxxxxxxx1xxxx
smops. */
- return 2422;
+ return 2423;
}
}
}
@@ -944,7 +944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2776;
+ return 2777;
}
else
{
@@ -952,7 +952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2777;
+ return 2778;
}
}
else
@@ -963,7 +963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2800;
+ return 2801;
}
else
{
@@ -971,7 +971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2801;
+ return 2802;
}
}
}
@@ -985,7 +985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2792;
+ return 2793;
}
else
{
@@ -993,7 +993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2793;
+ return 2794;
}
}
else
@@ -1004,7 +1004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2784;
+ return 2785;
}
else
{
@@ -1012,7 +1012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2785;
+ return 2786;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2808;
+ return 2809;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2809;
+ return 2810;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2832;
+ return 2833;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2833;
+ return 2834;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2824;
+ return 2825;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2825;
+ return 2826;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2816;
+ return 2817;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2817;
+ return 2818;
}
}
}
@@ -1109,7 +1109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000001xxxxxxxxxxxxxxxxxxxxx
st1b. */
- return 2450;
+ return 2451;
}
}
else
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000101xxxxxxxxxxxxxxxx0xxxx
sumopa. */
- return 2423;
+ return 2424;
}
else
{
@@ -1130,7 +1130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000101xxxxxxxxxxxxxxxx0xxxx
st1w. */
- return 2452;
+ return 2453;
}
}
else
@@ -1139,7 +1139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000101xxxxxxxxxxxxxxxx1xxxx
sumops. */
- return 2425;
+ return 2426;
}
}
}
@@ -1161,7 +1161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2772;
+ return 2773;
}
else
{
@@ -1169,7 +1169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2773;
+ return 2774;
}
}
else
@@ -1180,7 +1180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2796;
+ return 2797;
}
else
{
@@ -1188,7 +1188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2797;
+ return 2798;
}
}
}
@@ -1202,7 +1202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2788;
+ return 2789;
}
else
{
@@ -1210,7 +1210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2789;
+ return 2790;
}
}
else
@@ -1221,7 +1221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2780;
+ return 2781;
}
else
{
@@ -1229,7 +1229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2781;
+ return 2782;
}
}
}
@@ -1246,7 +1246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2804;
+ return 2805;
}
else
{
@@ -1254,7 +1254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2805;
+ return 2806;
}
}
else
@@ -1265,7 +1265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2828;
+ return 2829;
}
else
{
@@ -1273,7 +1273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2829;
+ return 2830;
}
}
}
@@ -1287,7 +1287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2820;
+ return 2821;
}
else
{
@@ -1295,7 +1295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2821;
+ return 2822;
}
}
else
@@ -1306,7 +1306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2812;
+ return 2813;
}
else
{
@@ -1314,7 +1314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2813;
+ return 2814;
}
}
}
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000011xxxxxxxxxxxxxxxxxxxxx
st1h. */
- return 2451;
+ return 2452;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000111xxxxxxxxxxxxxxxx0xxxx
sumopa. */
- return 2424;
+ return 2425;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000111xxxxxxxxxxxxxxxx0xxxx
st1d. */
- return 2453;
+ return 2454;
}
}
else
@@ -1356,7 +1356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000111xxxxxxxxxxxxxxxx1xxxx
sumops. */
- return 2426;
+ return 2427;
}
}
}
@@ -1406,7 +1406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2726;
+ return 2727;
}
else
{
@@ -1414,7 +1414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2931;
+ return 2932;
}
}
[...]
[diff truncated at 100000 bytes]