[binutils-gdb] Support Intel AVX10.2 minmax, vector copy and compare instructions
Haochen Jiang
jianghc@sourceware.org
Mon Dec 23 03:32:32 GMT 2024
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b6324bbd83d6b3009ea45b7a6ca6794a8c0b018a
commit b6324bbd83d6b3009ea45b7a6ca6794a8c0b018a
Author: Haochen Jiang <haochen.jiang@intel.com>
Date: Mon Dec 23 11:32:03 2024 +0800
Support Intel AVX10.2 minmax, vector copy and compare instructions
In this patch, we will support AVX10.2 minmax, vector copy and compare
instructions. This will finish the new instruction form support for
AVX10.2. Most of them are new instructions forms except for vmovd
and vmovw, which are extended usage from the old ones.
gas/ChangeLog:
* NEWS: Mention AVX10.2.
* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-5-intel.d: New test.
* testsuite/gas/i386/avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-len.h: Add EVEX_LEN_0F7E_P_1_W_1,
EVEX_LEN_0FD6_P_2_W_0, EVEX_LEN_MAP5_6E and EVEX_LEN_MAP5_7E.
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F3A52, PREFIX_EVEX_0F3A53, PREFIX_EVEX_MAP5_2E,
PREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_6E and PREFIX_EVEX_MAP5_7E.
* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42, EVEX_W_0F7E_P_1
and EVEX_W_0FD6. Add EVEX_W_MAP5_6E_P_1 and EVEX_W_MAP5_7E_P_1.
* i386-dis-evex.h: Add and adjust table entries for AVX10.2.
* i386-dis.c (PREFIX_EVEX_0F2E): New.
(PREFIX_EVEX_0F2F): Ditto.
(PREFIX_EVEX_0F3A52): Ditto.
(PREFIX_EVEX_0F3A53): Ditto.
(PREFIX_EVEX_MAP5_2E): Ditto.
(PREFIX_EVEX_MAP5_2F): Ditto.
(PREFIX_EVEX_MAP5_6E_L_0): Ditto.
(PREFIX_EVEX_MAP5_7E_L_0): Ditto.
(EVEX_LEN_0F7E_P_1_W_1): Ditto.
(EVEX_LEN_0FD6_P_2_W_0): Ditto.
(EVEX_LEN_MAP5_6E): Ditto.
(EVEX_LEN_MAP5_7E): Ditto.
(EVEX_W_MAP5_6E_P_1): Ditto.
(EVEX_W_MAP5_7E_P_1): Ditto.
* i386-opc.tbl: Add AVX10.2 instructions.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Co-authored-by: Jun Zhang <jun.zhang@intel.com>
Co-authored-by: Zewei Mo <zewei.mo@intel.com>
Diff:
---
gas/NEWS | 2 +
gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d | 112 +
gas/testsuite/gas/i386/avx10_2-256-miscs.d | 110 +
gas/testsuite/gas/i386/avx10_2-256-miscs.s | 135 +
gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d | 34 +
gas/testsuite/gas/i386/avx10_2-512-miscs.d | 32 +
gas/testsuite/gas/i386/avx10_2-512-miscs.s | 43 +
gas/testsuite/gas/i386/i386.exp | 4 +
.../gas/i386/x86-64-avx10_2-256-miscs-intel.d | 112 +
gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d | 110 +
gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s | 135 +
.../gas/i386/x86-64-avx10_2-512-miscs-intel.d | 34 +
gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d | 32 +
gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s | 43 +
gas/testsuite/gas/i386/x86-64.exp | 4 +
opcodes/i386-dis-evex-len.h | 20 +
opcodes/i386-dis-evex-prefix.h | 46 +-
opcodes/i386-dis-evex-w.h | 12 +-
opcodes/i386-dis-evex.h | 12 +-
opcodes/i386-dis.c | 25 +-
opcodes/i386-mnem.h | 4137 ++++++++++----------
opcodes/i386-opc.tbl | 11 +
opcodes/i386-tbl.h | 554 ++-
23 files changed, 3504 insertions(+), 2255 deletions(-)
diff --git a/gas/NEWS b/gas/NEWS
index 8d4bca61126..51f2a97291b 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Add support for the x86 Intel AVX10.2 instructions.
+
* Add support for the x86 Intel SM4 AVX10.2 instructions.
* Support for Nios II targets has been dropped, as the architecture has
diff --git a/gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d b/gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d
new file mode 100644
index 00000000000..6f2215bfe5f
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d
@@ -0,0 +1,112 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/256 minmax, vector copy and compare insns (Intel disassembly)
+#source: avx10_2-256-miscs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f3 57 08 52 f4 7b\s+vminmaxpbf16 xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 57 28 52 f4 7b\s+vminmaxpbf16 ymm6,ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 57 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16 ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 28 52 71 7f 7b\s+vminmaxpbf16 ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16 xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 08 52 71 7f 7b\s+vminmaxpbf16 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 08 52 f4 7b\s+vminmaxpd xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 28 52 f4 7b\s+vminmaxpd ymm6,ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 28 52 71 7f 7b\s+vminmaxpd ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 08 52 71 7f 7b\s+vminmaxpd xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 08 52 f4 7b\s+vminmaxph xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 54 28 52 f4 7b\s+vminmaxph ymm6,ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 54 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxph ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 28 52 71 7f 7b\s+vminmaxph ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxph xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 08 52 71 7f 7b\s+vminmaxph xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 08 52 f4 7b\s+vminmaxps xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 55 28 52 f4 7b\s+vminmaxps ymm6,ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 55 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxps ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 28 52 71 7f 7b\s+vminmaxps ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxps xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 08 52 71 7f 7b\s+vminmaxps xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 38 52 31 7b\s+vminmaxpbf16 ymm6,ymm5,WORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 bf 52 72 80 7b\s+vminmaxpbf16 ymm6\{k7\}\{z\},ymm5,WORD BCST \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 18 52 31 7b\s+vminmaxpbf16 xmm6,xmm5,WORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 9f 52 72 80 7b\s+vminmaxpbf16 xmm6\{k7\}\{z\},xmm5,WORD BCST \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 18 52 f4 7b\s+vminmaxpd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 38 52 31 7b\s+vminmaxpd ymm6,ymm5,QWORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 bf 52 72 80 7b\s+vminmaxpd ymm6\{k7\}\{z\},ymm5,QWORD BCST \[edx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 18 52 31 7b\s+vminmaxpd xmm6,xmm5,QWORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 9f 52 72 80 7b\s+vminmaxpd xmm6\{k7\}\{z\},xmm5,QWORD BCST \[edx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 f3 50 18 52 f4 7b\s+vminmaxph ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 54 38 52 31 7b\s+vminmaxph ymm6,ymm5,WORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 bf 52 72 80 7b\s+vminmaxph ymm6\{k7\}\{z\},ymm5,WORD BCST \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 18 52 31 7b\s+vminmaxph xmm6,xmm5,WORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 9f 52 72 80 7b\s+vminmaxph xmm6\{k7\}\{z\},xmm5,WORD BCST \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 52 f4 7b\s+vminmaxps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 55 38 52 31 7b\s+vminmaxps ymm6,ymm5,DWORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 bf 52 72 80 7b\s+vminmaxps ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 18 52 31 7b\s+vminmaxps xmm6,xmm5,DWORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 9f 52 72 80 7b\s+vminmaxps xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 08 53 f4 7b\s+vminmaxsd xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 18 53 f4 7b\s+vminmaxsd xmm6,xmm5,xmm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsd xmm6\{k7\},xmm5,QWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 08 53 31 7b\s+vminmaxsd xmm6,xmm5,QWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 08 53 f4 7b\s+vminmaxsh xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 54 18 53 f4 7b\s+vminmaxsh xmm6,xmm5,xmm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 54 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsh xmm6\{k7\},xmm5,WORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 08 53 31 7b\s+vminmaxsh xmm6,xmm5,WORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 08 53 f4 7b\s+vminmaxss xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 55 18 53 f4 7b\s+vminmaxss xmm6,xmm5,xmm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 55 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxss xmm6\{k7\},xmm5,DWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 08 53 31 7b\s+vminmaxss xmm6,xmm5,DWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 08 53 71 7f 7b\s+vminmaxsd xmm6,xmm5,QWORD PTR \[ecx\+0x3f8\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 8f 53 72 80 7b\s+vminmaxsd xmm6\{k7\}\{z\},xmm5,QWORD PTR \[edx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 08 53 71 7f 7b\s+vminmaxsh xmm6,xmm5,WORD PTR \[ecx\+0xfe\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 8f 53 72 80 7b\s+vminmaxsh xmm6\{k7\}\{z\},xmm5,WORD PTR \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 08 53 71 7f 7b\s+vminmaxss xmm6,xmm5,DWORD PTR \[ecx\+0x1fc\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 8f 53 72 80 7b\s+vminmaxss xmm6\{k7\}\{z\},xmm5,DWORD PTR \[edx-0x200\],0x7b
+\s*[a-f0-9]+:\s*62 f1 7e 08 7e f5\s+vmovd xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f1 7d 08 d6 ee\s+vmovd xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f5 7e 08 6e f5\s+vmovw xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f5 7e 08 7e ee\s+vmovw xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f f5\s+vcomxsd xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f1 ff 18 2f f5\s+vcomxsd xmm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f b4 f4 00 00 00 10\s+vcomxsd xmm6,QWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f 31\s+vcomxsd xmm6,QWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f f5\s+vcomxsh xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f5 7e 18 2f f5\s+vcomxsh xmm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f b4 f4 00 00 00 10\s+vcomxsh xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f 31\s+vcomxsh xmm6,WORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f f5\s+vcomxss xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f1 7e 18 2f f5\s+vcomxss xmm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f b4 f4 00 00 00 10\s+vcomxss xmm6,DWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f 31\s+vcomxss xmm6,DWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f 71 7f\s+vcomxsd xmm6,QWORD PTR \[ecx\+0x3f8\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f 72 80\s+vcomxsd xmm6,QWORD PTR \[edx-0x400\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f 71 7f\s+vcomxsh xmm6,WORD PTR \[ecx\+0xfe\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f 72 80\s+vcomxsh xmm6,WORD PTR \[edx-0x100\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f 71 7f\s+vcomxss xmm6,DWORD PTR \[ecx\+0x1fc\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f 72 80\s+vcomxss xmm6,DWORD PTR \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e f5\s+vucomxsd xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f1 ff 18 2e f5\s+vucomxsd xmm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e b4 f4 00 00 00 10\s+vucomxsd xmm6,QWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e 31\s+vucomxsd xmm6,QWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e f5\s+vucomxsh xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f5 7e 18 2e f5\s+vucomxsh xmm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e b4 f4 00 00 00 10\s+vucomxsh xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e 31\s+vucomxsh xmm6,WORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e f5\s+vucomxss xmm6,xmm5
+\s*[a-f0-9]+:\s*62 f1 7e 18 2e f5\s+vucomxss xmm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e b4 f4 00 00 00 10\s+vucomxss xmm6,DWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e 31\s+vucomxss xmm6,DWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e 71 7f\s+vucomxsd xmm6,QWORD PTR \[ecx\+0x3f8\]
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e 72 80\s+vucomxsd xmm6,QWORD PTR \[edx-0x400\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e 71 7f\s+vucomxsh xmm6,WORD PTR \[ecx\+0xfe\]
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e 72 80\s+vucomxsh xmm6,WORD PTR \[edx-0x100\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e 71 7f\s+vucomxss xmm6,DWORD PTR \[ecx\+0x1fc\]
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e 72 80\s+vucomxss xmm6,DWORD PTR \[edx-0x200\]
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-miscs.d b/gas/testsuite/gas/i386/avx10_2-256-miscs.d
new file mode 100644
index 00000000000..bb262b171df
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-miscs.d
@@ -0,0 +1,110 @@
+#objdump: -dw
+#name: i386 AVX10.2/256 minmax, vector copy and compare insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f3 57 08 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 57 28 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 57 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 57 28 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 57 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 57 08 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 08 52 f4 7b\s+vminmaxpd\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 28 52 f4 7b\s+vminmaxpd\s\$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d5 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d5 28 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d5 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d5 08 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 08 52 f4 7b\s+vminmaxph\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 28 52 f4 7b\s+vminmaxph\s\$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 54 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 54 28 52 71 7f 7b\s+vminmaxph\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 54 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 54 08 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 08 52 f4 7b\s+vminmaxps\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 28 52 f4 7b\s+vminmaxps\s\$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 55 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 55 28 52 71 7f 7b\s+vminmaxps\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 55 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 55 08 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 57 38 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%ecx\)\{1to16\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 57 bf 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%edx\)\{1to16\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 57 18 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%ecx\)\{1to8\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 57 9f 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%edx\)\{1to8\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d5 38 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to4\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d5 bf 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d5 18 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to2\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 9f 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 50 18 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 54 38 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to16\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 54 bf 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to16\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 54 18 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to8\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 9f 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to8\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 51 18 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 55 38 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 55 bf 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 55 18 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 9f 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d5 08 53 f4 7b\s+vminmaxsd\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 18 53 f4 7b\s+vminmaxsd\s\$0x7b,\{sae\},%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsd\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d5 08 53 31 7b\s+vminmaxsd\s\$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 08 53 f4 7b\s+vminmaxsh\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 18 53 f4 7b\s+vminmaxsh\s\$0x7b,\{sae\},%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsh\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 54 08 53 31 7b\s+vminmaxsh\s\$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 08 53 f4 7b\s+vminmaxss\s\$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 18 53 f4 7b\s+vminmaxss\s\$0x7b,\{sae\},%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxss\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 55 08 53 31 7b\s+vminmaxss\s\$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 08 53 71 7f 7b\s+vminmaxsd\s\$0x7b,0x3f8\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 d5 8f 53 72 80 7b\s+vminmaxsd\s\$0x7b,-0x400\(%edx\),%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 54 08 53 71 7f 7b\s+vminmaxsh\s\$0x7b,0xfe\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 54 8f 53 72 80 7b\s+vminmaxsh\s\$0x7b,-0x100\(%edx\),%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 55 08 53 71 7f 7b\s+vminmaxss\s\$0x7b,0x1fc\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 55 8f 53 72 80 7b\s+vminmaxss\s\$0x7b,-0x200\(%edx\),%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 7e 08 7e f5\s+vmovd %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 7d 08 d6 ee\s+vmovd %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 6e f5\s+vmovw %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 7e ee\s+vmovw %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f f5\s+vcomxsd %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 18 2f f5\s+vcomxsd \{sae\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f b4 f4 00 00 00 10\s+vcomxsd 0x10000000\(%esp,%esi,8\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f 31\s+vcomxsd \(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f f5\s+vcomxsh %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 18 2f f5\s+vcomxsh \{sae\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f b4 f4 00 00 00 10\s+vcomxsh 0x10000000\(%esp,%esi,8\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f 31\s+vcomxsh \(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f f5\s+vcomxss %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 18 2f f5\s+vcomxss \{sae\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f b4 f4 00 00 00 10\s+vcomxss 0x10000000\(%esp,%esi,8\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f 31\s+vcomxss \(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f 71 7f\s+vcomxsd 0x3f8\(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2f 72 80\s+vcomxsd -0x400\(%edx\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f 71 7f\s+vcomxsh 0xfe\(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2f 72 80\s+vcomxsh -0x100\(%edx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f 71 7f\s+vcomxss 0x1fc\(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2f 72 80\s+vcomxss -0x200\(%edx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e f5\s+vucomxsd %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 18 2e f5\s+vucomxsd \{sae\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e b4 f4 00 00 00 10\s+vucomxsd 0x10000000\(%esp,%esi,8\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e 31\s+vucomxsd \(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e f5\s+vucomxsh %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 18 2e f5\s+vucomxsh \{sae\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e b4 f4 00 00 00 10\s+vucomxsh 0x10000000\(%esp,%esi,8\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e 31\s+vucomxsh \(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e f5\s+vucomxss %xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 18 2e f5\s+vucomxss \{sae\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e b4 f4 00 00 00 10\s+vucomxss 0x10000000\(%esp,%esi,8\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e 31\s+vucomxss \(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e 71 7f\s+vucomxsd 0x3f8\(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 ff 08 2e 72 80\s+vucomxsd -0x400\(%edx\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e 71 7f\s+vucomxsh 0xfe\(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f5 7e 08 2e 72 80\s+vucomxsh -0x100\(%edx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e 71 7f\s+vucomxss 0x1fc\(%ecx\),%xmm6
+\s*[a-f0-9]+:\s*62 f1 7e 08 2e 72 80\s+vucomxss -0x200\(%edx\),%xmm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-miscs.s b/gas/testsuite/gas/i386/avx10_2-256-miscs.s
new file mode 100644
index 00000000000..78a1502e380
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-miscs.s
@@ -0,0 +1,135 @@
+# Check 32bit AVX10.2/256 instructions
+
+ .arch generic32
+ .arch .avx10.2/256
+ .text
+_start:
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m $123, %xmm4, %xmm5, %xmm6
+ vminmax\m $123, %ymm4, %ymm5, %ymm6
+ vminmax\m $123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+ vminmax\m $123, 4064(%ecx), %ymm5, %ymm6
+ vminmax\m $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+ vminmax\m $123, 2032(%ecx), %xmm5, %xmm6
+ .endr
+
+ vminmaxpbf16 $123, (%ecx){1to16}, %ymm5, %ymm6
+ vminmaxpbf16 $123, -256(%edx){1to16}, %ymm5, %ymm6{%k7}{z}
+ vminmaxpbf16 $123, (%ecx){1to8}, %xmm5, %xmm6
+ vminmaxpbf16 $123, -256(%edx){1to8}, %xmm5, %xmm6{%k7}{z}
+ vminmaxpd $123, {sae}, %ymm4, %ymm5, %ymm6
+ vminmaxpd $123, (%ecx){1to4}, %ymm5, %ymm6
+ vminmaxpd $123, -1024(%edx){1to4}, %ymm5, %ymm6{%k7}{z}
+ vminmaxpd $123, (%ecx){1to2}, %xmm5, %xmm6
+ vminmaxpd $123, -1024(%edx){1to2}, %xmm5, %xmm6{%k7}{z}
+ vminmaxph $123, {sae}, %ymm4, %ymm5, %ymm6
+ vminmaxph $123, (%ecx){1to16}, %ymm5, %ymm6
+ vminmaxph $123, -256(%edx){1to16}, %ymm5, %ymm6{%k7}{z}
+ vminmaxph $123, (%ecx){1to8}, %xmm5, %xmm6
+ vminmaxph $123, -256(%edx){1to8}, %xmm5, %xmm6{%k7}{z}
+ vminmaxps $123, {sae}, %ymm4, %ymm5, %ymm6
+ vminmaxps $123, (%ecx){1to8}, %ymm5, %ymm6
+ vminmaxps $123, -512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+ vminmaxps $123, (%ecx){1to4}, %xmm5, %xmm6
+ vminmaxps $123, -512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+
+ .irp m, d, h, s
+ vminmaxs\m $123, %xmm4, %xmm5, %xmm6
+ vminmaxs\m $123, {sae}, %xmm4, %xmm5, %xmm6
+ vminmaxs\m $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+ vminmaxs\m $123, (%ecx), %xmm5, %xmm6
+ .endr
+
+ vminmaxsd $123, 1016(%ecx), %xmm5, %xmm6
+ vminmaxsd $123, -1024(%edx), %xmm5, %xmm6{%k7}{z}
+ vminmaxsh $123, 254(%ecx), %xmm5, %xmm6
+ vminmaxsh $123, -256(%edx), %xmm5, %xmm6{%k7}{z}
+ vminmaxss $123, 508(%ecx), %xmm5, %xmm6
+ vminmaxss $123, -512(%edx), %xmm5, %xmm6{%k7}{z}
+
+ vmovd %xmm5, %xmm6
+ vmovd.s %xmm5, %xmm6
+ vmovw %xmm5, %xmm6
+ vmovw.s %xmm5, %xmm6
+
+ .irp u, "", u
+ .irp m, d, h, s
+ v\u\()comxs\m %xmm5, %xmm6
+ v\u\()comxs\m {sae}, %xmm5, %xmm6
+ v\u\()comxs\m 0x10000000(%esp, %esi, 8), %xmm6
+ v\u\()comxs\m (%ecx), %xmm6
+ .endr
+
+ v\u\()comxsd 1016(%ecx), %xmm6
+ v\u\()comxsd -1024(%edx), %xmm6
+ v\u\()comxsh 254(%ecx), %xmm6
+ v\u\()comxsh -256(%edx), %xmm6
+ v\u\()comxss 508(%ecx), %xmm6
+ v\u\()comxss -512(%edx), %xmm6
+ .endr
+
+_intel:
+ .intel_syntax noprefix
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m xmm6, xmm5, xmm4, 123
+ vminmax\m ymm6, ymm5, ymm4, 123
+ vminmax\m ymm6{k7}, ymm5, [esp+esi*8+0x10000000], 123
+ vminmax\m ymm6, ymm5, YMMWORD PTR [ecx+4064], 123
+ vminmax\m xmm6{k7}, xmm5, [esp+esi*8+0x10000000], 123
+ vminmax\m xmm6, xmm5, XMMWORD PTR [ecx+2032], 123
+ .endr
+
+ vminmaxpbf16 ymm6, ymm5, [ecx]{1to16}, 123
+ vminmaxpbf16 ymm6{k7}{z}, ymm5, WORD PTR [edx-256]{1to16}, 123
+ vminmaxpbf16 xmm6, xmm5, [ecx]{1to8}, 123
+ vminmaxpbf16 xmm6{k7}{z}, xmm5, WORD PTR [edx-256]{1to8}, 123
+ vminmaxpd ymm6, ymm5, ymm4, {sae}, 123
+ vminmaxpd ymm6, ymm5, QWORD PTR [ecx]{1to4}, 123
+ vminmaxpd ymm6{k7}{z}, ymm5, [edx-1024]{1to4}, 123
+ vminmaxpd xmm6, xmm5, QWORD PTR [ecx]{1to2}, 123
+ vminmaxpd xmm6{k7}{z}, xmm5, [edx-1024]{1to2}, 123
+ vminmaxph ymm6, ymm5, ymm4, {sae}, 123
+ vminmaxph ymm6, ymm5, [ecx]{1to16}, 123
+ vminmaxph ymm6{k7}{z}, ymm5, WORD PTR [edx-256]{1to16}, 123
+ vminmaxph xmm6, xmm5, WORD PTR [ecx]{1to8}, 123
+ vminmaxph xmm6{k7}{z}, xmm5, [edx-256]{1to8}, 123
+ vminmaxps ymm6, ymm5, ymm4, {sae}, 123
+ vminmaxps ymm6, ymm5, DWORD PTR [ecx]{1to8}, 123
+ vminmaxps ymm6{k7}{z}, ymm5, [edx-512]{1to8}, 123
+ vminmaxps xmm6, xmm5, [ecx]{1to4}, 123
+ vminmaxps xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}, 123
+
+ .irp m, d, h, s
+ vminmaxs\m xmm6, xmm5, xmm4, 123
+ vminmaxs\m xmm6, xmm5, xmm4, {sae}, 123
+ vminmaxs\m xmm6{k7}, xmm5, [esp+esi*8+0x10000000], 123
+ vminmaxs\m xmm6, xmm5, [ecx], 123
+ .endr
+
+ vminmaxsd xmm6, xmm5, [ecx+1016], 123
+ vminmaxsd xmm6{k7}{z}, xmm5, QWORD PTR [edx-1024], 123
+ vminmaxsh xmm6, xmm5, [ecx+254], 123
+ vminmaxsh xmm6{k7}{z}, xmm5, WORD PTR [edx-256], 123
+ vminmaxss xmm6, xmm5, DWORD PTR [ecx+508], 123
+ vminmaxss xmm6{k7}{z}, xmm5, [edx-512], 123
+
+ vmovd xmm6, xmm5
+ vmovd.s xmm6, xmm5
+ vmovw xmm6, xmm5
+ vmovw.s xmm6, xmm5
+
+ .irp u, "", u
+ .irp m, d, h, s
+ v\u\()comxs\m xmm6, xmm5
+ v\u\()comxs\m xmm6, xmm5, {sae}
+ v\u\()comxs\m xmm6, [esp+esi*8+0x10000000]
+ v\u\()comxs\m xmm6, [ecx]
+ .endr
+
+ v\u\()comxsd xmm6, [ecx+1016]
+ v\u\()comxsd xmm6, QWORD PTR [edx-1024]
+ v\u\()comxsh xmm6, [ecx+254]
+ v\u\()comxsh xmm6, WORD PTR [edx-256]
+ v\u\()comxss xmm6, DWORD PTR [ecx+508]
+ v\u\()comxss xmm6, [edx-512]
+ .endr
diff --git a/gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d b/gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d
new file mode 100644
index 00000000000..862a397d24c
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d
@@ -0,0 +1,34 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/512 minmax insns (Intel disassembly)
+#source: avx10_2-512-miscs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f3 57 48 52 f4 7b\s+vminmaxpbf16 zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 57 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16 zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 48 52 71 7f 7b\s+vminmaxpbf16 zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 48 52 f4 7b\s+vminmaxpd zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 48 52 71 7f 7b\s+vminmaxpd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 48 52 f4 7b\s+vminmaxph zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 54 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxph zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 48 52 71 7f 7b\s+vminmaxph zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 48 52 f4 7b\s+vminmaxps zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 55 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxps zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 48 52 71 7f 7b\s+vminmaxps zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 58 52 31 7b\s+vminmaxpbf16 zmm6,zmm5,WORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 57 df 52 72 80 7b\s+vminmaxpbf16 zmm6\{k7\}\{z\},zmm5,WORD BCST \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 18 52 f4 7b\s+vminmaxpd zmm6,zmm5,zmm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 58 52 31 7b\s+vminmaxpd zmm6,zmm5,QWORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 d5 df 52 72 80 7b\s+vminmaxpd zmm6\{k7\}\{z\},zmm5,QWORD BCST \[edx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 18 52 f4 7b\s+vminmaxph zmm6,zmm5,zmm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 54 58 52 31 7b\s+vminmaxph zmm6,zmm5,WORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 54 df 52 72 80 7b\s+vminmaxph zmm6\{k7\}\{z\},zmm5,WORD BCST \[edx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 18 52 f4 7b\s+vminmaxps zmm6,zmm5,zmm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 55 58 52 31 7b\s+vminmaxps zmm6,zmm5,DWORD BCST \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 55 df 52 72 80 7b\s+vminmaxps zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-miscs.d b/gas/testsuite/gas/i386/avx10_2-512-miscs.d
new file mode 100644
index 00000000000..4eb49ca2e09
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-miscs.d
@@ -0,0 +1,32 @@
+#objdump: -dw
+#name: i386 AVX10.2/512 minmax insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f3 57 48 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 57 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 57 48 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 d5 48 52 f4 7b\s+vminmaxpd\s\$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 d5 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d5 48 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 54 48 52 f4 7b\s+vminmaxph\s\$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 54 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 54 48 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 55 48 52 f4 7b\s+vminmaxps\s\$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 55 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 55 48 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 57 58 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%ecx\)\{1to32\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 57 df 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%edx\)\{1to32\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d5 18 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 d5 58 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to8\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 d5 df 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to8\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 54 18 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 54 58 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to32\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 54 df 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to32\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 55 18 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 55 58 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 55 df 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-miscs.s b/gas/testsuite/gas/i386/avx10_2-512-miscs.s
new file mode 100644
index 00000000000..20a5614d49a
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-miscs.s
@@ -0,0 +1,43 @@
+# Check 32bit AVX10.2/512 instructions
+
+ .arch generic32
+ .arch .avx10.2/512
+ .text
+_start:
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m $123, %zmm4, %zmm5, %zmm6
+ vminmax\m $123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+ vminmax\m $123, 8128(%ecx), %zmm5, %zmm6
+ .endr
+
+ vminmaxpbf16 $123, (%ecx){1to32}, %zmm5, %zmm6
+ vminmaxpbf16 $123, -256(%edx){1to32}, %zmm5, %zmm6{%k7}{z}
+ vminmaxpd $123, {sae}, %zmm4, %zmm5, %zmm6
+ vminmaxpd $123, (%ecx){1to8}, %zmm5, %zmm6
+ vminmaxpd $123, -1024(%edx){1to8}, %zmm5, %zmm6{%k7}{z}
+ vminmaxph $123, {sae}, %zmm4, %zmm5, %zmm6
+ vminmaxph $123, (%ecx){1to32}, %zmm5, %zmm6
+ vminmaxph $123, -256(%edx){1to32}, %zmm5, %zmm6{%k7}{z}
+ vminmaxps $123, {sae}, %zmm4, %zmm5, %zmm6
+ vminmaxps $123, (%ecx){1to16}, %zmm5, %zmm6
+ vminmaxps $123, -512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+
+_intel:
+ .intel_syntax noprefix
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m zmm6, zmm5, zmm4, 123
+ vminmax\m zmm6{k7}, zmm5, [esp+esi*8+0x10000000], 123
+ vminmax\m zmm6, zmm5, ZMMWORD PTR [ecx+8128], 123
+ .endr
+
+ vminmaxpbf16 zmm6, zmm5, [ecx]{1to32}, 123
+ vminmaxpbf16 zmm6{k7}{z}, zmm5, WORD PTR [edx-256]{1to32}, 123
+ vminmaxpd zmm6, zmm5, zmm4, {sae}, 123
+ vminmaxpd zmm6, zmm5, QWORD PTR [ecx]{1to8}, 123
+ vminmaxpd zmm6{k7}{z}, zmm5, [edx-1024]{1to8}, 123
+ vminmaxph zmm6, zmm5, zmm4, {sae}, 123
+ vminmaxph zmm6, zmm5, WORD PTR [ecx]{1to32}, 123
+ vminmaxph zmm6{k7}{z}, zmm5, [edx-256]{1to32}, 123
+ vminmaxps zmm6, zmm5, zmm4, {sae}, 123
+ vminmaxps zmm6, zmm5, [ecx]{1to16}, 123
+ vminmaxps zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}, 123
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 75a2aa5337d..9a310375123 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -532,6 +532,10 @@ if [gas_32_check] then {
run_dump_test "avx10_2-512-satcvt-intel"
run_dump_test "avx10_2-256-satcvt"
run_dump_test "avx10_2-256-satcvt-intel"
+ run_dump_test "avx10_2-512-miscs"
+ run_dump_test "avx10_2-512-miscs-intel"
+ run_dump_test "avx10_2-256-miscs"
+ run_dump_test "avx10_2-256-miscs-intel"
run_dump_test "avx10_2-256-sm4"
run_dump_test "avx10_2-256-sm4-intel"
run_dump_test "avx10_2-512-sm4"
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d
new file mode 100644
index 00000000000..f16a08b7db9
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d
@@ -0,0 +1,112 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/256 minmax, vector copy and compare insns (Intel disassembly)
+#source: x86-64-avx10_2-256-miscs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 03 17 00 52 f4 7b\s+vminmaxpbf16 xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 17 20 52 f4 7b\s+vminmaxpbf16 ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 17 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16 ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 17 20 52 71 7f 7b\s+vminmaxpbf16 ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 23 17 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16 xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 17 00 52 71 7f 7b\s+vminmaxpbf16 xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 03 95 00 52 f4 7b\s+vminmaxpd xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 95 20 52 f4 7b\s+vminmaxpd ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 95 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 20 52 71 7f 7b\s+vminmaxpd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 23 95 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 00 52 71 7f 7b\s+vminmaxpd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 03 14 00 52 f4 7b\s+vminmaxph xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 14 20 52 f4 7b\s+vminmaxph ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 14 27 52 b4 f5 00 00 00 10 7b\s+vminmaxph ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 20 52 71 7f 7b\s+vminmaxph ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 23 14 07 52 b4 f5 00 00 00 10 7b\s+vminmaxph xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 00 52 71 7f 7b\s+vminmaxph xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 03 15 00 52 f4 7b\s+vminmaxps xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 15 20 52 f4 7b\s+vminmaxps ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 15 27 52 b4 f5 00 00 00 10 7b\s+vminmaxps ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 20 52 71 7f 7b\s+vminmaxps ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 23 15 07 52 b4 f5 00 00 00 10 7b\s+vminmaxps xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 00 52 71 7f 7b\s+vminmaxps xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 43 17 30 52 31 7b\s+vminmaxpbf16 ymm30,ymm29,WORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 17 b7 52 72 80 7b\s+vminmaxpbf16 ymm30\{k7\}\{z\},ymm29,WORD BCST \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 43 17 10 52 31 7b\s+vminmaxpbf16 xmm30,xmm29,WORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 17 97 52 72 80 7b\s+vminmaxpbf16 xmm30\{k7\}\{z\},xmm29,WORD BCST \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 03 91 10 52 f4 7b\s+vminmaxpd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 43 95 30 52 31 7b\s+vminmaxpd ymm30,ymm29,QWORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 b7 52 72 80 7b\s+vminmaxpd ymm30\{k7\}\{z\},ymm29,QWORD BCST \[rdx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 43 95 10 52 31 7b\s+vminmaxpd xmm30,xmm29,QWORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 97 52 72 80 7b\s+vminmaxpd xmm30\{k7\}\{z\},xmm29,QWORD BCST \[rdx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 03 10 10 52 f4 7b\s+vminmaxph ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 43 14 30 52 31 7b\s+vminmaxph ymm30,ymm29,WORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 b7 52 72 80 7b\s+vminmaxph ymm30\{k7\}\{z\},ymm29,WORD BCST \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 43 14 10 52 31 7b\s+vminmaxph xmm30,xmm29,WORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 97 52 72 80 7b\s+vminmaxph xmm30\{k7\}\{z\},xmm29,WORD BCST \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 52 f4 7b\s+vminmaxps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 43 15 30 52 31 7b\s+vminmaxps ymm30,ymm29,DWORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 b7 52 72 80 7b\s+vminmaxps ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\],0x7b
+\s*[a-f0-9]+:\s*62 43 15 10 52 31 7b\s+vminmaxps xmm30,xmm29,DWORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 97 52 72 80 7b\s+vminmaxps xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\],0x7b
+\s*[a-f0-9]+:\s*62 03 95 00 53 f4 7b\s+vminmaxsd xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 95 10 53 f4 7b\s+vminmaxsd xmm30,xmm29,xmm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 23 95 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsd xmm30\{k7\},xmm29,QWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 95 00 53 31 7b\s+vminmaxsd xmm30,xmm29,QWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 03 14 00 53 f4 7b\s+vminmaxsh xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 14 10 53 f4 7b\s+vminmaxsh xmm30,xmm29,xmm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 23 14 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsh xmm30\{k7\},xmm29,WORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 14 00 53 31 7b\s+vminmaxsh xmm30,xmm29,WORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 03 15 00 53 f4 7b\s+vminmaxss xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 15 10 53 f4 7b\s+vminmaxss xmm30,xmm29,xmm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 23 15 07 53 b4 f5 00 00 00 10 7b\s+vminmaxss xmm30\{k7\},xmm29,DWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 15 00 53 31 7b\s+vminmaxss xmm30,xmm29,DWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 00 53 71 7f 7b\s+vminmaxsd xmm30,xmm29,QWORD PTR \[rcx\+0x3f8\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 87 53 72 80 7b\s+vminmaxsd xmm30\{k7\}\{z\},xmm29,QWORD PTR \[rdx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 00 53 71 7f 7b\s+vminmaxsh xmm30,xmm29,WORD PTR \[rcx\+0xfe\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 87 53 72 80 7b\s+vminmaxsh xmm30\{k7\}\{z\},xmm29,WORD PTR \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 00 53 71 7f 7b\s+vminmaxss xmm30,xmm29,DWORD PTR \[rcx\+0x1fc\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 87 53 72 80 7b\s+vminmaxss xmm30\{k7\}\{z\},xmm29,DWORD PTR \[rdx-0x200\],0x7b
+\s*[a-f0-9]+:\s*62 01 7e 08 7e f5\s+vmovd xmm30,xmm29
+\s*[a-f0-9]+:\s*62 01 7d 08 d6 ee\s+vmovd xmm30,xmm29
+\s*[a-f0-9]+:\s*62 05 7e 08 6e f5\s+vmovw xmm30,xmm29
+\s*[a-f0-9]+:\s*62 05 7e 08 7e ee\s+vmovw xmm30,xmm29
+\s*[a-f0-9]+:\s*62 01 ff 08 2f f5\s+vcomxsd xmm30,xmm29
+\s*[a-f0-9]+:\s*62 01 ff 18 2f f5\s+vcomxsd xmm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 21 ff 08 2f b4 f5 00 00 00 10\s+vcomxsd xmm30,QWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 41 ff 08 2f 31\s+vcomxsd xmm30,QWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*62 05 7e 08 2f f5\s+vcomxsh xmm30,xmm29
+\s*[a-f0-9]+:\s*62 05 7e 18 2f f5\s+vcomxsh xmm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 25 7e 08 2f b4 f5 00 00 00 10\s+vcomxsh xmm30,WORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 45 7e 08 2f 31\s+vcomxsh xmm30,WORD PTR \[r9\]
+\s*[a-f0-9]+:\s*62 01 7e 08 2f f5\s+vcomxss xmm30,xmm29
+\s*[a-f0-9]+:\s*62 01 7e 18 2f f5\s+vcomxss xmm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 21 7e 08 2f b4 f5 00 00 00 10\s+vcomxss xmm30,DWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 41 7e 08 2f 31\s+vcomxss xmm30,DWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*62 61 ff 08 2f 71 7f\s+vcomxsd xmm30,QWORD PTR \[rcx\+0x3f8\]
+\s*[a-f0-9]+:\s*62 61 ff 08 2f 72 80\s+vcomxsd xmm30,QWORD PTR \[rdx-0x400\]
+\s*[a-f0-9]+:\s*62 65 7e 08 2f 71 7f\s+vcomxsh xmm30,WORD PTR \[rcx\+0xfe\]
+\s*[a-f0-9]+:\s*62 65 7e 08 2f 72 80\s+vcomxsh xmm30,WORD PTR \[rdx-0x100\]
+\s*[a-f0-9]+:\s*62 61 7e 08 2f 71 7f\s+vcomxss xmm30,DWORD PTR \[rcx\+0x1fc\]
+\s*[a-f0-9]+:\s*62 61 7e 08 2f 72 80\s+vcomxss xmm30,DWORD PTR \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 01 ff 08 2e f5\s+vucomxsd xmm30,xmm29
+\s*[a-f0-9]+:\s*62 01 ff 18 2e f5\s+vucomxsd xmm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 21 ff 08 2e b4 f5 00 00 00 10\s+vucomxsd xmm30,QWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 41 ff 08 2e 31\s+vucomxsd xmm30,QWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*62 05 7e 08 2e f5\s+vucomxsh xmm30,xmm29
+\s*[a-f0-9]+:\s*62 05 7e 18 2e f5\s+vucomxsh xmm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 25 7e 08 2e b4 f5 00 00 00 10\s+vucomxsh xmm30,WORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 45 7e 08 2e 31\s+vucomxsh xmm30,WORD PTR \[r9\]
+\s*[a-f0-9]+:\s*62 01 7e 08 2e f5\s+vucomxss xmm30,xmm29
+\s*[a-f0-9]+:\s*62 01 7e 18 2e f5\s+vucomxss xmm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 21 7e 08 2e b4 f5 00 00 00 10\s+vucomxss xmm30,DWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 41 7e 08 2e 31\s+vucomxss xmm30,DWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*62 61 ff 08 2e 71 7f\s+vucomxsd xmm30,QWORD PTR \[rcx\+0x3f8\]
+\s*[a-f0-9]+:\s*62 61 ff 08 2e 72 80\s+vucomxsd xmm30,QWORD PTR \[rdx-0x400\]
+\s*[a-f0-9]+:\s*62 65 7e 08 2e 71 7f\s+vucomxsh xmm30,WORD PTR \[rcx\+0xfe\]
+\s*[a-f0-9]+:\s*62 65 7e 08 2e 72 80\s+vucomxsh xmm30,WORD PTR \[rdx-0x100\]
+\s*[a-f0-9]+:\s*62 61 7e 08 2e 71 7f\s+vucomxss xmm30,DWORD PTR \[rcx\+0x1fc\]
+\s*[a-f0-9]+:\s*62 61 7e 08 2e 72 80\s+vucomxss xmm30,DWORD PTR \[rdx-0x200\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d
new file mode 100644
index 00000000000..12ef7fba076
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d
@@ -0,0 +1,110 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/256 minmax, vector copy and compare insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 03 17 00 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 17 20 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 17 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 17 20 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 17 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 17 00 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 95 00 52 f4 7b\s+vminmaxpd\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 95 20 52 f4 7b\s+vminmaxpd\s\$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 95 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 95 20 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 95 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 95 00 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 14 00 52 f4 7b\s+vminmaxph\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 14 20 52 f4 7b\s+vminmaxph\s\$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 14 27 52 b4 f5 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 14 20 52 71 7f 7b\s+vminmaxph\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 14 07 52 b4 f5 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 14 00 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 15 00 52 f4 7b\s+vminmaxps\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 15 20 52 f4 7b\s+vminmaxps\s\$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 15 27 52 b4 f5 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 15 20 52 71 7f 7b\s+vminmaxps\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 15 07 52 b4 f5 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 15 00 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 43 17 30 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%r9\)\{1to16\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 17 b7 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%rdx\)\{1to16\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 43 17 10 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%r9\)\{1to8\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 17 97 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%rdx\)\{1to8\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 91 10 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 43 95 30 52 31 7b\s+vminmaxpd\s\$0x7b,\(%r9\)\{1to4\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 95 b7 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%rdx\)\{1to4\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 43 95 10 52 31 7b\s+vminmaxpd\s\$0x7b,\(%r9\)\{1to2\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 95 97 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%rdx\)\{1to2\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 10 10 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 43 14 30 52 31 7b\s+vminmaxph\s\$0x7b,\(%r9\)\{1to16\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 14 b7 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%rdx\)\{1to16\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 43 14 10 52 31 7b\s+vminmaxph\s\$0x7b,\(%r9\)\{1to8\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 14 97 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%rdx\)\{1to8\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 11 10 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 43 15 30 52 31 7b\s+vminmaxps\s\$0x7b,\(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 15 b7 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 43 15 10 52 31 7b\s+vminmaxps\s\$0x7b,\(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 15 97 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 95 00 53 f4 7b\s+vminmaxsd\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 95 10 53 f4 7b\s+vminmaxsd\s\$0x7b,\{sae\},%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 23 95 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 95 00 53 31 7b\s+vminmaxsd\s\$0x7b,\(%r9\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 14 00 53 f4 7b\s+vminmaxsh\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 14 10 53 f4 7b\s+vminmaxsh\s\$0x7b,\{sae\},%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 23 14 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsh\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 14 00 53 31 7b\s+vminmaxsh\s\$0x7b,\(%r9\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 15 00 53 f4 7b\s+vminmaxss\s\$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 15 10 53 f4 7b\s+vminmaxss\s\$0x7b,\{sae\},%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 23 15 07 53 b4 f5 00 00 00 10 7b\s+vminmaxss\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 15 00 53 31 7b\s+vminmaxss\s\$0x7b,\(%r9\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 95 00 53 71 7f 7b\s+vminmaxsd\s\$0x7b,0x3f8\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 95 87 53 72 80 7b\s+vminmaxsd\s\$0x7b,-0x400\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 63 14 00 53 71 7f 7b\s+vminmaxsh\s\$0x7b,0xfe\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 14 87 53 72 80 7b\s+vminmaxsh\s\$0x7b,-0x100\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 63 15 00 53 71 7f 7b\s+vminmaxss\s\$0x7b,0x1fc\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 15 87 53 72 80 7b\s+vminmaxss\s\$0x7b,-0x200\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 7e 08 7e f5\s+vmovd %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 7d 08 d6 ee\s+vmovd %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 7e 08 6e f5\s+vmovw %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 7e 08 7e ee\s+vmovw %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 ff 08 2f f5\s+vcomxsd %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 ff 18 2f f5\s+vcomxsd \{sae\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 21 ff 08 2f b4 f5 00 00 00 10\s+vcomxsd 0x10000000\(%rbp,%r14,8\),%xmm30
+\s*[a-f0-9]+:\s*62 41 ff 08 2f 31\s+vcomxsd \(%r9\),%xmm30
+\s*[a-f0-9]+:\s*62 05 7e 08 2f f5\s+vcomxsh %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 7e 18 2f f5\s+vcomxsh \{sae\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 25 7e 08 2f b4 f5 00 00 00 10\s+vcomxsh 0x10000000\(%rbp,%r14,8\),%xmm30
+\s*[a-f0-9]+:\s*62 45 7e 08 2f 31\s+vcomxsh \(%r9\),%xmm30
+\s*[a-f0-9]+:\s*62 01 7e 08 2f f5\s+vcomxss %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 7e 18 2f f5\s+vcomxss \{sae\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 21 7e 08 2f b4 f5 00 00 00 10\s+vcomxss 0x10000000\(%rbp,%r14,8\),%xmm30
+\s*[a-f0-9]+:\s*62 41 7e 08 2f 31\s+vcomxss \(%r9\),%xmm30
+\s*[a-f0-9]+:\s*62 61 ff 08 2f 71 7f\s+vcomxsd 0x3f8\(%rcx\),%xmm30
+\s*[a-f0-9]+:\s*62 61 ff 08 2f 72 80\s+vcomxsd -0x400\(%rdx\),%xmm30
+\s*[a-f0-9]+:\s*62 65 7e 08 2f 71 7f\s+vcomxsh 0xfe\(%rcx\),%xmm30
+\s*[a-f0-9]+:\s*62 65 7e 08 2f 72 80\s+vcomxsh -0x100\(%rdx\),%xmm30
+\s*[a-f0-9]+:\s*62 61 7e 08 2f 71 7f\s+vcomxss 0x1fc\(%rcx\),%xmm30
+\s*[a-f0-9]+:\s*62 61 7e 08 2f 72 80\s+vcomxss -0x200\(%rdx\),%xmm30
+\s*[a-f0-9]+:\s*62 01 ff 08 2e f5\s+vucomxsd %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 ff 18 2e f5\s+vucomxsd \{sae\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 21 ff 08 2e b4 f5 00 00 00 10\s+vucomxsd 0x10000000\(%rbp,%r14,8\),%xmm30
+\s*[a-f0-9]+:\s*62 41 ff 08 2e 31\s+vucomxsd \(%r9\),%xmm30
+\s*[a-f0-9]+:\s*62 05 7e 08 2e f5\s+vucomxsh %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 7e 18 2e f5\s+vucomxsh \{sae\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 25 7e 08 2e b4 f5 00 00 00 10\s+vucomxsh 0x10000000\(%rbp,%r14,8\),%xmm30
+\s*[a-f0-9]+:\s*62 45 7e 08 2e 31\s+vucomxsh \(%r9\),%xmm30
+\s*[a-f0-9]+:\s*62 01 7e 08 2e f5\s+vucomxss %xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 7e 18 2e f5\s+vucomxss \{sae\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 21 7e 08 2e b4 f5 00 00 00 10\s+vucomxss 0x10000000\(%rbp,%r14,8\),%xmm30
+\s*[a-f0-9]+:\s*62 41 7e 08 2e 31\s+vucomxss \(%r9\),%xmm30
+\s*[a-f0-9]+:\s*62 61 ff 08 2e 71 7f\s+vucomxsd 0x3f8\(%rcx\),%xmm30
+\s*[a-f0-9]+:\s*62 61 ff 08 2e 72 80\s+vucomxsd -0x400\(%rdx\),%xmm30
+\s*[a-f0-9]+:\s*62 65 7e 08 2e 71 7f\s+vucomxsh 0xfe\(%rcx\),%xmm30
+\s*[a-f0-9]+:\s*62 65 7e 08 2e 72 80\s+vucomxsh -0x100\(%rdx\),%xmm30
+\s*[a-f0-9]+:\s*62 61 7e 08 2e 71 7f\s+vucomxss 0x1fc\(%rcx\),%xmm30
+\s*[a-f0-9]+:\s*62 61 7e 08 2e 72 80\s+vucomxss -0x200\(%rdx\),%xmm30
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s
new file mode 100644
index 00000000000..d5f87f77f71
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s
@@ -0,0 +1,135 @@
+# Check 64bit AVX10.2/256 instructions
+
+ .arch generic64
+ .arch .avx10.2/256
+ .text
+_start:
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m $123, %xmm28, %xmm29, %xmm30
+ vminmax\m $123, %ymm28, %ymm29, %ymm30
+ vminmax\m $123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+ vminmax\m $123, 4064(%rcx), %ymm29, %ymm30
+ vminmax\m $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+ vminmax\m $123, 2032(%rcx), %xmm29, %xmm30
+ .endr
+
+ vminmaxpbf16 $123, (%r9){1to16}, %ymm29, %ymm30
+ vminmaxpbf16 $123, -256(%rdx){1to16}, %ymm29, %ymm30{%k7}{z}
+ vminmaxpbf16 $123, (%r9){1to8}, %xmm29, %xmm30
+ vminmaxpbf16 $123, -256(%rdx){1to8}, %xmm29, %xmm30{%k7}{z}
+ vminmaxpd $123, {sae}, %ymm28, %ymm29, %ymm30
+ vminmaxpd $123, (%r9){1to4}, %ymm29, %ymm30
+ vminmaxpd $123, -1024(%rdx){1to4}, %ymm29, %ymm30{%k7}{z}
+ vminmaxpd $123, (%r9){1to2}, %xmm29, %xmm30
+ vminmaxpd $123, -1024(%rdx){1to2}, %xmm29, %xmm30{%k7}{z}
+ vminmaxph $123, {sae}, %ymm28, %ymm29, %ymm30
+ vminmaxph $123, (%r9){1to16}, %ymm29, %ymm30
+ vminmaxph $123, -256(%rdx){1to16}, %ymm29, %ymm30{%k7}{z}
+ vminmaxph $123, (%r9){1to8}, %xmm29, %xmm30
+ vminmaxph $123, -256(%rdx){1to8}, %xmm29, %xmm30{%k7}{z}
+ vminmaxps $123, {sae}, %ymm28, %ymm29, %ymm30
+ vminmaxps $123, (%r9){1to8}, %ymm29, %ymm30
+ vminmaxps $123, -512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+ vminmaxps $123, (%r9){1to4}, %xmm29, %xmm30
+ vminmaxps $123, -512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+
+ .irp m, d, h, s
+ vminmaxs\m $123, %xmm28, %xmm29, %xmm30
+ vminmaxs\m $123, {sae}, %xmm28, %xmm29, %xmm30
+ vminmaxs\m $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+ vminmaxs\m $123, (%r9), %xmm29, %xmm30
+ .endr
+
+ vminmaxsd $123, 1016(%rcx), %xmm29, %xmm30
+ vminmaxsd $123, -1024(%rdx), %xmm29, %xmm30{%k7}{z}
+ vminmaxsh $123, 254(%rcx), %xmm29, %xmm30
+ vminmaxsh $123, -256(%rdx), %xmm29, %xmm30{%k7}{z}
+ vminmaxss $123, 508(%rcx), %xmm29, %xmm30
+ vminmaxss $123, -512(%rdx), %xmm29, %xmm30{%k7}{z}
+
+ vmovd %xmm29, %xmm30
+ vmovd.s %xmm29, %xmm30
+ vmovw %xmm29, %xmm30
+ vmovw.s %xmm29, %xmm30
+
+ .irp u, "", u
+ .irp m, d, h, s
+ v\u\()comxs\m %xmm29, %xmm30
+ v\u\()comxs\m {sae}, %xmm29, %xmm30
+ v\u\()comxs\m 0x10000000(%rbp, %r14, 8), %xmm30
+ v\u\()comxs\m (%r9), %xmm30
+ .endr
+
+ v\u\()comxsd 1016(%rcx), %xmm30
+ v\u\()comxsd -1024(%rdx), %xmm30
+ v\u\()comxsh 254(%rcx), %xmm30
+ v\u\()comxsh -256(%rdx), %xmm30
+ v\u\()comxss 508(%rcx), %xmm30
+ v\u\()comxss -512(%rdx), %xmm30
+ .endr
+
+_intel:
+ .intel_syntax noprefix
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m xmm30, xmm29, xmm28, 123
+ vminmax\m ymm30, ymm29, ymm28, 123
+ vminmax\m ymm30{k7}, ymm29, [rbp+r14*8+0x10000000], 123
+ vminmax\m ymm30, ymm29, YMMWORD PTR [rcx+4064], 123
+ vminmax\m xmm30{k7}, xmm29, [rbp+r14*8+0x10000000], 123
+ vminmax\m xmm30, xmm29, XMMWORD PTR [rcx+2032], 123
+ .endr
+
+ vminmaxpbf16 ymm30, ymm29, [r9]{1to16}, 123
+ vminmaxpbf16 ymm30{k7}{z}, ymm29, WORD PTR [rdx-256]{1to16}, 123
+ vminmaxpbf16 xmm30, xmm29, [r9]{1to8}, 123
+ vminmaxpbf16 xmm30{k7}{z}, xmm29, WORD PTR [rdx-256]{1to8}, 123
+ vminmaxpd ymm30, ymm29, ymm28, {sae}, 123
+ vminmaxpd ymm30, ymm29, QWORD PTR [r9]{1to4}, 123
+ vminmaxpd ymm30{k7}{z}, ymm29, [rdx-1024]{1to4}, 123
+ vminmaxpd xmm30, xmm29, QWORD PTR [r9]{1to2}, 123
+ vminmaxpd xmm30{k7}{z}, xmm29, [rdx-1024]{1to2}, 123
+ vminmaxph ymm30, ymm29, ymm28, {sae}, 123
+ vminmaxph ymm30, ymm29, [r9]{1to16}, 123
+ vminmaxph ymm30{k7}{z}, ymm29, WORD PTR [rdx-256]{1to16}, 123
+ vminmaxph xmm30, xmm29, WORD PTR [r9]{1to8}, 123
+ vminmaxph xmm30{k7}{z}, xmm29, [rdx-256]{1to8}, 123
+ vminmaxps ymm30, ymm29, ymm28, {sae}, 123
+ vminmaxps ymm30, ymm29, DWORD PTR [r9]{1to8}, 123
+ vminmaxps ymm30{k7}{z}, ymm29, [rdx-512]{1to8}, 123
+ vminmaxps xmm30, xmm29, [r9]{1to4}, 123
+ vminmaxps xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}, 123
+
+ .irp m, d, h, s
+ vminmaxs\m xmm30, xmm29, xmm28, 123
+ vminmaxs\m xmm30, xmm29, xmm28, {sae}, 123
+ vminmaxs\m xmm30{k7}, xmm29, [rbp+r14*8+0x10000000], 123
+ vminmaxs\m xmm30, xmm29, [r9], 123
+ .endr
+
+ vminmaxsd xmm30, xmm29, QWORD PTR [rcx+1016], 123
+ vminmaxsd xmm30{k7}{z}, xmm29, QWORD PTR [rdx-1024], 123
+ vminmaxsh xmm30, xmm29, [rcx+254], 123
+ vminmaxsh xmm30{k7}{z}, xmm29, [rdx-256], 123
+ vminmaxss xmm30, xmm29, DWORD PTR [rcx+508], 123
+ vminmaxss xmm30{k7}{z}, xmm29, [rdx-512], 123
+
+ vmovd xmm30, xmm29
+ vmovd.s xmm30, xmm29
+ vmovw xmm30, xmm29
+ vmovw.s xmm30, xmm29
+
+ .irp u, "", u
+ .irp m, d, h, s
+ v\u\()comxs\m xmm30, xmm29
+ v\u\()comxs\m xmm30, xmm29, {sae}
+ v\u\()comxs\m xmm30, [rbp+r14*8+0x10000000]
+ v\u\()comxs\m xmm30, [r9]
+ .endr
+
+ v\u\()comxsd xmm30, QWORD PTR [rcx+1016]
+ v\u\()comxsd xmm30, [rdx-1024]
+ v\u\()comxsh xmm30, [rcx+254]
+ v\u\()comxsh xmm30, WORD PTR [rdx-256]
+ v\u\()comxss xmm30, [rcx+508]
+ v\u\()comxss xmm30, DWORD PTR [rdx-512]
+ .endr
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d
new file mode 100644
index 00000000000..64bcf19896c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d
@@ -0,0 +1,34 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/512 minmax insns (Intel disassembly)
+#source: x86-64-avx10_2-512-miscs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 03 17 40 52 f4 7b\s+vminmaxpbf16 zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 17 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16 zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 17 40 52 71 7f 7b\s+vminmaxpbf16 zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 03 95 40 52 f4 7b\s+vminmaxpd zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 95 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 40 52 71 7f 7b\s+vminmaxpd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 03 14 40 52 f4 7b\s+vminmaxph zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 14 47 52 b4 f5 00 00 00 10 7b\s+vminmaxph zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 40 52 71 7f 7b\s+vminmaxph zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 03 15 40 52 f4 7b\s+vminmaxps zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 15 47 52 b4 f5 00 00 00 10 7b\s+vminmaxps zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 40 52 71 7f 7b\s+vminmaxps zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 43 17 50 52 31 7b\s+vminmaxpbf16 zmm30,zmm29,WORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 17 d7 52 72 80 7b\s+vminmaxpbf16 zmm30\{k7\}\{z\},zmm29,WORD BCST \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 03 95 10 52 f4 7b\s+vminmaxpd zmm30,zmm29,zmm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 43 95 50 52 31 7b\s+vminmaxpd zmm30,zmm29,QWORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 95 d7 52 72 80 7b\s+vminmaxpd zmm30\{k7\}\{z\},zmm29,QWORD BCST \[rdx-0x400\],0x7b
+\s*[a-f0-9]+:\s*62 03 14 10 52 f4 7b\s+vminmaxph zmm30,zmm29,zmm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 43 14 50 52 31 7b\s+vminmaxph zmm30,zmm29,WORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 14 d7 52 72 80 7b\s+vminmaxph zmm30\{k7\}\{z\},zmm29,WORD BCST \[rdx-0x100\],0x7b
+\s*[a-f0-9]+:\s*62 03 15 10 52 f4 7b\s+vminmaxps zmm30,zmm29,zmm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 43 15 50 52 31 7b\s+vminmaxps zmm30,zmm29,DWORD BCST \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 15 d7 52 72 80 7b\s+vminmaxps zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d
new file mode 100644
index 00000000000..9a6653e0f72
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d
@@ -0,0 +1,32 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/512 minmax insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 03 17 40 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 17 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 17 40 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 03 95 40 52 f4 7b\s+vminmaxpd\s\$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 95 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 95 40 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 03 14 40 52 f4 7b\s+vminmaxph\s\$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 14 47 52 b4 f5 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 14 40 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 03 15 40 52 f4 7b\s+vminmaxps\s\$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 15 47 52 b4 f5 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 63 15 40 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 43 17 50 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%r9\)\{1to32\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 17 d7 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%rdx\)\{1to32\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 95 10 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 43 95 50 52 31 7b\s+vminmaxpd\s\$0x7b,\(%r9\)\{1to8\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 95 d7 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%rdx\)\{1to8\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 14 10 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 43 14 50 52 31 7b\s+vminmaxph\s\$0x7b,\(%r9\)\{1to32\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 14 d7 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%rdx\)\{1to32\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 15 10 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 43 15 50 52 31 7b\s+vminmaxps\s\$0x7b,\(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 15 d7 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s
new file mode 100644
index 00000000000..9aa54cc5dcd
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s
@@ -0,0 +1,43 @@
+# Check 64bit AVX10.2/512 instructions
+
+ .arch generic64
+ .arch .avx10.2/512
+ .text
+_start:
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m $123, %zmm28, %zmm29, %zmm30
+ vminmax\m $123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+ vminmax\m $123, 8128(%rcx), %zmm29, %zmm30
+ .endr
+
+ vminmaxpbf16 $123, (%r9){1to32}, %zmm29, %zmm30
+ vminmaxpbf16 $123, -256(%rdx){1to32}, %zmm29, %zmm30{%k7}{z}
+ vminmaxpd $123, {sae}, %zmm28, %zmm29, %zmm30
+ vminmaxpd $123, (%r9){1to8}, %zmm29, %zmm30
+ vminmaxpd $123, -1024(%rdx){1to8}, %zmm29, %zmm30{%k7}{z}
+ vminmaxph $123, {sae}, %zmm28, %zmm29, %zmm30
+ vminmaxph $123, (%r9){1to32}, %zmm29, %zmm30
+ vminmaxph $123, -256(%rdx){1to32}, %zmm29, %zmm30{%k7}{z}
+ vminmaxps $123, {sae}, %zmm28, %zmm29, %zmm30
+ vminmaxps $123, (%r9){1to16}, %zmm29, %zmm30
+ vminmaxps $123, -512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+
+_intel:
+ .intel_syntax noprefix
+ .irp m, pbf16, pd, ph, ps
+ vminmax\m zmm30, zmm29, zmm28, 123
+ vminmax\m zmm30{k7}, zmm29, [rbp+r14*8+0x10000000], 123
+ vminmax\m zmm30, zmm29, ZMMWORD PTR [rcx+8128], 123
+ .endr
+
+ vminmaxpbf16 zmm30, zmm29, [r9]{1to32}, 123
+ vminmaxpbf16 zmm30{k7}{z}, zmm29, WORD PTR [rdx-256]{1to32}, 123
+ vminmaxpd zmm30, zmm29, zmm28, {sae}, 123
+ vminmaxpd zmm30, zmm29, QWORD PTR [r9]{1to8}, 123
+ vminmaxpd zmm30{k7}{z}, zmm29, [rdx-1024]{1to8}, 123
+ vminmaxph zmm30, zmm29, zmm28, {sae}, 123
+ vminmaxph zmm30, zmm29, WORD PTR [r9]{1to32}, 123
+ vminmaxph zmm30{k7}{z}, zmm29, [rdx-256]{1to32}, 123
+ vminmaxps zmm30, zmm29, zmm28, {sae}, 123
+ vminmaxps zmm30, zmm29, [r9]{1to16}, 123
+ vminmaxps zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}, 123
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 02a32dc4346..bdb066dd456 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -514,6 +514,10 @@ run_dump_test "x86-64-avx10_2-512-satcvt"
run_dump_test "x86-64-avx10_2-512-satcvt-intel"
run_dump_test "x86-64-avx10_2-256-satcvt"
run_dump_test "x86-64-avx10_2-256-satcvt-intel"
+run_dump_test "x86-64-avx10_2-512-miscs"
+run_dump_test "x86-64-avx10_2-512-miscs-intel"
+run_dump_test "x86-64-avx10_2-256-miscs"
+run_dump_test "x86-64-avx10_2-256-miscs-intel"
run_dump_test "x86-64-avx10_2-256-sm4"
run_dump_test "x86-64-avx10_2-256-sm4-intel"
run_dump_test "x86-64-avx10_2-512-sm4"
diff --git a/opcodes/i386-dis-evex-len.h b/opcodes/i386-dis-evex-len.h
index a02609c50f2..e931fdd655a 100644
--- a/opcodes/i386-dis-evex-len.h
+++ b/opcodes/i386-dis-evex-len.h
@@ -1,4 +1,14 @@
static const struct dis386 evex_len_table[][3] = {
+ /* EVEX_LEN_0F7E_P_1_W_0 */
+ {
+ { "vmovd", { XMScalar, EXd }, 0 },
+ },
+
+ /* EVEX_LEN_0FD6_P_2_W_0 */
+ {
+ { "vmovd", { EXdS, XMScalar }, 0 },
+ },
+
/* EVEX_LEN_0F3816 */
{
{ Bad_Opcode },
@@ -145,4 +155,14 @@ static const struct dis386 evex_len_table[][3] = {
{ VEX_W_TABLE (EVEX_W_0F3A43_L_n) },
{ VEX_W_TABLE (EVEX_W_0F3A43_L_n) },
},
+
+ /* EVEX_LEN_MAP5_6E */
+ {
+ { PREFIX_TABLE (PREFIX_EVEX_MAP5_6E_L_0) },
+ },
+
+ /* EVEX_LEN_MAP5_7E */
+ {
+ { PREFIX_TABLE (PREFIX_EVEX_MAP5_7E_L_0) },
+ },
};
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 171600190a6..16fb2698390 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -1,3 +1,17 @@
+ /* PREFIX_EVEX_0F2E */
+ {
+ { "%XEvucomis%XS", { XMScalar, EXd, EXxEVexS }, 0 },
+ { "vucomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 },
+ { "%XEvucomis%XD", { XMScalar, EXq, EXxEVexS }, 0 },
+ { "vucomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 },
+ },
+ /* PREFIX_EVEX_0F2F */
+ {
+ { "%XEvcomis%XS", { XMScalar, EXd, EXxEVexS }, 0 },
+ { "vcomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 },
+ { "%XEvcomis%XD", { XMScalar, EXq, EXxEVexS }, 0 },
+ { "vcomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 },
+ },
/* PREFIX_EVEX_0F5B */
{
{ VEX_W_TABLE (EVEX_W_0F5B_P_0) },
@@ -324,6 +338,19 @@
{ "%XEvmpsadbw", { XM, Vex, EXx, Ib }, 0 },
{ "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 },
},
+ /* PREFIX_EVEX_0F3A52 */
+ {
+ { "vminmaxp%XH", { XM, Vex, EXxh, EXxEVexS, Ib }, 0 },
+ { Bad_Opcode },
+ { "vminmaxp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 },
+ { "vminmaxp%XB", { XM, Vex, EXxh, Ib }, 0 },
+ },
+ /* PREFIX_EVEX_0F3A53 */
+ {
+ { "vminmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
+ { Bad_Opcode },
+ { "vminmaxs%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
+ },
/* PREFIX_EVEX_0F3A56 */
{
{ "vreducep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
@@ -441,12 +468,13 @@
},
/* PREFIX_EVEX_MAP5_2E */
{
- { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 },
+ { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 },
+ { "vucomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_2F */
{
- { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 },
- { Bad_Opcode },
+ { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 },
+ { "vcomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 },
{ "vcoms%XB", { XMScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_51 */
@@ -546,6 +574,12 @@
{ VEX_W_TABLE (EVEX_W_MAP5_6D_P_2) },
{ "vcvttsd2sis", { Gdq, EXq, EXxEVexS }, 0 },
},
+ /* PREFIX_EVEX_MAP5_6E_L_0 */
+ {
+ { Bad_Opcode },
+ { VEX_W_TABLE (EVEX_W_MAP5_6E_P_1) },
+ { "vmovwY", { XMScalar, Edw }, 0 },
+ },
/* PREFIX_EVEX_MAP5_74 */
{
{ "vcvtbiasp%XH2bf8s", { XMxmmq, Vex, EXxh }, 0 },
@@ -591,6 +625,12 @@
{ "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 },
{ "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
},
+ /* PREFIX_EVEX_MAP5_7E_L_0 */
+ {
+ { Bad_Opcode },
+ { VEX_W_TABLE (EVEX_W_MAP5_7E_P_1) },
+ { "vmovw", { Edw, XMScalar }, 0 },
+ },
/* PREFIX_EVEX_MAP6_13 */
{
{ "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 344eaf3d527..1bb716c0ba7 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -117,7 +117,7 @@
},
/* EVEX_W_0F7E_P_1 */
{
- { Bad_Opcode },
+ { EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_1_W_0) },
{ VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) },
},
/* EVEX_W_0F7F_P_1 */
@@ -151,7 +151,7 @@
},
/* EVEX_W_0FD6 */
{
- { Bad_Opcode },
+ { EVEX_LEN_TABLE (EVEX_LEN_0FD6_P_2_W_0) },
{ VEX_LEN_TABLE (VEX_LEN_0FD6) },
},
/* EVEX_W_0FE2 */
@@ -495,8 +495,16 @@
{ "vcvttps2qqs", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
{ "vcvttpd2qqs", { XM, EXx, EXxEVexS }, 0 },
},
+ /* EVEX_W_MAP5_6E_P_1 */
+ {
+ { "vmovw", { XMScalar, EXw }, 0 },
+ },
/* EVEX_W_MAP5_7A_P_3 */
{
{ "vcvtudq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
{ "vcvtuqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
},
+ /* EVEX_W_MAP5_7E_P_1 */
+ {
+ { "vmovw", { EXwS, XMScalar }, 0 },
+ },
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index f94c0d9d6ae..30312eb1a4e 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -53,8 +53,8 @@ static const struct dis386 evex_table[][256] = {
{ "%XEvmovntpX", { Mx, XM }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_VEX_0F2C) },
{ PREFIX_TABLE (PREFIX_VEX_0F2D) },
- { PREFIX_TABLE (PREFIX_0F2E) },
- { PREFIX_TABLE (PREFIX_0F2F) },
+ { PREFIX_TABLE (PREFIX_EVEX_0F2E) },
+ { PREFIX_TABLE (PREFIX_EVEX_0F2F) },
/* 30 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -676,8 +676,8 @@ static const struct dis386 evex_table[][256] = {
/* 50 */
{ "vrangep%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
{ "vranges%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
- { Bad_Opcode },
- { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_EVEX_0F3A52) },
+ { PREFIX_TABLE (PREFIX_EVEX_0F3A53) },
{ "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
{ "vfixupimms%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
{ PREFIX_TABLE (PREFIX_EVEX_0F3A56) },
@@ -1289,7 +1289,7 @@ static const struct dis386 evex_table[][256] = {
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_6B) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_6C) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_6D) },
- { "vmovwY", { XMScalar, Edw }, PREFIX_DATA },
+ { EVEX_LEN_TABLE (EVEX_LEN_MAP5_6E) },
{ Bad_Opcode },
/* 70 */
{ Bad_Opcode },
@@ -1307,7 +1307,7 @@ static const struct dis386 evex_table[][256] = {
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_7B) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_7C) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_7D) },
- { "vmovw", { Edw, XMScalar }, PREFIX_DATA },
+ { EVEX_LEN_TABLE (EVEX_LEN_MAP5_7E) },
{ Bad_Opcode },
/* 80 */
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index e8f5d8b293c..813295c8aad 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1155,6 +1155,8 @@ enum
PREFIX_VEX_MAP7_F6_L_0_W_0_R_0_X86_64,
PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64,
+ PREFIX_EVEX_0F2E,
+ PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F5B,
PREFIX_EVEX_0F6F,
PREFIX_EVEX_0F70,
@@ -1207,6 +1209,8 @@ enum
PREFIX_EVEX_0F3A26,
PREFIX_EVEX_0F3A27,
PREFIX_EVEX_0F3A42_W_0,
+ PREFIX_EVEX_0F3A52,
+ PREFIX_EVEX_0F3A53,
PREFIX_EVEX_0F3A56,
PREFIX_EVEX_0F3A57,
PREFIX_EVEX_0F3A66,
@@ -1245,6 +1249,7 @@ enum
PREFIX_EVEX_MAP5_6B,
PREFIX_EVEX_MAP5_6C,
PREFIX_EVEX_MAP5_6D,
+ PREFIX_EVEX_MAP5_6E_L_0,
PREFIX_EVEX_MAP5_74,
PREFIX_EVEX_MAP5_78,
PREFIX_EVEX_MAP5_79,
@@ -1252,6 +1257,7 @@ enum
PREFIX_EVEX_MAP5_7B,
PREFIX_EVEX_MAP5_7C,
PREFIX_EVEX_MAP5_7D,
+ PREFIX_EVEX_MAP5_7E_L_0,
PREFIX_EVEX_MAP6_13,
PREFIX_EVEX_MAP6_2C,
@@ -1521,7 +1527,9 @@ enum
enum
{
- EVEX_LEN_0F3816 = 0,
+ EVEX_LEN_0F7E_P_1_W_0 = 0,
+ EVEX_LEN_0FD6_P_2_W_0,
+ EVEX_LEN_0F3816,
EVEX_LEN_0F3819,
EVEX_LEN_0F381A,
EVEX_LEN_0F381B,
@@ -1541,7 +1549,10 @@ enum
EVEX_LEN_0F3A39,
EVEX_LEN_0F3A3A,
EVEX_LEN_0F3A3B,
- EVEX_LEN_0F3A43
+ EVEX_LEN_0F3A43,
+
+ EVEX_LEN_MAP5_6E,
+ EVEX_LEN_MAP5_7E,
};
enum
@@ -1779,7 +1790,9 @@ enum
EVEX_W_MAP5_6C_P_2,
EVEX_W_MAP5_6D_P_0,
EVEX_W_MAP5_6D_P_2,
+ EVEX_W_MAP5_6E_P_1,
EVEX_W_MAP5_7A_P_3,
+ EVEX_W_MAP5_7E_P_1,
};
typedef bool (*op_rtn) (instr_info *ins, int bytemode, int sizeflag);
@@ -3315,16 +3328,16 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_0F2E */
{
- { "%XEVucomisYX", { XMScalar, EXd, EXxEVexS }, 0 },
+ { "VucomisYX", { XMScalar, EXd, EXxEVexS }, 0 },
{ Bad_Opcode },
- { "%XEVucomisYX", { XMScalar, EXq, EXxEVexS }, 0 },
+ { "VucomisYX", { XMScalar, EXq, EXxEVexS }, 0 },
},
/* PREFIX_0F2F */
{
- { "%XEVcomisYX", { XMScalar, EXd, EXxEVexS }, 0 },
+ { "VcomisYX", { XMScalar, EXd, EXxEVexS }, 0 },
{ Bad_Opcode },
- { "%XEVcomisYX", { XMScalar, EXq, EXxEVexS }, 0 },
+ { "VcomisYX", { XMScalar, EXq, EXxEVexS }, 0 },
},
/* PREFIX_0F51 */
diff --git a/opcodes/i386-mnem.h b/opcodes/i386-mnem.h
index f0677d3e995..bffc8826656 100644
--- a/opcodes/i386-mnem.h
+++ b/opcodes/i386-mnem.h
@@ -133,2444 +133,2457 @@ extern const char i386_mnemonics[];
#define MN_vfpclasspbf16 0x4c1
#define MN_vgetmantpbf16 0x4cf
#define MN_vrsqrtpbf16 0x4dd
-#define MN_vmaxpbf16 0x4e9
-#define MN_vcomsbf16 0x4f3
-#define MN_addr16 0x4fd
-#define MN_vmovdqu16 0x504
-#define MN_xsha256 0x50e
-#define MN_encodekey256 0x516
-#define MN_vperm2f128 0x523
-#define MN_vextractf128 0x52e
-#define MN_vinsertf128 0x53b
-#define MN_vbroadcastf128 0x547
-#define MN_vperm2i128 0x556
-#define MN_vextracti128 0x561
-#define MN_vinserti128 0x56e
-#define MN_vbroadcasti128 0x57a
-#define MN_encodekey128 0x589
-#define MN_vcvtne2ph2bf8 0x596
-#define MN_vcvtneph2bf8 0x5a4
-#define MN_vcvtbiasph2bf8 0x5b1
-#define MN_vcvtne2ph2hf8 0x5c0
-#define MN_vcvtneph2hf8 0x5ce
-#define MN_vcvtbiasph2hf8 0x5db
-#define MN_vmovdqu8 0x5ea
-#define MN_vextractf32x8 0x5f3
-#define MN_vinsertf32x8 0x601
-#define MN_vbroadcastf32x8 0x60e
-#define MN_vextracti32x8 0x61e
-#define MN_vinserti32x8 0x62c
-#define MN_vbroadcasti32x8 0x639
-#define MN_ud2a 0x649
-#define MN_aaa 0x64e
-#define MN_daa 0x652
-#define MN_ssca 0x656
-#define MN_lea 0x65b
-#define MN_invlpga 0x65f
-#define MN_pusha 0x667
-#define MN_ja 0x66d
-#define MN_jna 0x670
-#define MN_ccmpna 0x674
-#define MN_setna 0x67b
-#define MN_ctestna 0x681
-#define MN_setzuna 0x689
+#define MN_vminmaxpbf16 0x4e9
+#define MN_vmaxpbf16 0x4f6
+#define MN_vcomsbf16 0x500
+#define MN_addr16 0x50a
+#define MN_vmovdqu16 0x511
+#define MN_xsha256 0x51b
+#define MN_encodekey256 0x523
+#define MN_vperm2f128 0x530
+#define MN_vextractf128 0x53b
+#define MN_vinsertf128 0x548
+#define MN_vbroadcastf128 0x554
+#define MN_vperm2i128 0x563
+#define MN_vextracti128 0x56e
+#define MN_vinserti128 0x57b
+#define MN_vbroadcasti128 0x587
+#define MN_encodekey128 0x596
+#define MN_vcvtne2ph2bf8 0x5a3
+#define MN_vcvtneph2bf8 0x5b1
+#define MN_vcvtbiasph2bf8 0x5be
+#define MN_vcvtne2ph2hf8 0x5cd
+#define MN_vcvtneph2hf8 0x5db
+#define MN_vcvtbiasph2hf8 0x5e8
+#define MN_vmovdqu8 0x5f7
+#define MN_vextractf32x8 0x600
+#define MN_vinsertf32x8 0x60e
+#define MN_vbroadcastf32x8 0x61b
+#define MN_vextracti32x8 0x62b
+#define MN_vinserti32x8 0x639
+#define MN_vbroadcasti32x8 0x646
+#define MN_ud2a 0x656
+#define MN_aaa 0x65b
+#define MN_daa 0x65f
+#define MN_ssca 0x663
+#define MN_lea 0x668
+#define MN_invlpga 0x66c
+#define MN_pusha 0x674
+#define MN_ja 0x67a
+#define MN_jna 0x67d
+#define MN_ccmpna 0x681
+#define MN_setna 0x688
+#define MN_ctestna 0x68e
+#define MN_setzuna 0x696
#define MN_cmovna (MN_fcmovna + 1)
#define MN_fcmovna (MN_cfcmovna + 1)
-#define MN_cfcmovna 0x691
-#define MN_ccmpa 0x69a
-#define MN_popa 0x6a0
+#define MN_cfcmovna 0x69e
+#define MN_ccmpa 0x6a7
+#define MN_popa 0x6ad
#define MN_movntdqa (MN_vmovntdqa + 1)
-#define MN_vmovntdqa 0x6a5
+#define MN_vmovntdqa 0x6b2
#define MN_movdqa (MN_vmovdqa + 1)
-#define MN_vmovdqa 0x6af
-#define MN_seta 0x6b7
-#define MN_prefetchnta 0x6bc
-#define MN_ctesta 0x6c8
-#define MN_setzua 0x6cf
+#define MN_vmovdqa 0x6bc
+#define MN_seta 0x6c4
+#define MN_prefetchnta 0x6c9
+#define MN_ctesta 0x6d5
+#define MN_setzua 0x6dc
#define MN_cmova (MN_fcmova + 1)
#define MN_fcmova (MN_cfcmova + 1)
-#define MN_cfcmova 0x6d6
-#define MN_rex_b 0x6de
-#define MN_ud2b 0x6e4
-#define MN_vpermi2b 0x6e9
-#define MN_vpmovm2b 0x6f2
-#define MN_vpermt2b 0x6fb
-#define MN_movdir64b 0x704
-#define MN_cmpxchg16b 0x70e
-#define MN_cmpxchg8b 0x719
-#define MN_vpshab 0x723
-#define MN_sbb 0x72a
+#define MN_cfcmova 0x6e3
+#define MN_rex_b 0x6eb
+#define MN_ud2b 0x6f1
+#define MN_vpermi2b 0x6f6
+#define MN_vpmovm2b 0x6ff
+#define MN_vpermt2b 0x708
+#define MN_movdir64b 0x711
+#define MN_cmpxchg16b 0x71b
+#define MN_cmpxchg8b 0x726
+#define MN_vpshab 0x730
+#define MN_sbb 0x737
#define MN_psubb (MN_vpsubb + 1)
-#define MN_vpsubb 0x72e
-#define MN_xcrypt_ecb 0x735
-#define MN_xcryptecb 0x740
-#define MN_llwpcb 0x74a
-#define MN_slwpcb 0x751
-#define MN_kaddb 0x758
+#define MN_vpsubb 0x73b
+#define MN_xcrypt_ecb 0x742
+#define MN_xcryptecb 0x74d
+#define MN_llwpcb 0x757
+#define MN_slwpcb 0x75e
+#define MN_kaddb 0x765
#define MN_paddb (MN_vpaddb + 1)
-#define MN_vpaddb 0x75e
-#define MN_kandb 0x765
-#define MN_vpexpandb 0x76b
-#define MN_vpmovusdb 0x775
-#define MN_vpmovsdb 0x77f
-#define MN_vpmovdb 0x788
-#define MN_vpcomgeb 0x790
-#define MN_vpcomleb 0x799
-#define MN_vpcmpnleb 0x7a2
-#define MN_vpcmpleb 0x7ac
-#define MN_vpcomfalseb 0x7b5
-#define MN_vpcomtrueb 0x7c1
-#define MN_xcrypt_cfb 0x7cc
-#define MN_xcryptcfb 0x7d7
-#define MN_xcrypt_ofb 0x7e1
-#define MN_xcryptofb 0x7ec
+#define MN_vpaddb 0x76b
+#define MN_kandb 0x772
+#define MN_vpexpandb 0x778
+#define MN_vpmovusdb 0x782
+#define MN_vpmovsdb 0x78c
+#define MN_vpmovdb 0x795
+#define MN_vpcomgeb 0x79d
+#define MN_vpcomleb 0x7a6
+#define MN_vpcmpnleb 0x7af
+#define MN_vpcmpleb 0x7b9
+#define MN_vpcomfalseb 0x7c2
+#define MN_vpcomtrueb 0x7ce
+#define MN_xcrypt_cfb 0x7d9
+#define MN_xcryptcfb 0x7e4
+#define MN_xcrypt_ofb 0x7ee
+#define MN_xcryptofb 0x7f9
#define MN_pshufb (MN_vpshufb + 1)
-#define MN_vpshufb 0x7f6
-#define MN_invlpgb 0x7fe
+#define MN_vpshufb 0x803
+#define MN_invlpgb 0x80b
#define MN_pavgb (MN_vpavgb + 1)
-#define MN_vpavgb 0x806
-#define MN_jb 0x80d
-#define MN_pbndkb 0x810
+#define MN_vpavgb 0x813
+#define MN_jb 0x81a
+#define MN_pbndkb 0x81d
#define MN_pmovmskb (MN_vpmovmskb + 1)
-#define MN_vpmovmskb 0x817
-#define MN_vpshlb 0x821
-#define MN_kshiftlb 0x828
+#define MN_vpmovmskb 0x824
+#define MN_vpshlb 0x82e
+#define MN_kshiftlb 0x835
#define MN_gf2p8mulb (MN_vgf2p8mulb + 1)
-#define MN_vgf2p8mulb 0x831
-#define MN_vpblendmb 0x83c
-#define MN_vptestnmb 0x846
-#define MN_vpcomb 0x850
-#define MN_vpshufbitqmb 0x857
-#define MN_vpermb 0x864
-#define MN_vptestmb 0x86b
-#define MN_kandnb 0x874
+#define MN_vgf2p8mulb 0x83e
+#define MN_vpblendmb 0x849
+#define MN_vptestnmb 0x853
+#define MN_vpcomb 0x85d
+#define MN_vpshufbitqmb 0x864
+#define MN_vpermb 0x871
+#define MN_vptestmb 0x878
+#define MN_kandnb 0x881
#define MN_psignb (MN_vpsignb + 1)
-#define MN_vpsignb 0x87b
-#define MN_jnb 0x883
-#define MN_ccmpnb 0x887
-#define MN_setnb 0x88e
-#define MN_ctestnb 0x894
-#define MN_setzunb 0x89c
+#define MN_vpsignb 0x888
+#define MN_jnb 0x890
+#define MN_ccmpnb 0x894
+#define MN_setnb 0x89b
+#define MN_ctestnb 0x8a1
+#define MN_setzunb 0x8a9
#define MN_cmovnb (MN_fcmovnb + 1)
#define MN_fcmovnb (MN_cfcmovnb + 1)
-#define MN_cfcmovnb 0x8a4
-#define MN_ccmpb 0x8ad
-#define MN_vpcmpb 0x8b3
-#define MN_vpcomeqb 0x8ba
+#define MN_cfcmovnb 0x8b1
+#define MN_ccmpb 0x8ba
+#define MN_vpcmpb 0x8c0
+#define MN_vpcomeqb 0x8c7
#define MN_gf2p8affineqb (MN_vgf2p8affineqb + 1)
-#define MN_vgf2p8affineqb 0x8c3
-#define MN_vpcomneqb 0x8d2
-#define MN_vpcmpneqb 0x8dc
+#define MN_vgf2p8affineqb 0x8d0
+#define MN_vpcomneqb 0x8df
+#define MN_vpcmpneqb 0x8e9
#define MN_pcmpeqb (MN_vpcmpeqb + 1)
-#define MN_vpcmpeqb 0x8e6
-#define MN_vpmovusqb 0x8ef
-#define MN_vpmovsqb 0x8f9
-#define MN_vpmultishiftqb 0x902
+#define MN_vpcmpeqb 0x8f3
+#define MN_vpmovusqb 0x8fc
+#define MN_vpmovsqb 0x906
+#define MN_vpmultishiftqb 0x90f
#define MN_gf2p8affineinvqb (MN_vgf2p8affineinvqb + 1)
-#define MN_vgf2p8affineinvqb 0x911
-#define MN_vpmovqb 0x923
-#define MN_rex_rb 0x92b
-#define MN_korb 0x932
-#define MN_kxnorb 0x937
-#define MN_kxorb 0x93e
+#define MN_vgf2p8affineinvqb 0x91e
+#define MN_vpmovqb 0x930
+#define MN_rex_rb 0x938
+#define MN_korb 0x93f
+#define MN_kxnorb 0x944
+#define MN_kxorb 0x94b
#define MN_pinsrb (MN_vpinsrb + 1)
-#define MN_vpinsrb 0x944
-#define MN_kshiftrb 0x94c
+#define MN_vpinsrb 0x951
+#define MN_kshiftrb 0x959
#define MN_pextrb (MN_vpextrb + 1)
-#define MN_vpextrb 0x955
-#define MN_rex_wrb 0x95d
+#define MN_vpextrb 0x962
+#define MN_rex_wrb 0x96a
#define MN_pabsb (MN_vpabsb + 1)
-#define MN_vpabsb 0x965
+#define MN_vpabsb 0x972
#define MN_psubsb (MN_vpsubsb + 1)
-#define MN_vpsubsb 0x96c
+#define MN_vpsubsb 0x979
#define MN_paddsb (MN_vpaddsb + 1)
-#define MN_vpaddsb 0x974
+#define MN_vpaddsb 0x981
#define MN_pminsb (MN_vpminsb + 1)
-#define MN_vpminsb 0x97c
-#define MN_vpcompressb 0x984
+#define MN_vpminsb 0x989
+#define MN_vpcompressb 0x991
#define MN_psubusb (MN_vpsubusb + 1)
-#define MN_vpsubusb 0x990
+#define MN_vpsubusb 0x99d
#define MN_paddusb (MN_vpaddusb + 1)
-#define MN_vpaddusb 0x999
-#define MN_pavgusb 0x9a2
-#define MN_movsb 0x9aa
+#define MN_vpaddusb 0x9a6
+#define MN_pavgusb 0x9af
+#define MN_movsb 0x9b7
#define MN_pmaxsb (MN_vpmaxsb + 1)
-#define MN_vpmaxsb 0x9b0
-#define MN_setb 0x9b8
-#define MN_vpcomgtb 0x9bd
+#define MN_vpmaxsb 0x9bd
+#define MN_setb 0x9c5
+#define MN_vpcomgtb 0x9ca
#define MN_pcmpgtb (MN_vpcmpgtb + 1)
-#define MN_vpcmpgtb 0x9c6
-#define MN_vpcomltb 0x9cf
-#define MN_vpcmpnltb 0x9d8
-#define MN_vpcmpltb 0x9e2
-#define MN_vpopcntb 0x9eb
-#define MN_knotb 0x9f4
-#define MN_vprotb 0x9fa
-#define MN_vpbroadcastb 0xa01
-#define MN_ctestb 0xa0e
-#define MN_ktestb 0xa15
-#define MN_kortestb 0xa1c
-#define MN_vpcomgeub 0xa25
-#define MN_vpcomleub 0xa2f
-#define MN_vpcmpnleub 0xa39
-#define MN_vpcmpleub 0xa44
-#define MN_vpcomfalseub 0xa4e
-#define MN_vpcomtrueub 0xa5b
-#define MN_vpcomub 0xa67
+#define MN_vpcmpgtb 0x9d3
+#define MN_vpcomltb 0x9dc
+#define MN_vpcmpnltb 0x9e5
+#define MN_vpcmpltb 0x9ef
+#define MN_vpopcntb 0x9f8
+#define MN_knotb 0xa01
+#define MN_vprotb 0xa07
+#define MN_vpbroadcastb 0xa0e
+#define MN_ctestb 0xa1b
+#define MN_ktestb 0xa22
+#define MN_kortestb 0xa29
+#define MN_vpcomgeub 0xa32
+#define MN_vpcomleub 0xa3c
+#define MN_vpcmpnleub 0xa46
+#define MN_vpcmpleub 0xa51
+#define MN_vpcomfalseub 0xa5b
+#define MN_vpcomtrueub 0xa68
+#define MN_vpcomub 0xa74
#define MN_pminub (MN_vpminub + 1)
-#define MN_vpminub 0xa6f
-#define MN_vpcmpub 0xa77
-#define MN_vpcomequb 0xa7f
-#define MN_vpcomnequb 0xa89
-#define MN_vpcmpnequb 0xa94
-#define MN_vpcmpequb 0xa9f
+#define MN_vpminub 0xa7c
+#define MN_vpcmpub 0xa84
+#define MN_vpcomequb 0xa8c
+#define MN_vpcomnequb 0xa96
+#define MN_vpcmpnequb 0xaa1
+#define MN_vpcmpequb 0xaac
#define MN_sub (MN_fsub + 1)
#define MN_fsub (MN_pfsub + 1)
-#define MN_pfsub 0xaa9
-#define MN_fisub 0xaaf
-#define MN_vpcomgtub 0xab5
-#define MN_vpcomltub 0xabf
-#define MN_vpcmpnltub 0xac9
-#define MN_vpcmpltub 0xad4
+#define MN_pfsub 0xab6
+#define MN_fisub 0xabc
+#define MN_vpcomgtub 0xac2
+#define MN_vpcomltub 0xacc
+#define MN_vpcmpnltub 0xad6
+#define MN_vpcmpltub 0xae1
#define MN_pmaxub (MN_vpmaxub + 1)
-#define MN_vpmaxub 0xade
-#define MN_setzub 0xae6
+#define MN_vpmaxub 0xaeb
+#define MN_setzub 0xaf3
#define MN_pblendvb (MN_vpblendvb + 1)
-#define MN_vpblendvb 0xaed
+#define MN_vpblendvb 0xafa
#define MN_cmovb (MN_fcmovb + 1)
#define MN_fcmovb (MN_cfcmovb + 1)
-#define MN_cfcmovb 0xaf7
-#define MN_kmovb 0xaff
-#define MN_rex_wb 0xb05
-#define MN_clwb 0xb0c
+#define MN_cfcmovb 0xb04
+#define MN_kmovb 0xb0c
+#define MN_rex_wb 0xb12
+#define MN_clwb 0xb19
#define MN_packsswb (MN_vpacksswb + 1)
-#define MN_vpacksswb 0xb11
+#define MN_vpacksswb 0xb1e
#define MN_packuswb (MN_vpackuswb + 1)
-#define MN_vpackuswb 0xb1b
-#define MN_vpmovuswb 0xb25
-#define MN_vpmovswb 0xb2f
-#define MN_vpmovwb 0xb38
-#define MN_rex_xb 0xb40
-#define MN_rex_rxb 0xb47
-#define MN_rex_wrxb 0xb4f
-#define MN_rex_wxb 0xb58
-#define MN_movzb 0xb60
-#define MN_clac 0xb66
-#define MN_stac 0xb6b
-#define MN_xcrypt_cbc 0xb70
-#define MN_xcryptcbc 0xb7b
-#define MN_pfacc 0xb85
-#define MN_pfnacc 0xb8b
-#define MN_pfpnacc 0xb92
-#define MN_adc 0xb9a
+#define MN_vpackuswb 0xb28
+#define MN_vpmovuswb 0xb32
+#define MN_vpmovswb 0xb3c
+#define MN_vpmovwb 0xb45
+#define MN_rex_xb 0xb4d
+#define MN_rex_rxb 0xb54
+#define MN_rex_wrxb 0xb5c
+#define MN_rex_wxb 0xb65
+#define MN_movzb 0xb6d
+#define MN_clac 0xb73
+#define MN_stac 0xb78
+#define MN_xcrypt_cbc 0xb7d
+#define MN_xcryptcbc 0xb88
+#define MN_pfacc 0xb92
+#define MN_pfnacc 0xb98
+#define MN_pfpnacc 0xb9f
+#define MN_adc 0xba7
#define MN_dec (MN_aesdec + 3)
#define MN_aesdec (MN_vaesdec + 1)
-#define MN_vaesdec 0xb9e
-#define MN_getsec 0xba6
-#define MN_xsavec 0xbad
-#define MN_blcic 0xbb4
-#define MN_blsic 0xbba
-#define MN_jc 0xbc0
-#define MN_t1mskc 0xbc3
-#define MN_clc 0xbca
-#define MN_cmc 0xbce
+#define MN_vaesdec 0xbab
+#define MN_getsec 0xbb3
+#define MN_xsavec 0xbba
+#define MN_blcic 0xbc1
+#define MN_blsic 0xbc7
+#define MN_jc 0xbcd
+#define MN_t1mskc 0xbd0
+#define MN_clc 0xbd7
+#define MN_cmc 0xbdb
#define MN_aesimc (MN_vaesimc + 1)
-#define MN_vaesimc 0xbd2
-#define MN_rdpmc 0xbda
+#define MN_vaesimc 0xbdf
+#define MN_rdpmc 0xbe7
#define MN_aesenc (MN_vaesenc + 1)
-#define MN_vaesenc 0xbe0
-#define MN_inc 0xbe8
-#define MN_jnc 0xbec
-#define MN_ccmpnc 0xbf0
-#define MN_setnc 0xbf7
-#define MN_ctestnc 0xbfd
-#define MN_vmfunc 0xc05
-#define MN_setzunc 0xc0c
+#define MN_vaesenc 0xbed
+#define MN_inc 0xbf5
+#define MN_jnc 0xbf9
+#define MN_ccmpnc 0xbfd
+#define MN_setnc 0xc04
+#define MN_ctestnc 0xc0a
+#define MN_vmfunc 0xc12
+#define MN_setzunc 0xc19
#define MN_cmovnc (MN_cfcmovnc + 2)
-#define MN_cfcmovnc 0xc14
-#define MN_tlbsync 0xc1d
-#define MN_ccmpc 0xc25
-#define MN_rdtsc 0xc2b
-#define MN_btc 0xc31
-#define MN_setc 0xc35
+#define MN_cfcmovnc 0xc21
+#define MN_tlbsync 0xc2a
+#define MN_ccmpc 0xc32
+#define MN_rdtsc 0xc38
+#define MN_btc 0xc3e
+#define MN_setc 0xc42
#define MN_stc (MN_ctestc + 3)
-#define MN_ctestc 0xc3a
-#define MN_setzuc 0xc41
+#define MN_ctestc 0xc47
+#define MN_setzuc 0xc4e
#define MN_cmovc (MN_cfcmovc + 2)
-#define MN_cfcmovc 0xc48
-#define MN_vpermi2d 0xc50
-#define MN_vpmovm2d 0xc59
-#define MN_vpermt2d 0xc62
-#define MN_vpbroadcastmw2d 0xc6b
-#define MN_aad 0xc7b
-#define MN_vmread 0xc7f
-#define MN_vpshad 0xc86
-#define MN_vmload 0xc8d
+#define MN_cfcmovc 0xc55
+#define MN_vpermi2d 0xc5d
+#define MN_vpmovm2d 0xc66
+#define MN_vpermt2d 0xc6f
+#define MN_vpbroadcastmw2d 0xc78
+#define MN_aad 0xc88
+#define MN_vmread 0xc8c
+#define MN_vpshad 0xc93
+#define MN_vmload 0xc9a
#define MN_psrad (MN_vpsrad + 1)
-#define MN_vpsrad 0xc94
-#define MN_vphaddbd 0xc9b
-#define MN_vphaddubd 0xca4
+#define MN_vpsrad 0xca1
+#define MN_vphaddbd 0xca8
+#define MN_vphaddubd 0xcb1
#define MN_phsubd (MN_vphsubd + 1)
-#define MN_vphsubd 0xcae
+#define MN_vphsubd 0xcbb
#define MN_psubd (MN_vpsubd + 1)
-#define MN_vpsubd 0xcb6
+#define MN_vpsubd 0xcc3
#define MN_pmovsxbd (MN_vpmovsxbd + 1)
-#define MN_vpmovsxbd 0xcbd
+#define MN_vpmovsxbd 0xcca
#define MN_pmovzxbd (MN_vpmovzxbd + 1)
-#define MN_vpmovzxbd 0xcc7
+#define MN_vpmovzxbd 0xcd4
#define MN_add (MN_aadd + 1)
-#define MN_aadd 0xcd1
+#define MN_aadd 0xcde
#define MN_fadd (MN_pfadd + 1)
-#define MN_pfadd 0xcd6
-#define MN_fiadd 0xcdc
-#define MN_tileloadd 0xce2
+#define MN_pfadd 0xce3
+#define MN_fiadd 0xce9
+#define MN_tileloadd 0xcef
#define MN_xadd (MN_cmpnaxadd + 5)
-#define MN_cmpnaxadd 0xcec
-#define MN_cmpaxadd 0xcf6
-#define MN_cmpnbxadd 0xcff
-#define MN_cmpbxadd 0xd09
-#define MN_cmpncxadd 0xd12
-#define MN_cmpcxadd 0xd1c
-#define MN_cmpnaexadd 0xd25
-#define MN_cmpaexadd 0xd30
-#define MN_cmpnbexadd 0xd3a
-#define MN_cmpbexadd 0xd45
-#define MN_cmpngexadd 0xd4f
-#define MN_cmpgexadd 0xd5a
-#define MN_cmpnlexadd 0xd64
-#define MN_cmplexadd 0xd6f
-#define MN_cmpnexadd 0xd79
-#define MN_cmpexadd 0xd83
-#define MN_cmppexadd 0xd8c
-#define MN_cmpngxadd 0xd96
-#define MN_cmpgxadd 0xda0
-#define MN_cmpnlxadd 0xda9
-#define MN_cmplxadd 0xdb3
-#define MN_cmpnoxadd 0xdbc
-#define MN_cmpoxadd 0xdc6
-#define MN_cmppoxadd 0xdcf
-#define MN_cmpnpxadd 0xdd9
-#define MN_cmppxadd 0xde3
-#define MN_cmpnsxadd 0xdec
-#define MN_cmpsxadd 0xdf6
-#define MN_cmpnzxadd 0xdff
-#define MN_cmpzxadd 0xe09
+#define MN_cmpnaxadd 0xcf9
+#define MN_cmpaxadd 0xd03
+#define MN_cmpnbxadd 0xd0c
+#define MN_cmpbxadd 0xd16
+#define MN_cmpncxadd 0xd1f
+#define MN_cmpcxadd 0xd29
+#define MN_cmpnaexadd 0xd32
+#define MN_cmpaexadd 0xd3d
+#define MN_cmpnbexadd 0xd47
+#define MN_cmpbexadd 0xd52
+#define MN_cmpngexadd 0xd5c
+#define MN_cmpgexadd 0xd67
+#define MN_cmpnlexadd 0xd71
+#define MN_cmplexadd 0xd7c
+#define MN_cmpnexadd 0xd86
+#define MN_cmpexadd 0xd90
+#define MN_cmppexadd 0xd99
+#define MN_cmpngxadd 0xda3
+#define MN_cmpgxadd 0xdad
+#define MN_cmpnlxadd 0xdb6
+#define MN_cmplxadd 0xdc0
+#define MN_cmpnoxadd 0xdc9
+#define MN_cmpoxadd 0xdd3
+#define MN_cmppoxadd 0xddc
+#define MN_cmpnpxadd 0xde6
+#define MN_cmppxadd 0xdf0
+#define MN_cmpnsxadd 0xdf9
+#define MN_cmpsxadd 0xe03
+#define MN_cmpnzxadd 0xe0c
+#define MN_cmpzxadd 0xe16
#define MN_phaddd (MN_vphaddd + 1)
-#define MN_vphaddd 0xe12
-#define MN_kaddd 0xe1a
+#define MN_vphaddd 0xe1f
+#define MN_kaddd 0xe27
#define MN_paddd (MN_vpaddd + 1)
-#define MN_vpaddd 0xe20
-#define MN_vpshldd 0xe27
-#define MN_kandd 0xe2f
-#define MN_vpandd 0xe35
-#define MN_vpexpandd 0xe3c
-#define MN_vpblendd 0xe46
-#define MN_vpgatherdd 0xe4f
-#define MN_vpscatterdd 0xe5a
-#define MN_vpshrdd 0xe66
-#define MN_vpmacsdd 0xe6e
-#define MN_vpmacssdd 0xe77
-#define MN_rdseed 0xe81
-#define MN_vpcomged 0xe88
-#define MN_vpcomled 0xe91
-#define MN_vpcmpnled 0xe9a
-#define MN_vpcmpled 0xea4
-#define MN_tilestored 0xead
-#define MN_vpcomfalsed 0xeb8
-#define MN_vpcomtrued 0xec4
-#define MN_pi2fd 0xecf
+#define MN_vpaddd 0xe2d
+#define MN_vpshldd 0xe34
+#define MN_kandd 0xe3c
+#define MN_vpandd 0xe42
+#define MN_vpexpandd 0xe49
+#define MN_vpblendd 0xe53
+#define MN_vpgatherdd 0xe5c
+#define MN_vpscatterdd 0xe67
+#define MN_vpshrdd 0xe73
+#define MN_vpmacsdd 0xe7b
+#define MN_vpmacssdd 0xe84
+#define MN_rdseed 0xe8e
+#define MN_vpcomged 0xe95
+#define MN_vpcomled 0xe9e
+#define MN_vpcmpnled 0xea7
+#define MN_vpcmpled 0xeb1
+#define MN_tilestored 0xeba
+#define MN_vpcomfalsed 0xec5
+#define MN_vpcomtrued 0xed1
+#define MN_pi2fd 0xedc
#define MN_pshufd (MN_vpshufd + 1)
-#define MN_vpshufd 0xed5
-#define MN_vpternlogd 0xedd
-#define MN_pf2id 0xee8
-#define MN_invpcid 0xeee
-#define MN_rdpid 0xef6
-#define MN_invvpid 0xefc
-#define MN_cpuid 0xf04
-#define MN_fbld 0xf0a
-#define MN_cld 0xf0f
-#define MN_fld 0xf13
+#define MN_vpshufd 0xee2
+#define MN_vpternlogd 0xeea
+#define MN_pf2id 0xef5
+#define MN_invpcid 0xefb
+#define MN_rdpid 0xf03
+#define MN_invvpid 0xf09
+#define MN_cpuid 0xf11
+#define MN_fbld 0xf17
+#define MN_cld 0xf1c
+#define MN_fld 0xf20
#define MN_shld (MN_vpshld + 2)
-#define MN_vpshld 0xf17
-#define MN_fild 0xf1e
+#define MN_vpshld 0xf24
+#define MN_fild 0xf2b
#define MN_pslld (MN_vpslld + 1)
-#define MN_vpslld 0xf23
+#define MN_vpslld 0xf30
#define MN_pmulld (MN_vpmulld + 1)
-#define MN_vpmulld 0xf2a
-#define MN_vprold 0xf32
+#define MN_vpmulld 0xf37
+#define MN_vprold 0xf3f
#define MN_psrld (MN_vpsrld + 1)
-#define MN_vpsrld 0xf39
-#define MN_vmptrld 0xf40
-#define MN_kshiftld 0xf48
-#define MN_enqcmd 0xf51
-#define MN_vpblendmd 0xf58
-#define MN_vptestnmd 0xf62
-#define MN_vpcomd 0xf6c
-#define MN_vpermd 0xf73
-#define MN_vptestmd 0xf7a
+#define MN_vpsrld 0xf46
+#define MN_vmptrld 0xf4d
+#define MN_kshiftld 0xf55
+#define MN_enqcmd 0xf5e
+#define MN_vpblendmd 0xf65
+#define MN_vptestnmd 0xf6f
+#define MN_vpcomd 0xf79
+#define MN_vpermd 0xf80
+#define MN_vptestmd 0xf87
#define MN_and (MN_aand + 1)
-#define MN_aand 0xf83
+#define MN_aand 0xf90
#define MN_pand (MN_vpand + 1)
-#define MN_vpand 0xf88
-#define MN_rdrand 0xf8e
-#define MN_bnd 0xf95
-#define MN_kandnd 0xf99
-#define MN_vpandnd 0xfa0
-#define MN_xend 0xfa8
-#define MN_valignd 0xfad
+#define MN_vpand 0xf95
+#define MN_rdrand 0xf9b
+#define MN_bnd 0xfa2
+#define MN_kandnd 0xfa6
+#define MN_vpandnd 0xfad
+#define MN_xend 0xfb5
+#define MN_valignd 0xfba
#define MN_psignd (MN_vpsignd + 1)
-#define MN_vpsignd 0xfb5
-#define MN_bound 0xfbd
-#define MN_slod 0xfc3
-#define MN_vfmaddsub231pd 0xfc8
-#define MN_vfmsub231pd 0xfd7
-#define MN_vfnmsub231pd 0xfe3
-#define MN_vfmsubadd231pd 0xff0
-#define MN_vfmadd231pd 0xfff
-#define MN_vfnmadd231pd 0x100b
-#define MN_vfmaddsub132pd 0x1018
-#define MN_vfmsub132pd 0x1027
-#define MN_vfnmsub132pd 0x1033
-#define MN_vfmsubadd132pd 0x1040
-#define MN_vfmadd132pd 0x104f
-#define MN_vfnmadd132pd 0x105b
-#define MN_vcvtph2pd 0x1068
-#define MN_vpermi2pd 0x1072
-#define MN_cvtpi2pd 0x107c
-#define MN_vpermil2pd 0x1085
-#define MN_vexp2pd 0x1090
+#define MN_vpsignd 0xfc2
+#define MN_bound 0xfca
+#define MN_slod 0xfd0
+#define MN_vfmaddsub231pd 0xfd5
+#define MN_vfmsub231pd 0xfe4
+#define MN_vfnmsub231pd 0xff0
+#define MN_vfmsubadd231pd 0xffd
+#define MN_vfmadd231pd 0x100c
+#define MN_vfnmadd231pd 0x1018
+#define MN_vfmaddsub132pd 0x1025
+#define MN_vfmsub132pd 0x1034
+#define MN_vfnmsub132pd 0x1040
+#define MN_vfmsubadd132pd 0x104d
+#define MN_vfmadd132pd 0x105c
+#define MN_vfnmadd132pd 0x1068
+#define MN_vcvtph2pd 0x1075
+#define MN_vpermi2pd 0x107f
+#define MN_cvtpi2pd 0x1089
+#define MN_vpermil2pd 0x1092
+#define MN_vexp2pd 0x109d
#define MN_cvtdq2pd (MN_vcvtdq2pd + 1)
-#define MN_vcvtdq2pd 0x1098
-#define MN_vcvtudq2pd 0x10a2
-#define MN_vcvtqq2pd 0x10ad
-#define MN_vcvtuqq2pd 0x10b7
+#define MN_vcvtdq2pd 0x10a5
+#define MN_vcvtudq2pd 0x10af
+#define MN_vcvtqq2pd 0x10ba
+#define MN_vcvtuqq2pd 0x10c4
#define MN_cvtps2pd (MN_vcvtps2pd + 1)
-#define MN_vcvtps2pd 0x10c2
-#define MN_vpermt2pd 0x10cc
-#define MN_vfmaddsub213pd 0x10d6
-#define MN_vfmsub213pd 0x10e5
-#define MN_vfnmsub213pd 0x10f1
-#define MN_vfmsubadd213pd 0x10fe
-#define MN_vfmadd213pd 0x110d
-#define MN_vfnmadd213pd 0x1119
-#define MN_vrcp14pd 0x1126
-#define MN_vrsqrt14pd 0x112f
-#define MN_vrcp28pd 0x113a
-#define MN_vrsqrt28pd 0x1143
+#define MN_vcvtps2pd 0x10cf
+#define MN_vpermt2pd 0x10d9
+#define MN_vfmaddsub213pd 0x10e3
+#define MN_vfmsub213pd 0x10f2
+#define MN_vfnmsub213pd 0x10fe
+#define MN_vfmsubadd213pd 0x110b
+#define MN_vfmadd213pd 0x111a
+#define MN_vfnmadd213pd 0x1126
+#define MN_vrcp14pd 0x1133
+#define MN_vrsqrt14pd 0x113c
+#define MN_vrcp28pd 0x1147
+#define MN_vrsqrt28pd 0x1150
#define MN_movapd (MN_vmovapd + 1)
-#define MN_vmovapd 0x114e
-#define MN_pswapd 0x1156
+#define MN_vmovapd 0x115b
+#define MN_pswapd 0x1163
#define MN_subpd (MN_addsubpd + 3)
#define MN_addsubpd (MN_vfmaddsubpd + 3)
-#define MN_vfmaddsubpd 0x115d
-#define MN_vaddsubpd 0x1169
+#define MN_vfmaddsubpd 0x116a
+#define MN_vaddsubpd 0x1176
#define MN_hsubpd (MN_vhsubpd + 1)
-#define MN_vhsubpd 0x1173
-#define MN_vfmsubpd 0x117b
-#define MN_vfnmsubpd 0x1184
-#define MN_vsubpd 0x118e
-#define MN_vgatherpf0dpd 0x1195
-#define MN_vscatterpf0dpd 0x11a3
-#define MN_vgatherpf1dpd 0x11b2
-#define MN_vscatterpf1dpd 0x11c0
+#define MN_vhsubpd 0x1180
+#define MN_vfmsubpd 0x1188
+#define MN_vfnmsubpd 0x1191
+#define MN_vsubpd 0x119b
+#define MN_vgatherpf0dpd 0x11a2
+#define MN_vscatterpf0dpd 0x11b0
+#define MN_vgatherpf1dpd 0x11bf
+#define MN_vscatterpf1dpd 0x11cd
#define MN_addpd (MN_vfmsubaddpd + 6)
-#define MN_vfmsubaddpd 0x11cf
+#define MN_vfmsubaddpd 0x11dc
#define MN_haddpd (MN_vhaddpd + 1)
-#define MN_vhaddpd 0x11db
-#define MN_vfmaddpd 0x11e3
-#define MN_vfnmaddpd 0x11ec
-#define MN_vaddpd 0x11f6
+#define MN_vhaddpd 0x11e8
+#define MN_vfmaddpd 0x11f0
+#define MN_vfnmaddpd 0x11f9
+#define MN_vaddpd 0x1203
#define MN_andpd (MN_vexpandpd + 4)
-#define MN_vexpandpd 0x11fd
-#define MN_vandpd 0x1207
+#define MN_vexpandpd 0x120a
+#define MN_vandpd 0x1214
#define MN_blendpd (MN_vblendpd + 1)
-#define MN_vblendpd 0x120e
+#define MN_vblendpd 0x121b
#define MN_roundpd (MN_vroundpd + 1)
-#define MN_vroundpd 0x1217
-#define MN_vgatherdpd 0x1220
-#define MN_vscatterdpd 0x122b
+#define MN_vroundpd 0x1224
+#define MN_vgatherdpd 0x122d
+#define MN_vscatterdpd 0x1238
#define MN_cmpunordpd (MN_vcmpunordpd + 1)
-#define MN_vcmpunordpd 0x1237
+#define MN_vcmpunordpd 0x1244
#define MN_cmpordpd (MN_vcmpordpd + 1)
-#define MN_vcmpordpd 0x1243
-#define MN_vreducepd 0x124d
-#define MN_vrangepd 0x1257
-#define MN_vcmpngepd 0x1260
-#define MN_vcmpgepd 0x126a
-#define MN_vrndscalepd 0x1273
+#define MN_vcmpordpd 0x1250
+#define MN_vreducepd 0x125a
+#define MN_vrangepd 0x1264
+#define MN_vcmpngepd 0x126d
+#define MN_vcmpgepd 0x1277
+#define MN_vrndscalepd 0x1280
#define MN_cmpnlepd (MN_vcmpnlepd + 1)
-#define MN_vcmpnlepd 0x127f
+#define MN_vcmpnlepd 0x128c
#define MN_cmplepd (MN_vcmplepd + 1)
-#define MN_vcmplepd 0x1289
-#define MN_vcmpfalsepd 0x1292
-#define MN_vcmptruepd 0x129e
-#define MN_vscalefpd 0x12a9
+#define MN_vcmplepd 0x1296
+#define MN_vcmpfalsepd 0x129f
+#define MN_vcmptruepd 0x12ab
+#define MN_vscalefpd 0x12b6
#define MN_shufpd (MN_vshufpd + 1)
-#define MN_vshufpd 0x12b3
+#define MN_vshufpd 0x12c0
#define MN_unpckhpd (MN_vunpckhpd + 1)
-#define MN_vunpckhpd 0x12bb
+#define MN_vunpckhpd 0x12c8
#define MN_movhpd (MN_vmovhpd + 1)
-#define MN_vmovhpd 0x12c5
+#define MN_vmovhpd 0x12d2
#define MN_movmskpd (MN_vmovmskpd + 1)
-#define MN_vmovmskpd 0x12cd
-#define MN_vpermilpd 0x12d7
+#define MN_vmovmskpd 0x12da
+#define MN_vpermilpd 0x12e4
#define MN_unpcklpd (MN_vunpcklpd + 1)
-#define MN_vunpcklpd 0x12e1
+#define MN_vunpcklpd 0x12ee
#define MN_mulpd (MN_vmulpd + 1)
-#define MN_vmulpd 0x12eb
+#define MN_vmulpd 0x12f8
#define MN_movlpd (MN_vmovlpd + 1)
-#define MN_vmovlpd 0x12f2
-#define MN_vpcmpd 0x12fa
-#define MN_vblendmpd 0x1301
-#define MN_vfixupimmpd 0x130b
-#define MN_vpermpd 0x1317
+#define MN_vmovlpd 0x12ff
+#define MN_vpcmpd 0x1307
+#define MN_vblendmpd 0x130e
+#define MN_vfixupimmpd 0x1318
+#define MN_vpermpd 0x1324
#define MN_andnpd (MN_vandnpd + 1)
-#define MN_vandnpd 0x131f
+#define MN_vandnpd 0x132c
#define MN_minpd (MN_vminpd + 1)
-#define MN_vminpd 0x1327
+#define MN_vminpd 0x1334
#define MN_dppd (MN_vdppd + 1)
-#define MN_vdppd 0x132e
+#define MN_vdppd 0x133b
#define MN_cmppd (MN_vcmppd + 1)
-#define MN_vcmppd 0x1334
-#define MN_vgetexppd 0x133b
-#define MN_vgatherpf0qpd 0x1345
-#define MN_vscatterpf0qpd 0x1353
-#define MN_vgatherpf1qpd 0x1362
-#define MN_vscatterpf1qpd 0x1370
-#define MN_vcmpunord_qpd 0x137f
-#define MN_vcmpord_qpd 0x138d
+#define MN_vcmppd 0x1341
+#define MN_vgetexppd 0x1348
+#define MN_vgatherpf0qpd 0x1352
+#define MN_vscatterpf0qpd 0x1360
+#define MN_vgatherpf1qpd 0x136f
+#define MN_vscatterpf1qpd 0x137d
+#define MN_vcmpunord_qpd 0x138c
+#define MN_vcmpord_qpd 0x139a
#define MN_cmpneqpd (MN_vcmpneqpd + 1)
-#define MN_vcmpneqpd 0x1399
+#define MN_vcmpneqpd 0x13a6
#define MN_cmpeqpd (MN_vcmpeqpd + 1)
-#define MN_vcmpeqpd 0x13a3
-#define MN_vcmpge_oqpd 0x13ac
-#define MN_vcmple_oqpd 0x13b8
-#define MN_vcmpfalse_oqpd 0x13c4
-#define MN_vcmpneq_oqpd 0x13d3
-#define MN_vcmpeq_oqpd 0x13e0
-#define MN_vcmpgt_oqpd 0x13ec
-#define MN_vcmplt_oqpd 0x13f8
-#define MN_vgatherqpd 0x1404
-#define MN_vscatterqpd 0x140f
-#define MN_vcmpnge_uqpd 0x141b
-#define MN_vcmpnle_uqpd 0x1428
-#define MN_vcmptrue_uqpd 0x1435
-#define MN_vcmpneq_uqpd 0x1443
-#define MN_vcmpeq_uqpd 0x1450
-#define MN_vcmpngt_uqpd 0x145c
-#define MN_vcmpnlt_uqpd 0x1469
+#define MN_vcmpeqpd 0x13b0
+#define MN_vcmpge_oqpd 0x13b9
+#define MN_vcmple_oqpd 0x13c5
+#define MN_vcmpfalse_oqpd 0x13d1
+#define MN_vcmpneq_oqpd 0x13e0
+#define MN_vcmpeq_oqpd 0x13ed
+#define MN_vcmpgt_oqpd 0x13f9
+#define MN_vcmplt_oqpd 0x1405
+#define MN_vgatherqpd 0x1411
+#define MN_vscatterqpd 0x141c
+#define MN_vcmpnge_uqpd 0x1428
+#define MN_vcmpnle_uqpd 0x1435
+#define MN_vcmptrue_uqpd 0x1442
+#define MN_vcmpneq_uqpd 0x1450
+#define MN_vcmpeq_uqpd 0x145d
+#define MN_vcmpngt_uqpd 0x1469
+#define MN_vcmpnlt_uqpd 0x1476
#define MN_orpd (MN_vorpd + 1)
-#define MN_vorpd 0x1476
+#define MN_vorpd 0x1483
#define MN_xorpd (MN_vxorpd + 1)
-#define MN_vxorpd 0x147c
-#define MN_vcmpunord_spd 0x1483
-#define MN_vcmpord_spd 0x1491
-#define MN_vcm[...]
[diff truncated at 100000 bytes]
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