[binutils-gdb] cpu: cris: drop some unused vars

[Michael Frysinger]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=e9026cfbcfa4769e1c328dd45798d4483e37fc5d

commit e9026cfbcfa4769e1c328dd45798d4483e37fc5d
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Mon Dec 18 21:43:07 2023 -0500

    cpu: cris: drop some unused vars
    
    These fix unused variable warnings in the generated sim.

Diff:
---
 cpu/cris.cpu                  | 10 ++++++----
 sim/cris/semcrisv10f-switch.c |  4 ++--
 sim/cris/semcrisv32f-switch.c |  6 +++---
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index 97b44581e78..ba5ed18a3d4 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -2598,10 +2598,11 @@
      "move ${Ps},${Rd-sfield}"
      (+ Ps RFIX_MOVE_S_R MODE_REGISTER SIZE_FIXED Rd-sfield)
      (sequence
-       ((SI grno) (SI prno) (SI newval))
+       ((SI prno) (SI newval))
        (set prno (regno Ps))
-       ; CGEN-FIXME: Can't use the following and then "grno" below because
-       ; CGEN will emit a "tmp_grno" *also* in decodev32.c:crisv32f_decode
+       ; CGEN-FIXME: Can't declare (SI grno), then the following, and then
+       ; "grno" below because CGEN will emit a "tmp_grno" *also* in
+       ; decodev32.c:crisv32f_decode.  So inline RD-sfield below.
        ; (set grno (regno Rd-sfield))
        (set newval Ps)
        (.splice
@@ -3838,7 +3839,8 @@
  (+ Rd MODE_REGISTER RFIX_BTST SIZE_FIXED Rs)
  (sequence
    ((SI tmpd) (SI cnt))
-   (set tmpd (sll Rd (sub 31 (and Rs 31))))
+   (set cnt (sub 31 (and Rs 31)))
+   (set tmpd (sll Rd cnt))
    (setf-move SI tmpd))
 )
 
diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c
index a2bf6f1a630..cae56fd5ca8 100644
--- a/sim/cris/semcrisv10f-switch.c
+++ b/sim/cris/semcrisv10f-switch.c
@@ -3181,7 +3181,6 @@ cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special regi
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 
 {
-  SI tmp_grno;
   SI tmp_prno;
   SI tmp_newval;
   tmp_prno = FLD (f_operand2);
@@ -11778,7 +11777,8 @@ SET_H_VBIT_MOVE (0);
 {
   SI tmp_tmpd;
   SI tmp_cnt;
-  tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31)));
+  tmp_cnt = SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31));
+  tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), tmp_cnt);
 {
   {
     BI opval = LTSI (tmp_tmpd, 0);
diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c
index 8dd455c94e9..db2f7aa4710 100644
--- a/sim/cris/semcrisv32f-switch.c
+++ b/sim/cris/semcrisv32f-switch.c
@@ -265,7 +265,7 @@ This file is part of the GNU simulators.
 
 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
    off frills like tracing and profiling.  */
-/* FIXME: A better way would be to have TRACE_RESULT check for something
+/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something
    that can cause it to be optimized out.  Another way would be to emit
    special handlers into the instruction "stream".  */
 
@@ -3108,7 +3108,6 @@ cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special regi
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 
 {
-  SI tmp_grno;
   SI tmp_prno;
   SI tmp_newval;
   tmp_prno = FLD (f_operand2);
@@ -12048,7 +12047,8 @@ SET_H_VBIT_MOVE (0);
 {
   SI tmp_tmpd;
   SI tmp_cnt;
-  tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31)));
+  tmp_cnt = SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31));
+  tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), tmp_cnt);
 {
   {
     BI opval = LTSI (tmp_tmpd, 0);