[binutils-gdb] RISC-V: Fix misplaced @end table

[Andreas Schwab]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=062cda5a37967a4a2ab4f8b04032a6688018ee6b

commit 062cda5a37967a4a2ab4f8b04032a6688018ee6b
Author: Andreas Schwab <schwab@linux-m68k.org>
Date:   Sun Mar 20 11:23:05 2022 +0100

    RISC-V: Fix misplaced @end table
    
    Move the csr-check and arch items inside the table for the .option directive.

Diff:
---
 gas/doc/c-riscv.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index be9c1148355..21d867e9cf0 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -206,7 +206,6 @@ know what you're doing, this should only be at the top of a file.
 Enables or disables relaxation.  The RISC-V assembler and linker
 opportunistically relax some code sequences, but sometimes this behavior is not
 desirable.
-@end table
 
 @item csr-check
 @itemx no-csr-check
@@ -224,6 +223,7 @@ sometimes.  Besides, @samp{.option arch, -i} is illegal, since we cannot
 remove the base i extension anytime.  If you want to reset the whole ISA
 string, you can also use @samp{.option arch, =rv32imac} to overwrite the
 previous settings.
+@end table
 
 @cindex INSN directives
 @item .insn @var{type}, @var{operand} [,...,@var{operand_n}]