[binutils-gdb] powerpc: move cell "or rx,rx,rx" hints

[Alan Modra]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=7993124ee29271697870824c3a626babc7d5ab85

commit 7993124ee29271697870824c3a626babc7d5ab85
Author: Alan Modra <amodra@gmail.com>
Date:   Wed Jun 16 16:35:53 2021 +0930

    powerpc: move cell "or rx,rx,rx" hints
    
            * ppc-opc.c (powerpc_opcodes): Move cell db*cyc to proper location
            in table.

Diff:
---
 opcodes/ChangeLog |  5 +++++
 opcodes/ppc-opc.c | 10 +++++-----
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6419ee83cc4..8f4b9768343 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2021-06-17  Alan Modra  <amodra@gmail.com>
+
+	* ppc-opc.c (powerpc_opcodes): Move cell db*cyc to proper location
+	in table.
+
 2021-06-03  Alan Modra  <amodra@gmail.com>
 
 	PR 1202
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index e0593c8e24e..13d8b6c3c07 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -7254,10 +7254,15 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"yield",	0x7f7bdb78,	0xffffffff,  POWER7,	EXT,		{0}},
 /* or 28,28,28 */
 {"mdors",	0x7f9ce378,	0xffffffff,  E500MC,	EXT,		{0}},
+{"db8cyc",	0x7f9ce378,	0xffffffff,  CELL,	EXT,		{0}},
 /* or 29,29,29 */
 {"mdoio",	0x7fbdeb78,	0xffffffff,  POWER7,	EXT,		{0}},
+{"db10cyc",	0x7fbdeb78,	0xffffffff,  CELL,	EXT,		{0}},
 /* or 30,30,30 */
 {"mdoom",	0x7fdef378,	0xffffffff,  POWER7,	EXT,		{0}},
+{"db12cyc",	0x7fdef378,	0xffffffff,  CELL,	EXT,		{0}},
+/* or 31,31,31 */
+{"db16cyc",	0x7ffffb78,	0xffffffff,  CELL,	EXT,		{0}},
 
 {"mr",		XRC(31,444,0),	X_MASK,	     COM,	EXT,		{RA, RSB}},
 {"or",		XRC(31,444,0),	X_MASK,	     COM,	0,		{RA, RS, RB}},
@@ -8155,11 +8160,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 
 {"dcbzep",	XRT(31,1023,0),	XRT_MASK,    E500MC|PPCA2, 0,		{RA0, RB}},
 
-{"db8cyc",	0x7f9ce378,	0xffffffff,  CELL,	0,		{0}},
-{"db10cyc",	0x7fbdeb78,	0xffffffff,  CELL,	0,		{0}},
-{"db12cyc",	0x7fdef378,	0xffffffff,  CELL,	0,		{0}},
-{"db16cyc",	0x7ffffb78,	0xffffffff,  CELL,	0,		{0}},
-
 {"lwz",		OP(32),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, D, RA0}},
 {"l",		OP(32),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, D, RA0}},