[binutils-gdb] x86-64: generalize OP_G()'s EVEX.R' handling

[Jan Beulich]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=3fa77affb00ef5d9bcb7f080750625749cdfa611

commit 3fa77affb00ef5d9bcb7f080750625749cdfa611
Author: Jan Beulich <jbeulich@suse.com>
Date:   Thu Jul 22 13:02:54 2021 +0200

    x86-64: generalize OP_G()'s EVEX.R' handling
    
    EVEX.R' is invalid to be clear not only for mask registers, but also for
    GPRs - IOW everything handled in this function.

Diff:
---
 gas/testsuite/gas/i386/evex.d        | 2 ++
 gas/testsuite/gas/i386/evex.s        | 2 ++
 gas/testsuite/gas/i386/x86-64-evex.d | 2 ++
 opcodes/i386-dis.c                   | 9 ++++++++-
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
index b02bca39098..367b2eb1321 100644
--- a/gas/testsuite/gas/i386/evex.d
+++ b/gas/testsuite/gas/i386/evex.d
@@ -16,4 +16,6 @@ Disassembly of section .text:
  +[a-f0-9]+:	62 f1 d6 38 7b f0    	vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
  +[a-f0-9]+:	62 f1 57 38 7b f0    	vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
  +[a-f0-9]+:	62 f1 d7 38 7b f0    	vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+:	62 e1 7e 08 2d c0    	vcvtss2si %xmm0,%eax
+ +[a-f0-9]+:	62 e1 7c 08 c2 c0 00 	vcmpeqps %xmm0,%xmm0,%k0
 #pass
diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s
index 90c635a27b6..ff6cb43499b 100644
--- a/gas/testsuite/gas/i386/evex.s
+++ b/gas/testsuite/gas/i386/evex.s
@@ -12,3 +12,5 @@ _start:
 	.byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
 	.byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
 	.byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
+	.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
+	.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
index b360aa74a17..3a7b48e0bf9 100644
--- a/gas/testsuite/gas/i386/x86-64-evex.d
+++ b/gas/testsuite/gas/i386/x86-64-evex.d
@@ -17,4 +17,6 @@ Disassembly of section .text:
  +[a-f0-9]+:	62 f1 d6 38 7b f0    	vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
  +[a-f0-9]+:	62 f1 57 38 7b f0    	vcvtusi2sd %eax,\(bad\),%xmm5,%xmm6
  +[a-f0-9]+:	62 f1 d7 38 7b f0    	vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+:	62 e1 7e 08 2d c0    	vcvtss2si %xmm0,\(bad\)
+ +[a-f0-9]+:	62 e1 7c 08 c2 c0 00 	vcmpeqps %xmm0,%xmm0,\(bad\)
 #pass
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index ccc49ff023f..e95d2ef9d64 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11934,6 +11934,13 @@ OP_G (int bytemode, int sizeflag)
 {
   int add = 0;
   const char **names;
+
+  if (vex.evex && !vex.r && address_mode == mode_64bit)
+    {
+      oappend ("(bad)");
+      return;
+    }
+
   USED_REX (REX_R);
   if (rex & REX_R)
     add += 8;
@@ -12012,7 +12019,7 @@ OP_G (int bytemode, int sizeflag)
       break;
     case mask_bd_mode:
     case mask_mode:
-      if (add || (vex.evex && !vex.r))
+      if (add)
 	{
 	  oappend ("(bad)");
 	  return;