[binutils-gdb] Fix AVR assembler so that it creates relocs that will work with linker relaxation.

Nick Clifton nickc@sourceware.org
Thu Dec 16 16:41:51 GMT 2021


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f3be70df1b1681ad1b9b0490587011bde433d220

commit f3be70df1b1681ad1b9b0490587011bde433d220
Author: Nick Clifton <nickc@redhat.com>
Date:   Thu Dec 16 16:40:57 2021 +0000

    Fix AVR assembler so that it creates relocs that will work with linker relaxation.
    
            PR 28686
    gas     * config/tc-avr.h (tc_fix_adjustable): Define.
            * config/tc-avr.c (avr_fix_adjustable): New function.
            * testsuite/gas/all/gas.exp: Skip tests that need adjustable fixups.
            * testsuite/gas/elf/elf.exp: Likewise.
            * testsuite/gas/avr/diffreloc_withrelax.d: Adjust expected output.
            * testsuite/gas/avr/pc-relative-reloc.d: Adjust expected output.
    
    ld      * testsuite/ld-avr/avr-prop-7.d: Adjust expected output.
            * testsuite/ld-avr/avr-prop-8.d: Likewise.
            * testsuite/ld-avr/pr13402.d: Likewise.

Diff:
---
 gas/ChangeLog                               | 10 ++++++++++
 gas/config/tc-avr.c                         | 26 ++++++++++++++++++++++++++
 gas/config/tc-avr.h                         |  3 +++
 gas/testsuite/gas/all/gas.exp               |  4 ++--
 gas/testsuite/gas/avr/diffreloc_withrelax.d |  4 ++--
 gas/testsuite/gas/avr/pc-relative-reloc.d   |  2 +-
 gas/testsuite/gas/elf/elf.exp               |  2 +-
 ld/ChangeLog                                |  7 +++++++
 ld/testsuite/ld-avr/avr-prop-7.d            |  4 ++--
 ld/testsuite/ld-avr/avr-prop-8.d            |  3 ++-
 ld/testsuite/ld-avr/pr13402.d               |  6 ++++--
 11 files changed, 60 insertions(+), 11 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c2886ee7557..77888663077 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2021-12-16  Nick Clifton  <nickc@redhat.com>
+
+	PR 28686
+	* config/tc-avr.h (tc_fix_adjustable): Define.
+	* config/tc-avr.c (avr_fix_adjustable): New function.
+	* testsuite/gas/all/gas.exp: Skip tests that need adjustable fixups.
+	* testsuite/gas/elf/elf.exp: Likewise.
+	* testsuite/gas/avr/diffreloc_withrelax.d: Adjust expected output.
+	* testsuite/gas/avr/pc-relative-reloc.d: Adjust expected output.
+
 2021-11-26  Tom de Vries  <tdevries@suse.de>
 
 	PR 28629
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index e731ea9b7d9..f5fe659130f 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -2820,3 +2820,29 @@ avr_pre_output_hook (void)
   if (avr_opt.have_gccisr)
     bfd_map_over_sections (stdoutput, avr_check_gccisr_done, NULL);
 }
+
+/* Return false if the fixup in fixp should be left alone and not
+   adjusted.  */
+
+bool
+avr_fix_adjustable (struct fix *fixp)
+{
+  if (! linkrelax || fixp->fx_addsy == NULL)
+    return true;
+
+  /* Do not adjust relocations involving symbols in code sections,
+     because it breaks linker relaxations.  This could be fixed in the
+     linker, but this fix is simpler, and it pretty much only affects
+     object size a little bit.  */
+  if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
+    return false;
+
+  /* Likewise, do not adjust symbols that won't be merged, or debug
+     symbols, because they too break relaxation.  We do want to adjust
+     other mergeable symbols, like .rodata, because code relaxations
+     need section-relative symbols to properly relax them.  */
+  if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
+    return false;
+
+  return true;
+}
diff --git a/gas/config/tc-avr.h b/gas/config/tc-avr.h
index 58626970fa8..cb9e5bb3dfc 100644
--- a/gas/config/tc-avr.h
+++ b/gas/config/tc-avr.h
@@ -247,3 +247,6 @@ extern void avr_frag_init (fragS *);
 
 #define tc_line_separator_chars avr_line_separator_chars
 extern const char *avr_line_separator_chars;
+
+#define tc_fix_adjustable(FIX) avr_fix_adjustable (FIX)
+extern bool avr_fix_adjustable (struct fix *);
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index 5eee4f8abfa..5a08027d434 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -166,11 +166,11 @@ switch -glob $target_triplet {
 	# symbols on relocs.
 	setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*"
 	setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*"
-	setup_xfail "loongarch*-*-*"
+	setup_xfail "loongarch*-*-*" "avr-*-*"
 	run_dump_test redef2
 	setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*"
 	setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*"
-	setup_xfail "loongarch*-*-*"
+	setup_xfail "loongarch*-*-*" "avr-*-*"
 	# rs6000-aix disallows redefinition via .comm.
 	if [is_xcoff_format] {
 	    setup_xfail *-*-*
diff --git a/gas/testsuite/gas/avr/diffreloc_withrelax.d b/gas/testsuite/gas/avr/diffreloc_withrelax.d
index 6d5bd2ee01e..9d59e054ec4 100644
--- a/gas/testsuite/gas/avr/diffreloc_withrelax.d
+++ b/gas/testsuite/gas/avr/diffreloc_withrelax.d
@@ -8,9 +8,9 @@
 
 RELOCATION RECORDS FOR \[.text\]:
 OFFSET   TYPE              VALUE 
-00000000 R_AVR_CALL        .text
+00000000 R_AVR_CALL        L1
 
 
 RELOCATION RECORDS FOR \[.data\]:
 OFFSET   TYPE              VALUE 
-00000000 R_AVR_DIFF16      .text\+0x00000004
+00000000 R_AVR_DIFF16      L2
diff --git a/gas/testsuite/gas/avr/pc-relative-reloc.d b/gas/testsuite/gas/avr/pc-relative-reloc.d
index cc22b0bf366..30d0df6202a 100644
--- a/gas/testsuite/gas/avr/pc-relative-reloc.d
+++ b/gas/testsuite/gas/avr/pc-relative-reloc.d
@@ -12,7 +12,7 @@ RELOCATION RECORDS FOR \[.text.main\]:
 
 RELOCATION RECORDS FOR \[.debug_line\]:
 OFFSET   TYPE              VALUE 
-00000000 R_AVR_32_PCREL    .debug_line_end-0x00000004
+00000000 R_AVR_32_PCREL    .Ldebug_line_end-0x00000004
 
 
 RELOCATION RECORDS FOR \[.debug_line.text.main\]:
diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp
index 08105f88419..c172ba3d27a 100644
--- a/gas/testsuite/gas/elf/elf.exp
+++ b/gas/testsuite/gas/elf/elf.exp
@@ -184,7 +184,7 @@ if { [is_elf_format] } then {
 	    # against ordinary symbols into relocations against section symbols.
 	    # This is usually revealed by the error message:
 	    #  symbol `sym' required but not present
-	    setup_xfail "m681*-*-*" "m68hc*-*-*" "xgate-*-*" "vax-*-*"
+	    setup_xfail "m681*-*-*" "m68hc*-*-*" "xgate-*-*" "vax-*-*" "avr-*-*"
 	    run_dump_test redef
 	    run_dump_test equ-reloc
 	}
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 7795217dedc..a0ab861bb4a 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,10 @@
+2021-12-16  Nick Clifton  <nickc@redhat.com>
+
+	PR 28686
+	* testsuite/ld-avr/avr-prop-7.d: Adjust expected output.
+	* testsuite/ld-avr/avr-prop-8.d: Likewise.
+	* testsuite/ld-avr/pr13402.d: Likewise.
+
 2021-11-30  Nick Clifton  <nickc@redhat.com>
 
 	* scripttempl/pru.sc (.pru_irq_map): Define output section.
diff --git a/ld/testsuite/ld-avr/avr-prop-7.d b/ld/testsuite/ld-avr/avr-prop-7.d
index 9f2cea902e0..ebcb9dc2455 100644
--- a/ld/testsuite/ld-avr/avr-prop-7.d
+++ b/ld/testsuite/ld-avr/avr-prop-7.d
@@ -9,7 +9,7 @@
 00000000 <__ctors_end>:
    0:	04 d0       	rcall	.+8      	; 0xa <foo>
    2:	00 00       	nop
-   4:	00 00       	nop
+#...
    6:	86 e0       	ldi	r24, 0x06	; 6
-   8:	f0 f7       	brcc	.-4      	; 0x6 <__ctors_end\+0x6>
+   8:	f0 f7       	brcc	.-4      	; 0x6 <.*>
 #...
diff --git a/ld/testsuite/ld-avr/avr-prop-8.d b/ld/testsuite/ld-avr/avr-prop-8.d
index 2905f9880e9..b0122be3608 100644
--- a/ld/testsuite/ld-avr/avr-prop-8.d
+++ b/ld/testsuite/ld-avr/avr-prop-8.d
@@ -9,5 +9,6 @@
 00000000 <__ctors_end>:
    0:	ff cf       	rjmp	.-2      	; 0x0 <__ctors_end>
    2:	fe df       	rcall	.-4      	; 0x0 <__ctors_end>
-   4:	f8 f7       	brcc	.-2      	; 0x4 <__ctors_end\+0x4>
+#...
+   4:	f8 f7       	brcc	.-2      	; 0x4 <.*>
 #...
diff --git a/ld/testsuite/ld-avr/pr13402.d b/ld/testsuite/ld-avr/pr13402.d
index 6663950559e..a8fd63430ff 100644
--- a/ld/testsuite/ld-avr/pr13402.d
+++ b/ld/testsuite/ld-avr/pr13402.d
@@ -8,9 +8,11 @@
 #...
 main:
 call a
-   0:	02 d0       	rcall	.+4      	; 0x6 <_etext>
 call b
-   2:	01 d0       	rcall	.+2      	; 0x6 <_etext>
+   0:	02 d0       	rcall	.+4      	; 0x6 <_etext>
+#...
 call c
+   2:	01 d0       	rcall	.+2      	; 0x6 <_etext>
+#...
    4:	00 d0       	rcall	.+0      	; 0x6 <_etext>
 #...


More information about the Binutils-cvs mailing list