[binutils-gdb] x86-64: Always display suffix for %LQ in 64bit

H.J. Lu hjl@sourceware.org
Mon Oct 5 12:28:58 GMT 2020


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=5b316d90e4ec9845a890fd21ad86cf1043fb2ca3

commit 5b316d90e4ec9845a890fd21ad86cf1043fb2ca3
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Oct 5 05:27:58 2020 -0700

    x86-64: Always display suffix for %LQ in 64bit
    
    In 64bit, assembler generates a warning for "sysret":
    
    $ echo sysret | as --64 -o x.o -
    {standard input}: Assembler messages:
    {standard input}:1: Warning: no instruction mnemonic suffix given and no register operands; using default for `sysret'
    
    Always display suffix for %LQ in 64bit to display "sysretl".
    
    gas/
    
            PR binutils/26704
            * testsuite/gas/i386/noreg64-data16.d: Expect sysretl instead of
            sysret.
            * testsuite/gas/i386/noreg64.d: Likewise.
            * testsuite/gas/i386/x86-64-intel64.d: Likewise.
            * testsuite/gas/i386/x86-64-opcode.d: Likewise.
    
    opcodes/
    
            PR binutils/26704
            * i386-dis.c (putop): Always display suffix for %LQ in 64bit.

Diff:
---
 gas/ChangeLog                           | 9 +++++++++
 gas/testsuite/gas/i386/noreg64-data16.d | 2 +-
 gas/testsuite/gas/i386/noreg64.d        | 2 +-
 gas/testsuite/gas/i386/x86-64-intel64.d | 2 +-
 gas/testsuite/gas/i386/x86-64-opcode.d  | 2 +-
 opcodes/ChangeLog                       | 5 +++++
 opcodes/i386-dis.c                      | 2 +-
 7 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index ae5a614543f..bd0834016b9 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/26704
+	* testsuite/gas/i386/noreg64-data16.d: Expect sysretl instead of
+	sysret.
+	* testsuite/gas/i386/noreg64.d: Likewise.
+	* testsuite/gas/i386/x86-64-intel64.d: Likewise.
+	* testsuite/gas/i386/x86-64-opcode.d: Likewise.
+
 2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR binutils/26705
diff --git a/gas/testsuite/gas/i386/noreg64-data16.d b/gas/testsuite/gas/i386/noreg64-data16.d
index 81afa9f1439..881043df61e 100644
--- a/gas/testsuite/gas/i386/noreg64-data16.d
+++ b/gas/testsuite/gas/i386/noreg64-data16.d
@@ -150,7 +150,7 @@ Disassembly of section .text:
  *[a-f0-9]+:	66 81 28 89 00       	subw   \$0x89,\(%rax\)
  *[a-f0-9]+:	66 81 28 34 12       	subw   \$0x1234,\(%rax\)
  *[a-f0-9]+:	66 81 28 78 56       	subw   \$0x5678,\(%rax\)
- *[a-f0-9]+:	66 0f 07             	data16 sysret *
+ *[a-f0-9]+:	66 0f 07             	data16 sysretl *
  *[a-f0-9]+:	66 f7 00 89 00       	testw  \$0x89,\(%rax\)
  *[a-f0-9]+:	66 f7 00 34 12       	testw  \$0x1234,\(%rax\)
  *[a-f0-9]+:	66 f7 00 78 56       	testw  \$0x5678,\(%rax\)
diff --git a/gas/testsuite/gas/i386/noreg64.d b/gas/testsuite/gas/i386/noreg64.d
index 33457049df4..6cc461f485b 100644
--- a/gas/testsuite/gas/i386/noreg64.d
+++ b/gas/testsuite/gas/i386/noreg64.d
@@ -151,7 +151,7 @@ Disassembly of section .text:
  *[a-f0-9]+:	81 28 89 00 00 00    	subl   \$0x89,\(%rax\)
  *[a-f0-9]+:	81 28 34 12 00 00    	subl   \$0x1234,\(%rax\)
  *[a-f0-9]+:	81 28 78 56 34 12    	subl   \$0x12345678,\(%rax\)
- *[a-f0-9]+:	0f 07                	sysret *
+ *[a-f0-9]+:	0f 07                	sysretl *
  *[a-f0-9]+:	f7 00 89 00 00 00    	testl  \$0x89,\(%rax\)
  *[a-f0-9]+:	f7 00 34 12 00 00    	testl  \$0x1234,\(%rax\)
  *[a-f0-9]+:	f7 00 78 56 34 12    	testl  \$0x12345678,\(%rax\)
diff --git a/gas/testsuite/gas/i386/x86-64-intel64.d b/gas/testsuite/gas/i386/x86-64-intel64.d
index 10c820f8dd2..496e2e50fab 100644
--- a/gas/testsuite/gas/i386/x86-64-intel64.d
+++ b/gas/testsuite/gas/i386/x86-64-intel64.d
@@ -15,7 +15,7 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 ff 18             	rex\.W lcall \*\(%rax\)
 [ 	]*[a-f0-9]+:	48 ff 29             	rex\.W ljmp \*\(%rcx\)
 [ 	]*[a-f0-9]+:	0f 05                	syscall 
-[ 	]*[a-f0-9]+:	0f 07                	sysret 
+[ 	]*[a-f0-9]+:	0f 07                	sysretl 
 [ 	]*[a-f0-9]+:	48 0f 07             	sysretq *
 [ 	]*[a-f0-9]+:	48 0f b4 01          	lfs    \(%rcx\),%rax
 [ 	]*[a-f0-9]+:	48 0f b4 01          	lfs    \(%rcx\),%rax
diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d
index 10cde816386..ab55d2ca350 100644
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -321,7 +321,7 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f 00 c8          	str    %ax
 [ 	]*[a-f0-9]+:	0f 00 08             	str    \(%rax\)
 [ 	]*[a-f0-9]+:	0f 05                	syscall 
-[ 	]*[a-f0-9]+:	0f 07                	sysret 
+[ 	]*[a-f0-9]+:	0f 07                	sysretl 
 [ 	]*[a-f0-9]+:	48 0f 07             	sysretq *
 [ 	]*[a-f0-9]+:	0f 01 f8             	swapgs 
 [ 	]*[a-f0-9]+:	66 68 22 22          	pushw  \$0x2222
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f1b427318d5..3c74fbf3d87 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/26704
+	* i386-dis.c (putop): Always display suffix for %LQ in 64bit.
+
 2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR binutils/26705
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index f4f35bc8f1a..4d8f4f4cc2b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -10870,7 +10870,7 @@ putop (const char *in_template, int sizeflag)
 		  USED_REX (REX_W);
 		  *obufp++ = 'q';
 		}
-	      else if((address_mode == mode_64bit && need_modrm && cond)
+	      else if((address_mode == mode_64bit && cond)
 		      || (sizeflag & SUFFIX_ALWAYS))
 		*obufp++ = intel_syntax? 'd' : 'l';
 	    }


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