[binutils-gdb] x86/Intel: improve diagnostics

[Jan Beulich]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=5de4d9ef71d5233026d8e9fbd74ec87cca4d220a

commit 5de4d9ef71d5233026d8e9fbd74ec87cca4d220a
Author: Jan Beulich <jbeulich@suse.com>
Date:   Wed Feb 12 10:58:42 2020 +0100

    x86/Intel: improve diagnostics
    
    The diagnostics issued by check_*_reg() are pretty AT&T-centric. Re-use
    logic already used for SIMD memory operand size checking also for ones
    where GPRs would alternatively also be allowed. (There's certainly room
    for further improvement here.)

Diff:
---
 gas/ChangeLog        | 6 ++++++
 gas/config/tc-i386.c | 9 +++++----
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6eb7f4f..11b20f7 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2020-02-12  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (operand_type_register_match): Also fall
+	through initial two if()-s when the template allows for a GPR
+	operand. Adjust comment.
+
 2020-02-11  Jan Beulich  <jbeulich@suse.com>
 
 	(struct _i386_insn): New field "short_form".
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index fec132a..1cb5a27 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2248,8 +2248,7 @@ mismatch:
 
 /* If given types g0 and g1 are registers they must be of the same type
    unless the expected operand type register overlap is null.
-   Memory operand size of certain SIMD instructions is also being checked
-   here.  */
+   Some Intel syntax memory operand size checking also happens here.  */
 
 static INLINE int
 operand_type_register_match (i386_operand_type g0,
@@ -2261,14 +2260,16 @@ operand_type_register_match (i386_operand_type g0,
       && g0.bitfield.class != RegSIMD
       && (!operand_type_check (g0, anymem)
 	  || g0.bitfield.unspecified
-	  || t0.bitfield.class != RegSIMD))
+	  || (t0.bitfield.class != Reg
+	      && t0.bitfield.class != RegSIMD)))
     return 1;
 
   if (g1.bitfield.class != Reg
       && g1.bitfield.class != RegSIMD
       && (!operand_type_check (g1, anymem)
 	  || g1.bitfield.unspecified
-	  || t1.bitfield.class != RegSIMD))
+	  || (t1.bitfield.class != Reg
+	      && t1.bitfield.class != RegSIMD)))
     return 1;
 
   if (g0.bitfield.byte == g1.bitfield.byte