https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b83b4b138298d2a6bfab11f533d7e315c0a1c97b
commit b83b4b138298d2a6bfab11f533d7e315c0a1c97b
Author: Sudakshina Das <sudi.das@arm.com>
Date: Wed May 1 17:14:01 2019 +0100
[BINUTILS, AArch64] Enable Transactional Memory Extension
This patch enables the new Transactional Memory Extension added recently
as part of Arm's new architecture technologies.
We introduce a new optional extension "tme" to enable this. The following
instructions are part of the extension:
* tstart <Xt>
* ttest <Xt>
* tcommit
* tcancel #<imm>
The ISA for the above can be found here:
https://developer.arm.com/docs/ddi0602/latest/base-instructions-alphabetic-order
*** gas/ChangeLog ***
2019-05-01 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (parse_operands): Add case for
AARCH64_OPND_TME_UIMM16.
(aarch64_features): Add "tme".
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/tme-invalid.d: New test.
* testsuite/gas/aarch64/tme-invalid.l: New test.
* testsuite/gas/aarch64/tme-invalid.s: New test.
* testsuite/gas/aarch64/tme.d: New test.
* testsuite/gas/aarch64/tme.s: New test.
*** include/ChangeLog ***
2019-05-01 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_TME): New.
(enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
*** opcodes/ChangeLog ***
2019-05-01 Sudakshina Das <sudi.das@arm.com>
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
* aarch64-opc.c (operand_general_constraint_met_p): Add case for
AARCH64_OPND_TME_UIMM16.
(aarch64_print_operand): Likewise.
* aarch64-tbl.h (QL_IMM_NIL): New.
(TME): New.
(_TME_INSN): New.
(struct aarch64_opcode): Add tstart, tcommit, ttest and tcancel.
Diff:
---
gas/ChangeLog | 12 +
gas/config/tc-aarch64.c | 3 +
gas/doc/c-aarch64.texi | 2 +
gas/testsuite/gas/aarch64/tme-invalid.d | 4 +
gas/testsuite/gas/aarch64/tme-invalid.l | 26 +
gas/testsuite/gas/aarch64/tme-invalid.s | 28 +
gas/testsuite/gas/aarch64/tme.d | 22 +
gas/testsuite/gas/aarch64/tme.s | 14 +
include/ChangeLog | 5 +
include/opcode/aarch64.h | 4 +-
opcodes/ChangeLog | 13 +
opcodes/aarch64-asm-2.c | 275 ++---
opcodes/aarch64-dis-2.c | 1895 ++++++++++++++++---------------
opcodes/aarch64-opc-2.c | 19 +-
opcodes/aarch64-opc.c | 2 +
opcodes/aarch64-tbl.h | 18 +
16 files changed, 1255 insertions(+), 1087 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9f5e9ba..2dd2cf3 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,15 @@
+2019-05-01 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (parse_operands): Add case for
+ AARCH64_OPND_TME_UIMM16.
+ (aarch64_features): Add "tme".
+ * doc/c-aarch64.texi: Document the same.
+ * testsuite/gas/aarch64/tme-invalid.d: New test.
+ * testsuite/gas/aarch64/tme-invalid.l: New test.
+ * testsuite/gas/aarch64/tme-invalid.s: New test.
+ * testsuite/gas/aarch64/tme.d: New test.
+ * testsuite/gas/aarch64/tme.s: New test.
+
2019-04-29 John Darrington <john@darrington.wattle.id.au>
* testsuite/gas/s12z/truncated.d: New file.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 0f03a28..7b5f1b1 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5752,6 +5752,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_CCMP_IMM:
case AARCH64_OPND_SIMM5:
case AARCH64_OPND_FBITS:
+ case AARCH64_OPND_TME_UIMM16:
case AARCH64_OPND_UIMM4:
case AARCH64_OPND_UIMM4_ADDG:
case AARCH64_OPND_UIMM10:
@@ -8845,6 +8846,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
AARCH64_FEATURE (AARCH64_FEATURE_F16
| AARCH64_FEATURE_SIMD
| AARCH64_FEATURE_COMPNUM, 0)},
+ {"tme", AARCH64_FEATURE (AARCH64_FEATURE_TME, 0),
+ AARCH64_ARCH_NONE},
{"compnum", AARCH64_FEATURE (AARCH64_FEATURE_COMPNUM, 0),
AARCH64_FEATURE (AARCH64_FEATURE_F16
| AARCH64_FEATURE_SIMD, 0)},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 445fb2f..3614deb 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -194,6 +194,8 @@ automatically cause those extensions to be disabled.
@tab Enable Speculative Store Bypassing Safe state read and write.
@item @code{memtag} @tab ARMv8.5-A @tab No
@tab Enable ARMv8.5-A Memory Tagging Extensions.
+@item @code{tme} @tab ARMv8-A @tab No
+ @tab Enable Transactional Memory Extensions.
@end multitable
@node AArch64 Syntax
diff --git a/gas/testsuite/gas/aarch64/tme-invalid.d b/gas/testsuite/gas/aarch64/tme-invalid.d
new file mode 100644
index 0000000..6ff73e9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tme-invalid.d
@@ -0,0 +1,4 @@
+#name: Invalid TME instructions
+#as: -march=armv8-a+tme
+#source: tme-invalid.s
+#error_output: tme-invalid.l
diff --git a/gas/testsuite/gas/aarch64/tme-invalid.l b/gas/testsuite/gas/aarch64/tme-invalid.l
new file mode 100644
index 0000000..22f60c5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tme-invalid.l
@@ -0,0 +1,26 @@
+[^:]*: Assembler messages:
+.*: Error: immediate value out of range 0 to 65535 at operand 1 -- `tcancel -1'
+.*: Error: immediate value out of range 0 to 65535 at operand 1 -- `tcancel 65536'
+.*: Error: immediate value out of range 0 to 65535 at operand 1 -- `tcancel 0x10000'
+.*: Error: constant expression required at operand 1 -- `tcancel 1b'
+.*: Error: immediate operand required at operand 1 -- `tcancel w1'
+.*: Error: immediate operand required at operand 1 -- `tcancel x1'
+.*: Error: immediate operand required at operand 1 -- `tcancel w23'
+.*: Error: immediate operand required at operand 1 -- `tcancel x23'
+.*: Error: immediate operand required at operand 1 -- `tcancel wzr'
+.*: Error: immediate operand required at operand 1 -- `tcancel xzr'
+.*: Error: constant expression required at operand 1 -- `tcancel wsp'
+.*: Error: constant expression required at operand 1 -- `tcancel xsp'
+.*: Error: constant expression required at operand 1 -- `tcancel sp'
+.*: Error: operand 1 must be an integer register -- `tstart'
+.*: Error: operand mismatch -- `tstart w1'
+.*: Info: did you mean this\?
+.*: Info: tstart x1
+.*: Error: operand mismatch -- `tstart w17'
+.*: Info: did you mean this\?
+.*: Info: tstart x17
+.*: Error: operand mismatch -- `tstart wzr'
+.*: Info: did you mean this\?
+.*: Info: tstart xzr
+.*: Error: operand 1 must be an integer register -- `tstart wsp'
+.*: Error: operand 1 must be an integer register -- `tstart xsp'
diff --git a/gas/testsuite/gas/aarch64/tme-invalid.s b/gas/testsuite/gas/aarch64/tme-invalid.s
new file mode 100644
index 0000000..13d8e3b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tme-invalid.s
@@ -0,0 +1,28 @@
+// Instructions in this file are invalid.
+// Other files provide more extensive testing of valid instructions;
+
+# tcancel only accept 16bit unsigned constant immediate.
+1:
+ tcancel -1
+ tcancel 65536
+ tcancel 0x10000
+ tcancel 1b
+
+# tcancel doesn't accept any register.
+ tcancel w1
+ tcancel x1
+ tcancel w23
+ tcancel x23
+ tcancel wzr
+ tcancel xzr
+ tcancel wsp
+ tcancel xsp
+ tcancel sp
+
+# tstart must has one X register operand.
+ tstart
+ tstart w1
+ tstart w17
+ tstart wzr
+ tstart wsp
+ tstart xsp
diff --git a/gas/testsuite/gas/aarch64/tme.d b/gas/testsuite/gas/aarch64/tme.d
new file mode 100644
index 0000000..24d34ea
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tme.d
@@ -0,0 +1,22 @@
+#as: -march=armv8-a+tme
+#objdump: -dr
+
+.* file format .*
+
+Disassembly of section .*:
+
+.* <.*>:
+.*: d5233060 tstart x0
+.*: d5233060 tstart x0
+.*: d523306f tstart x15
+.*: d523306f tstart x15
+.*: d523307e tstart x30
+.*: d523307e tstart x30
+.*: d503307f tcommit
+.*: d503307f tcommit
+.*: d5233160 ttest x0
+.*: d523317e ttest x30
+.*: d4600000 tcancel #0
+.*: d47fffe0 tcancel #65535
+.*: d47fffe0 tcancel #65535
+.*: d4600140 tcancel #10
diff --git a/gas/testsuite/gas/aarch64/tme.s b/gas/testsuite/gas/aarch64/tme.s
new file mode 100644
index 0000000..45c861e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tme.s
@@ -0,0 +1,14 @@
+ tstart x0
+ TSTART X0
+ tstart x15
+ TSTART X15
+ tstart x30
+ TSTART X30
+ tcommit
+ TCOMMIT
+ ttest x0
+ TTEST X30
+ tcancel 0
+ TCANCEL 65535
+ tcancel 0xffff
+ TCANCEL 0XA
diff --git a/include/ChangeLog b/include/ChangeLog
index 1f225b8..1aab82a 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2019-05-01 Sudakshina Das <sudi.das@arm.com>
+
+ * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
+ (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
+
2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
Faraz Shahbazker <fshahbazker@wavecomp.com>
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 5dc5fb7..c456f67 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -86,7 +86,8 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_SSBS 0x800000000000ULL
/* Memory Tagging Extension. */
#define AARCH64_FEATURE_MEMTAG 0x1000000000000ULL
-
+/* Transactional Memory Extension. */
+#define AARCH64_FEATURE_TME 0x2000000000000ULL
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -409,6 +410,7 @@ enum aarch64_opnd
AARCH64_OPND_SVE_ZnxN, /* SVE vector register list in Zn. */
AARCH64_OPND_SVE_Zt, /* SVE vector register in Zt. */
AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */
+ AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */
AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */
};
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 1c9bdbc..2328f18 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,16 @@
+2019-05-01 Sudakshina Das <sudi.das@arm.com>
+
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+ * aarch64-opc.c (operand_general_constraint_met_p): Add case for
+ AARCH64_OPND_TME_UIMM16.
+ (aarch64_print_operand): Likewise.
+ * aarch64-tbl.h (QL_IMM_NIL): New.
+ (TME): New.
+ (_TME_INSN): New.
+ (struct aarch64_opcode): Add tstart, tcommit, ttest and tcancel.
+
2019-04-29 John Darrington <john@darrington.wattle.id.au>
* s12z-opc.c (shift_discrim): Return OP_INVALID when reading fails.
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index f361556..c7f8e8b 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -426,165 +426,165 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1183: /* movz */
value = 1183; /* --> movz. */
break;
- case 1230: /* autibsp */
- case 1229: /* autibz */
- case 1228: /* autiasp */
- case 1227: /* autiaz */
- case 1226: /* pacibsp */
- case 1225: /* pacibz */
- case 1224: /* paciasp */
- case 1223: /* paciaz */
- case 1204: /* psb */
- case 1203: /* esb */
- case 1202: /* autib1716 */
- case 1201: /* autia1716 */
- case 1200: /* pacib1716 */
- case 1199: /* pacia1716 */
- case 1198: /* xpaclri */
- case 1197: /* sevl */
- case 1196: /* sev */
- case 1195: /* wfi */
- case 1194: /* wfe */
- case 1193: /* yield */
- case 1192: /* bti */
- case 1191: /* csdb */
- case 1190: /* nop */
- case 1189: /* hint */
- value = 1189; /* --> hint. */
- break;
- case 1208: /* pssbb */
- case 1207: /* ssbb */
- case 1206: /* dsb */
- value = 1206; /* --> dsb. */
- break;
- case 1219: /* cpp */
- case 1218: /* dvp */
- case 1217: /* cfp */
- case 1216: /* tlbi */
- case 1215: /* ic */
- case 1214: /* dc */
- case 1213: /* at */
- case 1212: /* sys */
- value = 1212; /* --> sys. */
- break;
- case 2028: /* bic */
- case 1278: /* and */
- value = 1278; /* --> and. */
+ case 1234: /* autibsp */
+ case 1233: /* autibz */
+ case 1232: /* autiasp */
+ case 1231: /* autiaz */
+ case 1230: /* pacibsp */
+ case 1229: /* pacibz */
+ case 1228: /* paciasp */
+ case 1227: /* paciaz */
+ case 1208: /* psb */
+ case 1207: /* esb */
+ case 1206: /* autib1716 */
+ case 1205: /* autia1716 */
+ case 1204: /* pacib1716 */
+ case 1203: /* pacia1716 */
+ case 1202: /* xpaclri */
+ case 1201: /* sevl */
+ case 1200: /* sev */
+ case 1199: /* wfi */
+ case 1198: /* wfe */
+ case 1197: /* yield */
+ case 1196: /* bti */
+ case 1195: /* csdb */
+ case 1194: /* nop */
+ case 1193: /* hint */
+ value = 1193; /* --> hint. */
+ break;
+ case 1212: /* pssbb */
+ case 1211: /* ssbb */
+ case 1210: /* dsb */
+ value = 1210; /* --> dsb. */
+ break;
+ case 1223: /* cpp */
+ case 1222: /* dvp */
+ case 1221: /* cfp */
+ case 1220: /* tlbi */
+ case 1219: /* ic */
+ case 1218: /* dc */
+ case 1217: /* at */
+ case 1216: /* sys */
+ value = 1216; /* --> sys. */
+ break;
+ case 2032: /* bic */
+ case 1282: /* and */
+ value = 1282; /* --> and. */
+ break;
+ case 1265: /* mov */
+ case 1284: /* and */
+ value = 1284; /* --> and. */
+ break;
+ case 1269: /* movs */
+ case 1285: /* ands */
+ value = 1285; /* --> ands. */
+ break;
+ case 2033: /* cmple */
+ case 1320: /* cmpge */
+ value = 1320; /* --> cmpge. */
+ break;
+ case 2036: /* cmplt */
+ case 1323: /* cmpgt */
+ value = 1323; /* --> cmpgt. */
+ break;
+ case 2034: /* cmplo */
+ case 1325: /* cmphi */
+ value = 1325; /* --> cmphi. */
+ break;
+ case 2035: /* cmpls */
+ case 1328: /* cmphs */
+ value = 1328; /* --> cmphs. */
break;
- case 1261: /* mov */
- case 1280: /* and */
- value = 1280; /* --> and. */
- break;
- case 1265: /* movs */
- case 1281: /* ands */
- value = 1281; /* --> ands. */
+ case 1262: /* mov */
+ case 1350: /* cpy */
+ value = 1350; /* --> cpy. */
break;
- case 2029: /* cmple */
- case 1316: /* cmpge */
- value = 1316; /* --> cmpge. */
+ case 1264: /* mov */
+ case 1351: /* cpy */
+ value = 1351; /* --> cpy. */
break;
- case 2032: /* cmplt */
- case 1319: /* cmpgt */
- value = 1319; /* --> cmpgt. */
+ case 2043: /* fmov */
+ case 1267: /* mov */
+ case 1352: /* cpy */
+ value = 1352; /* --> cpy. */
break;
- case 2030: /* cmplo */
- case 1321: /* cmphi */
- value = 1321; /* --> cmphi. */
+ case 1257: /* mov */
+ case 1364: /* dup */
+ value = 1364; /* --> dup. */
break;
- case 2031: /* cmpls */
- case 1324: /* cmphs */
- value = 1324; /* --> cmphs. */
+ case 1259: /* mov */
+ case 1256: /* mov */
+ case 1365: /* dup */
+ value = 1365; /* --> dup. */
break;
- case 1258: /* mov */
- case 1346: /* cpy */
- value = 1346; /* --> cpy. */
+ case 2042: /* fmov */
+ case 1261: /* mov */
+ case 1366: /* dup */
+ value = 1366; /* --> dup. */
break;
case 1260: /* mov */
- case 1347: /* cpy */
- value = 1347; /* --> cpy. */
- break;
- case 2039: /* fmov */
- case 1263: /* mov */
- case 1348: /* cpy */
- value = 1348; /* --> cpy. */
- break;
- case 1253: /* mov */
- case 1360: /* dup */
- value = 1360; /* --> dup. */
- break;
- case 1255: /* mov */
- case 1252: /* mov */
- case 1361: /* dup */
- value = 1361; /* --> dup. */
- break;
- case 2038: /* fmov */
- case 1257: /* mov */
- case 1362: /* dup */
- value = 1362; /* --> dup. */
+ case 1367: /* dupm */
+ value = 1367; /* --> dupm. */
break;
- case 1256: /* mov */
- case 1363: /* dupm */
- value = 1363; /* --> dupm. */
- break;
- case 2033: /* eon */
- case 1365: /* eor */
- value = 1365; /* --> eor. */
+ case 2037: /* eon */
+ case 1369: /* eor */
+ value = 1369; /* --> eor. */
break;
- case 1266: /* not */
- case 1367: /* eor */
- value = 1367; /* --> eor. */
+ case 1270: /* not */
+ case 1371: /* eor */
+ value = 1371; /* --> eor. */
break;
- case 1267: /* nots */
- case 1368: /* eors */
- value = 1368; /* --> eors. */
+ case 1271: /* nots */
+ case 1372: /* eors */
+ value = 1372; /* --> eors. */
break;
- case 2034: /* facle */
- case 1373: /* facge */
- value = 1373; /* --> facge. */
+ case 2038: /* facle */
+ case 1377: /* facge */
+ value = 1377; /* --> facge. */
break;
- case 2035: /* faclt */
- case 1374: /* facgt */
- value = 1374; /* --> facgt. */
+ case 2039: /* faclt */
+ case 1378: /* facgt */
+ value = 1378; /* --> facgt. */
break;
- case 2036: /* fcmle */
- case 1387: /* fcmge */
- value = 1387; /* --> fcmge. */
+ case 2040: /* fcmle */
+ case 1391: /* fcmge */
+ value = 1391; /* --> fcmge. */
break;
- case 2037: /* fcmlt */
- case 1389: /* fcmgt */
- value = 1389; /* --> fcmgt. */
+ case 2041: /* fcmlt */
+ case 1393: /* fcmgt */
+ value = 1393; /* --> fcmgt. */
break;
- case 1250: /* fmov */
- case 1395: /* fcpy */
- value = 1395; /* --> fcpy. */
+ case 1254: /* fmov */
+ case 1399: /* fcpy */
+ value = 1399; /* --> fcpy. */
break;
- case 1249: /* fmov */
- case 1418: /* fdup */
- value = 1418; /* --> fdup. */
+ case 1253: /* fmov */
+ case 1422: /* fdup */
+ value = 1422; /* --> fdup. */
break;
- case 1251: /* mov */
- case 1749: /* orr */
- value = 1749; /* --> orr. */
+ case 1255: /* mov */
+ case 1753: /* orr */
+ value = 1753; /* --> orr. */
break;
- case 2040: /* orn */
- case 1750: /* orr */
- value = 1750; /* --> orr. */
+ case 2044: /* orn */
+ case 1754: /* orr */
+ value = 1754; /* --> orr. */
break;
- case 1254: /* mov */
- case 1752: /* orr */
- value = 1752; /* --> orr. */
+ case 1258: /* mov */
+ case 1756: /* orr */
+ value = 1756; /* --> orr. */
break;
- case 1264: /* movs */
- case 1753: /* orrs */
- value = 1753; /* --> orrs. */
+ case 1268: /* movs */
+ case 1757: /* orrs */
+ value = 1757; /* --> orrs. */
break;
- case 1259: /* mov */
- case 1815: /* sel */
- value = 1815; /* --> sel. */
+ case 1263: /* mov */
+ case 1819: /* sel */
+ value = 1819; /* --> sel. */
break;
- case 1262: /* mov */
- case 1816: /* sel */
- value = 1816; /* --> sel. */
+ case 1266: /* mov */
+ case 1820: /* sel */
+ value = 1820; /* --> sel. */
break;
default: return NULL;
}
@@ -660,7 +660,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 32:
case 33:
case 34:
- case 199:
+ case 200:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 35:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -704,6 +704,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 179:
case 180:
case 181:
+ case 199:
return aarch64_ins_imm (self, info, code, inst, errors);
case 43:
case 44:
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index b47473d..ee7dabc 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -2368,7 +2368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2082;
+ return 2086;
}
else
{
@@ -2376,7 +2376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2090;
+ return 2094;
}
}
else
@@ -2387,7 +2387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2086;
+ return 2090;
}
else
{
@@ -2395,7 +2395,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2093;
+ return 2097;
}
}
}
@@ -2475,7 +2475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2083;
+ return 2087;
}
else
{
@@ -2483,7 +2483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2091;
+ return 2095;
}
}
else
@@ -2494,7 +2494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2087;
+ return 2091;
}
else
{
@@ -2502,7 +2502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2094;
+ return 2098;
}
}
}
@@ -2585,7 +2585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2085;
+ return 2089;
}
else
{
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2092;
+ return 2096;
}
}
else
@@ -2602,7 +2602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2089;
+ return 2093;
}
}
else
@@ -2613,7 +2613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2084;
+ return 2088;
}
else
{
@@ -2621,7 +2621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2088;
+ return 2092;
}
}
}
@@ -3107,7 +3107,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2080;
+ return 2084;
}
else
{
@@ -3115,7 +3115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2081;
+ return 2085;
}
}
else
@@ -3261,7 +3261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2079;
+ return 2083;
}
else
{
@@ -3799,7 +3799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000000000xxxxxxxxxxxxx
add. */
- return 1271;
+ return 1275;
}
else
{
@@ -3807,7 +3807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010000000xxxxxxxxxxxxx
mul. */
- return 1740;
+ return 1744;
}
}
else
@@ -3818,7 +3818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001000000xxxxxxxxxxxxx
smax. */
- return 1819;
+ return 1823;
}
else
{
@@ -3826,7 +3826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011000000xxxxxxxxxxxxx
orr. */
- return 1751;
+ return 1755;
}
}
}
@@ -3838,7 +3838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0100000xxxxxxxxxxxxx
sdiv. */
- return 1810;
+ return 1814;
}
else
{
@@ -3846,7 +3846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1100000xxxxxxxxxxxxx
sabd. */
- return 1801;
+ return 1805;
}
}
}
@@ -3860,7 +3860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0010000xxxxxxxxxxxxx
smulh. */
- return 1824;
+ return 1828;
}
else
{
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001010000xxxxxxxxxxxxx
smin. */
- return 1822;
+ return 1826;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011010000xxxxxxxxxxxxx
and. */
- return 1279;
+ return 1283;
}
}
}
@@ -3888,7 +3888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx110000xxxxxxxxxxxxx
sdivr. */
- return 1811;
+ return 1815;
}
}
}
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0001000xxxxxxxxxxxxx
sub. */
- return 1940;
+ return 1944;
}
else
{
@@ -3914,7 +3914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001001000xxxxxxxxxxxxx
umax. */
- return 1968;
+ return 1972;
}
else
{
@@ -3922,7 +3922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011001000xxxxxxxxxxxxx
eor. */
- return 1366;
+ return 1370;
}
}
}
@@ -3934,7 +3934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101000xxxxxxxxxxxxx
udiv. */
- return 1962;
+ return 1966;
}
else
{
@@ -3942,7 +3942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1101000xxxxxxxxxxxxx
uabd. */
- return 1953;
+ return 1957;
}
}
}
@@ -3958,7 +3958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011000xxxxxxxxxxxxx
subr. */
- return 1942;
+ return 1946;
}
else
{
@@ -3966,7 +3966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011000xxxxxxxxxxxxx
umulh. */
- return 1973;
+ return 1977;
}
}
else
@@ -3977,7 +3977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001011000xxxxxxxxxxxxx
umin. */
- return 1971;
+ return 1975;
}
else
{
@@ -3985,7 +3985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011011000xxxxxxxxxxxxx
bic. */
- return 1291;
+ return 1295;
}
}
}
@@ -3995,7 +3995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111000xxxxxxxxxxxxx
udivr. */
- return 1963;
+ return 1967;
}
}
}
@@ -4008,7 +4008,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx000xxxxxxxxxxxxx
ld1sb. */
- return 1553;
+ return 1557;
}
else
{
@@ -4016,7 +4016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1564;
+ return 1568;
}
}
}
@@ -4028,7 +4028,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx000xxxxxxxxxxxxx
ld1sb. */
- return 1557;
+ return 1561;
}
else
{
@@ -4040,7 +4040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1812;
+ return 1816;
}
else
{
@@ -4048,7 +4048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx000xx1xxxxxxxxxx
udot. */
- return 1964;
+ return 1968;
}
}
else
@@ -4057,7 +4057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1568;
+ return 1572;
}
}
}
@@ -4078,7 +4078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000000xxxxxxxxxx
add. */
- return 1269;
+ return 1273;
}
else
{
@@ -4086,7 +4086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000100xxxxxxxxxx
sqadd. */
- return 1826;
+ return 1830;
}
}
else
@@ -4095,7 +4095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x10xxxxxxxxxx
sqsub. */
- return 1856;
+ return 1860;
}
}
else
@@ -4108,7 +4108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000001xxxxxxxxxx
sub. */
- return 1938;
+ return 1942;
}
else
{
@@ -4116,7 +4116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000101xxxxxxxxxx
uqadd. */
- return 1974;
+ return 1978;
}
}
else
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x11xxxxxxxxxx
uqsub. */
- return 2004;
+ return 2008;
}
}
}
@@ -4137,7 +4137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1759;
+ return 1763;
}
else
{
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1565;
+ return 1569;
}
}
}
@@ -4157,7 +4157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1760;
+ return 1764;
}
else
{
@@ -4171,7 +4171,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1813;
+ return 1817;
}
else
{
@@ -4179,7 +4179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1814;
+ return 1818;
}
}
else
@@ -4190,7 +4190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000xx1xxxxxxxxxx
udot. */
- return 1965;
+ return 1969;
}
else
{
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000xx1xxxxxxxxxx
udot. */
- return 1966;
+ return 1970;
}
}
}
@@ -4208,7 +4208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x1xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1569;
+ return 1573;
}
}
}
@@ -4234,7 +4234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0000x0100xxxxxxxxxxxxx
asr. */
- return 1287;
+ return 1291;
}
else
{
@@ -4242,7 +4242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0100x0100xxxxxxxxxxxxx
asr. */
- return 1285;
+ return 1289;
}
}
else
@@ -4251,7 +4251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x10x0100xxxxxxxxxxxxx
asr. */
- return 1286;
+ return 1290;
}
}
else
@@ -4262,7 +4262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx00x1x0100xxxxxxxxxxxxx
asrd. */
- return 1288;
+ return 1292;
}
else
{
@@ -4270,7 +4270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx01x1x0100xxxxxxxxxxxxx
asrr. */
- return 1289;
+ return 1293;
}
}
}
@@ -4288,7 +4288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000001100xxxxxxxxxxxxx
lsr. */
- return 1731;
+ return 1735;
}
else
{
@@ -4296,7 +4296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010001100xxxxxxxxxxxxx
lsr. */
- return 1729;
+ return 1733;
}
}
else
@@ -4305,7 +4305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1001100xxxxxxxxxxxxx
lsr. */
- return 1730;
+ return 1734;
}
}
else
@@ -4314,7 +4314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx101100xxxxxxxxxxxxx
lsrr. */
- return 1732;
+ return 1736;
}
}
else
@@ -4329,7 +4329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011100xxxxxxxxxxxxx
lsl. */
- return 1725;
+ return 1729;
}
else
{
@@ -4337,7 +4337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011100xxxxxxxxxxxxx
lsl. */
- return 1723;
+ return 1727;
}
}
else
@@ -4346,7 +4346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1011100xxxxxxxxxxxxx
lsl. */
- return 1724;
+ return 1728;
}
}
else
@@ -4355,7 +4355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111100xxxxxxxxxxxxx
lslr. */
- return 1726;
+ return 1730;
}
}
}
@@ -4370,7 +4370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1000x0xxxxxxxxxx
asr. */
- return 1283;
+ return 1287;
}
else
{
@@ -4378,7 +4378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1001x0xxxxxxxxxx
asr. */
- return 1284;
+ return 1288;
}
}
else
@@ -4391,7 +4391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100001xxxxxxxxxx
lsr. */
- return 1727;
+ return 1731;
}
else
{
@@ -4399,7 +4399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100101xxxxxxxxxx
lsr. */
- return 1728;
+ return 1732;
}
}
else
@@ -4410,7 +4410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100011xxxxxxxxxx
lsl. */
- return 1721;
+ return 1725;
}
else
{
@@ -4418,7 +4418,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100111xxxxxxxxxx
lsl. */
- return 1722;
+ return 1726;
}
}
}
@@ -4434,7 +4434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x000xxxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1559;
+ return 1563;
}
else
{
@@ -4442,7 +4442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x010xxxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1572;
+ return 1576;
}
}
else
@@ -4453,7 +4453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx100xxxxxxxxxxxxx
ld1rb. */
- return 1529;
+ return 1533;
}
else
{
@@ -4461,7 +4461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx100xxxxxxxxxxxxx
ld1rsw. */
- return 1550;
+ return 1554;
}
}
}
@@ -4476,7 +4476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1558;
+ return 1562;
}
else
{
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1570;
+ return 1574;
}
}
else
@@ -4497,7 +4497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0001xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1563;
+ return 1567;
}
else
{
@@ -4505,7 +4505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0101xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1575;
+ return 1579;
}
}
else
@@ -4516,7 +4516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx100xxxxxxxxxxxxx
prfb. */
- return 1761;
+ return 1765;
}
else
{
@@ -4524,7 +4524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0111xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1571;
+ return 1575;
}
}
}
@@ -4545,7 +4545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx010xxxxxxxxxxxxx
mla. */
- return 1734;
+ return 1738;
}
else
{
@@ -4555,7 +4555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1495;
+ return 1499;
}
else
{
@@ -4563,7 +4563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1515;
+ return 1519;
}
}
}
@@ -4575,7 +4575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1500;
+ return 1504;
}
else
{
@@ -4583,7 +4583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1520;
+ return 1524;
}
}
}
@@ -4603,7 +4603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010000xxxxxxxxxx
index. */
- return 1486;
+ return 1490;
}
else
{
@@ -4611,7 +4611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010001xxxxxxxxxx
index. */
- return 1487;
+ return 1491;
}
}
else
@@ -4624,7 +4624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx01010xxxxxxxxxxx
addvl. */
- return 1273;
+ return 1277;
}
else
{
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx01010xxxxxxxxxxx
rdvl. */
- return 1795;
+ return 1799;
}
}
else
@@ -4641,7 +4641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x11xxxxx01010xxxxxxxxxxx
addpl. */
- return 1272;
+ return 1276;
}
}
}
@@ -4653,7 +4653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010x10xxxxxxxxxx
index. */
- return 1488;
+ return 1492;
}
else
{
@@ -4661,7 +4661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010x11xxxxxxxxxx
index. */
- return 1485;
+ return 1489;
}
}
}
@@ -4673,7 +4673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1779;
+ return 1783;
}
else
{
@@ -4681,7 +4681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1516;
+ return 1520;
}
}
}
@@ -4693,7 +4693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1781;
+ return 1785;
}
else
{
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x1xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1521;
+ return 1525;
}
}
}
@@ -4718,7 +4718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx110xxxxxxxxxxxxx
mad. */
- return 1733;
+ return 1737;
}
else
{
@@ -4734,7 +4734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x00xxxxxxxxxx
sqincw. */
- return 1853;
+ return 1857;
}
else
{
@@ -4744,7 +4744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x00xxxxxxxxxx
sqinch. */
- return 1847;
+ return 1851;
}
else
{
@@ -4752,7 +4752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x00xxxxxxxxxx
sqincd. */
- return 1844;
+ return 1848;
}
}
}
@@ -4764,7 +4764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x011xxxx110x00xxxxxxxxxx
incw. */
- return 1483;
+ return 1487;
}
else
{
@@ -4774,7 +4774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx110x00xxxxxxxxxx
inch. */
- return 1479;
+ return 1483;
}
else
{
@@ -4782,7 +4782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx110x00xxxxxxxxxx
incd. */
- return 1477;
+ return 1481;
}
}
}
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x10xxxxxxxxxx
sqdecw. */
- return 1839;
+ return 1843;
}
else
{
@@ -4805,7 +4805,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x10xxxxxxxxxx
sqdech. */
- return 1833;
+ return 1837;
}
else
{
@@ -4813,7 +4813,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x10xxxxxxxxxx
sqdecd. */
- return 1830;
+ return 1834;
}
}
}
@@ -4830,7 +4830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x01xxxxxxxxxx
uqincw. */
- return 2001;
+ return 2005;
}
else
{
@@ -4840,7 +4840,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x01xxxxxxxxxx
uqinch. */
- return 1995;
+ return 1999;
}
else
{
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x01xxxxxxxxxx
uqincd. */
- return 1992;
+ return 1996;
}
}
}
@@ -4860,7 +4860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x011xxxx110x01xxxxxxxxxx
decw. */
- return 1358;
+ return 1362;
}
else
{
@@ -4870,7 +4870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx110x01xxxxxxxxxx
dech. */
- return 1354;
+ return 1358;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx110x01xxxxxxxxxx
decd. */
- return 1352;
+ return 1356;
}
}
}
@@ -4891,7 +4891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x11xxxxxxxxxx
uqdecw. */
- return 1987;
+ return 1991;
}
else
{
@@ -4901,7 +4901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x11xxxxxxxxxx
uqdech. */
- return 1981;
+ return 1985;
}
else
{
@@ -4909,7 +4909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x11xxxxxxxxxx
uqdecd. */
- return 1978;
+ return 1982;
}
}
}
@@ -4928,7 +4928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0000xxxxx110xxxxxxxxxxxxx
prfb. */
- return 1758;
+ return 1762;
}
else
{
@@ -4936,7 +4936,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0100xxxxx110xxxxxxxxxxxxx
prfh. */
- return 1773;
+ return 1777;
}
}
else
@@ -4947,7 +4947,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0001xxxxx110xxxxxxxxxxxxx
ld1b. */
- return 1502;
+ return 1506;
}
else
{
@@ -4955,7 +4955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0101xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1524;
+ return 1528;
}
}
}
@@ -4967,7 +4967,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx110xxxxxxxxxxxxx
ld1rb. */
- return 1531;
+ return 1535;
}
else
{
@@ -4975,7 +4975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx110xxxxxxxxxxxxx
ld1rh. */
- return 1535;
+ return 1539;
}
}
}
@@ -4990,7 +4990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx110xxxxxxxxxxxxx
ld1b. */
- return 1501;
+ return 1505;
}
else
{
@@ -4998,7 +4998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1522;
+ return 1526;
}
}
else
@@ -5011,7 +5011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0001xxxxx110xxxxxxxxxxxxx
ld1b. */
- return 1507;
+ return 1511;
}
else
{
@@ -5019,7 +5019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0101xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1528;
+ return 1532;
}
}
else
@@ -5030,7 +5030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx110xxxxxxxxxxxxx
prfw. */
- [...]
[diff truncated at 100000 bytes]