[binutils-gdb] AArch64: Have -D override mapping symbol as documented.
Tamar Christina
tnfchris@sourceware.org
Mon Mar 25 15:07:00 GMT 2019
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=60df3720d77c8415158f3eaa166e0b7162f9d3b4
commit 60df3720d77c8415158f3eaa166e0b7162f9d3b4
Author: Tamar Christina <tamar.christina@arm.com>
Date: Mon Mar 25 12:14:37 2019 +0000
AArch64: Have -D override mapping symbol as documented.
The documentation for -D says that on Arm platforms -D should disassemble
data as instructions.
"If the target is an ARM architecture this switch also has the effect of
forcing the disassembler to decode pieces of data found in code sections
as if they were instructions. "
This makes it do as it says on the tincan so it's more consistent with
aarch32. The usecase here is for baremetal developers who have created
their instructions using .word directives instead if .insn.
Though for Linux users I do find this behavior somewhat non-optimal.
Perhaps there should be a new flag that just disassembles the values
following the actual mapping symbol?
binutils/ChangeLog:
* testsuite/binutils-all/aarch64/in-order-all.d: New test.
* testsuite/binutils-all/aarch64/out-of-order-all.d: New test.
* testsuite/binutils-all/aarch64/out-of-order.d:
opcodes/ChangeLog:
* aarch64-dis.c (print_insn_aarch64):
Implement override.
Diff:
---
binutils/ChangeLog | 6 +++
.../testsuite/binutils-all/aarch64/in-order-all.d | 43 ++++++++++++++++++++++
.../binutils-all/aarch64/out-of-order-all.d | 43 ++++++++++++++++++++++
.../testsuite/binutils-all/aarch64/out-of-order.d | 17 +--------
opcodes/ChangeLog | 5 +++
opcodes/aarch64-dis.c | 3 +-
6 files changed, 100 insertions(+), 17 deletions(-)
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 1c6c354..aad8bdd 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,5 +1,11 @@
2019-03-25 Tamar Christina <tamar.christina@arm.com>
+ * testsuite/binutils-all/aarch64/in-order-all.d: New test.
+ * testsuite/binutils-all/aarch64/out-of-order-all.d: New test.
+ * testsuite/binutils-all/aarch64/out-of-order.d:
+
+2019-03-25 Tamar Christina <tamar.christina@arm.com>
+
* testsuite/binutils-all/aarch64/in-order.d: New test.
* testsuite/binutils-all/aarch64/out-of-order.d: Disassemble data as
well.
diff --git a/binutils/testsuite/binutils-all/aarch64/in-order-all.d b/binutils/testsuite/binutils-all/aarch64/in-order-all.d
new file mode 100644
index 0000000..32f501b
--- /dev/null
+++ b/binutils/testsuite/binutils-all/aarch64/in-order-all.d
@@ -0,0 +1,43 @@
+#PROG: objcopy
+#source: out-of-order.s
+#ld: -e v1 -Ttext-segment=0x400000
+#objdump: -D
+#name: Check if disassembler can handle all sections in default order
+
+.*: +file format .*aarch64.*
+
+Disassembly of section \.func1:
+
+0000000000400000 <v1>:
+ 400000: 8b010000 add x0, x0, x1
+ 400004: 00000000 \.inst 0x00000000 ; undefined
+
+Disassembly of section \.func2:
+
+0000000000400008 <\.func2>:
+ 400008: 8b010000 add x0, x0, x1
+
+Disassembly of section \.func3:
+
+000000000040000c <\.func3>:
+ 40000c: 8b010000 add x0, x0, x1
+ 400010: 8b010000 add x0, x0, x1
+ 400014: 8b010000 add x0, x0, x1
+ 400018: 8b010000 add x0, x0, x1
+ 40001c: 8b010000 add x0, x0, x1
+ 400020: 00000000 \.inst 0x00000000 ; undefined
+
+Disassembly of section \.rodata:
+
+0000000000400024 <\.rodata>:
+ 400024: 00000004 \.inst 0x00000004 ; undefined
+
+Disassembly of section .global:
+
+0000000000410028 <__data_start>:
+ 410028: 00000001 \.inst 0x00000001 ; undefined
+ 41002c: 00000000 \.inst 0x00000000 ; undefined
+ 410030: 00000001 \.inst 0x00000001 ; undefined
+ 410034: 00000000 \.inst 0x00000000 ; undefined
+ 410038: 00000001 \.inst 0x00000001 ; undefined
+ 41003c: 00000000 \.inst 0x00000000 ; undefined
diff --git a/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d b/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d
new file mode 100644
index 0000000..3020def
--- /dev/null
+++ b/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d
@@ -0,0 +1,43 @@
+#PROG: objcopy
+#source: out-of-order.s
+#ld: -T out-of-order.T
+#objdump: -D
+#name: Check if disassembler can handle all sections in different order than header
+
+.*: +file format .*aarch64.*
+
+Disassembly of section \.global:
+
+00000000ffe00000 <\.global>:
+ ffe00000: 00000001 \.inst 0x00000001 ; undefined
+ ffe00004: 00000000 \.inst 0x00000000 ; undefined
+ ffe00008: 00000001 \.inst 0x00000001 ; undefined
+ ffe0000c: 00000000 \.inst 0x00000000 ; undefined
+ ffe00010: 00000001 \.inst 0x00000001 ; undefined
+ ffe00014: 00000000 \.inst 0x00000000 ; undefined
+
+Disassembly of section \.func2:
+
+0000000004018280 <\.func2>:
+ 4018280: 8b010000 add x0, x0, x1
+
+Disassembly of section \.func1:
+
+0000000004005000 <v1>:
+ 4005000: 8b010000 add x0, x0, x1
+ 4005004: 00000000 \.inst 0x00000000 ; undefined
+
+Disassembly of section \.func3:
+
+0000000004015000 <\.func3>:
+ 4015000: 8b010000 add x0, x0, x1
+ 4015004: 8b010000 add x0, x0, x1
+ 4015008: 8b010000 add x0, x0, x1
+ 401500c: 8b010000 add x0, x0, x1
+ 4015010: 8b010000 add x0, x0, x1
+ 4015014: 00000000 \.inst 0x00000000 ; undefined
+
+Disassembly of section \.rodata:
+
+0000000004015018 <\.rodata>:
+ 4015018: 00000004 \.inst 0x00000004 ; undefined
diff --git a/binutils/testsuite/binutils-all/aarch64/out-of-order.d b/binutils/testsuite/binutils-all/aarch64/out-of-order.d
index f78adec..410f37f 100644
--- a/binutils/testsuite/binutils-all/aarch64/out-of-order.d
+++ b/binutils/testsuite/binutils-all/aarch64/out-of-order.d
@@ -1,20 +1,10 @@
#PROG: objcopy
#ld: -T out-of-order.T
-#objdump: -D
+#objdump: -d
#name: Check if disassembler can handle sections in different order than header
.*: +file format .*aarch64.*
-Disassembly of section \.global:
-
-00000000ffe00000 <\.global>:
- ffe00000: 00000001 \.word 0x00000001
- ffe00004: 00000000 \.word 0x00000000
- ffe00008: 00000001 \.word 0x00000001
- ffe0000c: 00000000 \.word 0x00000000
- ffe00010: 00000001 \.word 0x00000001
- ffe00014: 00000000 \.word 0x00000000
-
Disassembly of section \.func2:
0000000004018280 <\.func2>:
@@ -35,8 +25,3 @@ Disassembly of section \.func3:
401500c: 8b010000 add x0, x0, x1
4015010: 8b010000 add x0, x0, x1
4015014: 00000000 \.word 0x00000000
-
-Disassembly of section \.rodata:
-
-0000000004015018 <\.rodata>:
- 4015018: 00000004 \.word 0x00000004
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index e5705d7..433e43f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
2019-03-25 Tamar Christina <tamar.christina@arm.com>
+ * aarch64-dis.c (print_insn_aarch64):
+ Implement override.
+
+2019-03-25 Tamar Christina <tamar.christina@arm.com>
+
* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
order.
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 1f931d0..eea649f 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -3433,7 +3433,8 @@ print_insn_aarch64 (bfd_vma pc,
else
last_type = type;
- if (last_type == MAP_DATA)
+ /* PR 10263: Disassemble data if requested to do so by the user. */
+ if (last_type == MAP_DATA && ((info->flags & DISASSEMBLE_DATA) == 0))
{
/* size was set above. */
info->bytes_per_chunk = size;
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