[binutils-gdb] x86/Intel: extend MOVDIRI testing
Jan Beulich
jbeulich@sourceware.org
Wed Dec 4 09:42:00 GMT 2019
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=77ad80922bf3042536fc41b19cc0bf230ea485b4
commit 77ad80922bf3042536fc41b19cc0bf230ea485b4
Author: Jan Beulich <jbeulich@suse.com>
Date: Wed Dec 4 10:41:43 2019 +0100
x86/Intel: extend MOVDIRI testing
Test also memory operands with operand size specifier, which was broken
prior to dc2be329b950 ("i386: Only check suffix in instruction
mnemonic"), due to the template not permitting any suffixes. Note that
this uncovered a disassembler issue, which is being fixed here as well.
Diff:
---
gas/ChangeLog | 11 +++++++++++
gas/testsuite/gas/i386/movdir-intel.d | 1 +
gas/testsuite/gas/i386/movdir.d | 1 +
gas/testsuite/gas/i386/movdir.s | 1 +
gas/testsuite/gas/i386/x86-64-movdir-intel.d | 3 +++
gas/testsuite/gas/i386/x86-64-movdir.d | 3 +++
gas/testsuite/gas/i386/x86-64-movdir.s | 3 +++
opcodes/ChangeLog | 4 ++++
opcodes/i386-dis.c | 2 +-
9 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 411d66f..b7d305f 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,16 @@
2019-12-04 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/i386/movdir.s: Add Intel syntax case with
+ operand size specifier.
+ * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases
+ with operand size specifier and wit 32-bit operands.
+ * testsuite/gas/i386/movdir-intel.d,
+ testsuite/gas/i386/movdir.d,
+ testsuite/gas/i386/x86-64-movdir-intel.d,
+ testsuite/gas/i386/x86-64-movdir.d: Adjust expectations.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
* config/tc-i386.c (process_suffix): Arrange for insns with a
single non-GPR register operand to not have its suffix guessed
from GPR operands. Extend DefaultSize handling to cover PUSH/POP
diff --git a/gas/testsuite/gas/i386/movdir-intel.d b/gas/testsuite/gas/i386/movdir-intel.d
index d6eab9c..be721ba 100644
--- a/gas/testsuite/gas/i386/movdir-intel.d
+++ b/gas/testsuite/gas/i386/movdir-intel.d
@@ -13,6 +13,7 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
#pass
diff --git a/gas/testsuite/gas/i386/movdir.d b/gas/testsuite/gas/i386/movdir.d
index 852b20d..c70b756 100644
--- a/gas/testsuite/gas/i386/movdir.d
+++ b/gas/testsuite/gas/i386/movdir.d
@@ -13,6 +13,7 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
#pass
diff --git a/gas/testsuite/gas/i386/movdir.s b/gas/testsuite/gas/i386/movdir.s
index 28dfa61..5ea4bb5 100644
--- a/gas/testsuite/gas/i386/movdir.s
+++ b/gas/testsuite/gas/i386/movdir.s
@@ -9,5 +9,6 @@ _start:
.intel_syntax noprefix
movdiri [ecx], eax
+ movdiri dword ptr [ecx], eax
movdir64b eax,[ecx]
movdir64b ax,[si]
diff --git a/gas/testsuite/gas/i386/x86-64-movdir-intel.d b/gas/testsuite/gas/i386/x86-64-movdir-intel.d
index f6c2548..0f3a5ab 100644
--- a/gas/testsuite/gas/i386/x86-64-movdir-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-movdir-intel.d
@@ -12,6 +12,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b rax,\[rcx\]
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b eax,\[ecx]
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[rcx\],eax
+[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[rcx\],eax
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b rax,\[rcx\]
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
diff --git a/gas/testsuite/gas/i386/x86-64-movdir.d b/gas/testsuite/gas/i386/x86-64-movdir.d
index fd7f4e5..2deab89 100644
--- a/gas/testsuite/gas/i386/x86-64-movdir.d
+++ b/gas/testsuite/gas/i386/x86-64-movdir.d
@@ -12,6 +12,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%rcx\)
+[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
diff --git a/gas/testsuite/gas/i386/x86-64-movdir.s b/gas/testsuite/gas/i386/x86-64-movdir.s
index f0fe267..6f9032d 100644
--- a/gas/testsuite/gas/i386/x86-64-movdir.s
+++ b/gas/testsuite/gas/i386/x86-64-movdir.s
@@ -8,6 +8,9 @@ _start:
movdir64b (%ecx),%eax
.intel_syntax noprefix
+ movdiri [rcx],eax
movdiri [rcx],rax
+ movdiri dword ptr [rcx],eax
+ movdiri qword ptr [rcx],rax
movdir64b rax,[rcx]
movdir64b eax,[ecx]
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 79f12e9..162ff04 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2019-12-04 Jan Beulich <jbeulich@suse.com>
+ * i386-dis.c (mod_table): Use Ev instead of Em for movdiri.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
* i386-opc.tbl (push, pop): Drop DefaultSize from GPR-only
forms.
(xbegin): Drop DefaultSize.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 6b08dd6..2a0e765 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -10522,7 +10522,7 @@ static const struct dis386 mod_table[][2] = {
},
{
/* MOD_0F38F9_PREFIX_0 */
- { "movdiri", { Em, Gv }, PREFIX_OPCODE },
+ { "movdiri", { Ev, Gv }, PREFIX_OPCODE },
},
{
/* MOD_62_32BIT */
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