[binutils-gdb] [BFD][AARCH64]Properly truncate no overflow checking relocation value for load/store immediate.
Renlin Li
renlin@sourceware.org
Wed Jun 20 13:48:00 GMT 2018
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b939d8a0dedbe0f0667500e1741e25baf03fe64c
commit b939d8a0dedbe0f0667500e1741e25baf03fe64c
Author: Renlin Li <renlin.li@arm.com>
Date: Fri Apr 27 10:48:18 2018 +0100
[BFD][AARCH64]Properly truncate no overflow checking relocation value for load/store immediate.
bfd/ChangeLog:
2018-06-20 Renlin Li <renlin.li@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
ld/ChangeLog:
2018-06-20 Renlin Li <renlin.li@arm.com>
* testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
* testsuite/ld-aarch64/emit-relocs-555.d: Likewise.
Diff:
---
bfd/ChangeLog | 12 ++++++++++++
bfd/elfxx-aarch64.c | 16 ++++++++--------
ld/ChangeLog | 6 ++++++
ld/testsuite/ld-aarch64/emit-relocs-115.d | 2 +-
ld/testsuite/ld-aarch64/emit-relocs-534.d | 2 +-
ld/testsuite/ld-aarch64/emit-relocs-555.d | 2 +-
6 files changed, 29 insertions(+), 11 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index d0f6668..110115c 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,15 @@
+2018-06-20 Renlin Li <renlin.li@arm.com>
+
+ * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
+ to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
+
2018-06-20 Nick Clifton <nickc@redhat.com>
PR 23299
diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c
index 3ea8dad..61a5ffb 100644
--- a/bfd/elfxx-aarch64.c
+++ b/bfd/elfxx-aarch64.c
@@ -452,26 +452,18 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = value + addend;
break;
@@ -521,7 +513,15 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = PG_OFFSET (value + addend);
break;
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 235fa51..4e9cc2a 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2018-06-20 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
+ * testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
+ * testsuite/ld-aarch64/emit-relocs-555.d: Likewise.
+
2018-06-19 Maciej W. Rozycki <macro@mips.com>
PR ld/22966
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-115.d b/ld/testsuite/ld-aarch64/emit-relocs-115.d
index f436d32..95a6e31 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-115.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-115.d
@@ -6,5 +6,5 @@
00010000 <.text>:
10000: 798019d6 ldrsh x22, \[x14, #12\]
10000: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v2
- 10004: 79a72a28 ldrsh x8, \[x17, #5012\]
+ 10004: 79872a28 ldrsh x8, \[x17, #916\]
10004: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-534.d b/ld/testsuite/ld-aarch64/emit-relocs-534.d
index 121fdc4..fe59b23 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-534.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-534.d
@@ -5,5 +5,5 @@
0000000000010000 <.text>:
10000: 798009d6 ldrsh x22, \[x14, #4\]
10000: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC v2
- 10004: 79a71a28 ldrsh x8, \[x17, #5004\]
+ 10004: 79871a28 ldrsh x8, \[x17, #908\]
10004: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC v3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-555.d b/ld/testsuite/ld-aarch64/emit-relocs-555.d
index e866b60..1e33998 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-555.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-555.d
@@ -5,5 +5,5 @@
0000000000010000 <.text>:
10000: 798029d6 ldrsh x22, \[x14, #20\]
10000: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v2
- 10004: 79a73a28 ldrsh x8, \[x17, #5020\]
+ 10004: 79873a28 ldrsh x8, \[x17, #924\]
10004: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v3
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