[binutils-gdb] x86-64: Display eiz for address with the addr32 prefix

H.J.Lu hjl@sourceware.org
Tue Aug 14 16:56:00 GMT 2018


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=1bc60e562458b1e1c25be808a62adb1cb6c20ff0

commit 1bc60e562458b1e1c25be808a62adb1cb6c20ff0
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Aug 14 09:55:43 2018 -0700

    x86-64: Display eiz for address with the addr32 prefix
    
    In 64-bit mode, display eiz for address with the addr32 prefix and without
    base nor index registers.  For
    
    	mov -0xccddef(,%eiz,), %rax
    
    disassembler now displays:
    
    	67 48 8b 04 25 11 22 33 ff 	mov -0xccddef(,%eiz,1),%rax
    
    instead of
    
    	67 48 8b 04 25 11 22 33 ff 	addr32 mov 0xffffffffff332211,%rax
    
    gas/
    
    	* testsuite/gas/i386/evex-no-scale-64.d: Updated.
    	* testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
    	* testsuite/gas/i386/x86-64-addr32.d: Likewise.
    	* testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
    	* testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
    	* testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests.
    
    opcodes/
    
    	* i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for
    	address with the addr32 prefix and without base nor index
    	registers.

Diff:
---
 gas/ChangeLog                                      |  9 +++++++
 gas/testsuite/gas/i386/evex-no-scale-64.d          |  2 +-
 gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d |  8 +++---
 gas/testsuite/gas/i386/ilp32/x86-64-addr32.d       |  8 +++---
 gas/testsuite/gas/i386/x86-64-addr32-intel.d       |  8 +++---
 gas/testsuite/gas/i386/x86-64-addr32.d             |  8 +++---
 gas/testsuite/gas/i386/x86-64-addr32.s             |  5 +++-
 opcodes/ChangeLog                                  |  6 +++++
 opcodes/i386-dis.c                                 | 30 +++++++++++++++++-----
 9 files changed, 63 insertions(+), 21 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5adf8cb..df36d50 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2018-08-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/gas/i386/evex-no-scale-64.d: Updated.
+	* testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-addr32.d: Likewise.
+	* testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
+	* testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
+	* testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests.
+
 2018-08-14  Robert Yang  <liezhi.yang@windriver.com>
 
 	* as.c (main): Improve check for input file matching output file.
diff --git a/gas/testsuite/gas/i386/evex-no-scale-64.d b/gas/testsuite/gas/i386/evex-no-scale-64.d
index d52d947..3362365 100644
--- a/gas/testsuite/gas/i386/evex-no-scale-64.d
+++ b/gas/testsuite/gas/i386/evex-no-scale-64.d
@@ -10,5 +10,5 @@ Disassembly of section .text:
  +[a-f0-9]+:	62 f1 7c 48 28 04 05 40 00 00 00 	vmovaps 0x40\(,%rax,1\),%zmm0
  +[a-f0-9]+:	62 f1 7c 48 28 04 25 40 00 00 00 	vmovaps 0x40,%zmm0
  +[a-f0-9]+:	67 62 f1 7c 48 28 04 05 40 00 00 00 	vmovaps 0x40\(,%eax,1\),%zmm0
- +[a-f0-9]+:	67 62 f1 7c 48 28 04 25 40 00 00 00 	addr32 vmovaps 0x40,%zmm0
+ +[a-f0-9]+:	67 62 f1 7c 48 28 04 25 40 00 00 00 	vmovaps 0x40\(,%eiz,1\),%zmm0
  +[a-f0-9]+:	62 f1 7c 48 28 04 25 40 00 00 00 	vmovaps 0x40,%zmm0
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d b/gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d
index 7edce62..86e8cf8 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d
@@ -11,17 +11,19 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	67 48 8d 80 00 00 00 00[ 	]+lea[ 	]+rax,\[eax\+0x0\].*
 [ 	]*[a-f0-9]+:	67 49 8d 80 00 00 00 00[ 	]+lea[ 	]+rax,\[r8d\+0x0\].*
 [ 	]*[a-f0-9]+:	67 48 8d 05 00 00 00 00[ 	]+lea[ 	]+rax,\[eip\+0x0\].*
-[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00 	addr32 lea rax,ds:0x0.*
+[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00 	lea[ ]+rax,\[eiz\*1\+0x0\].*
 [ 	]*[a-f0-9]+:	67 a0 98 08 60 00    	addr32 mov al,ds:0x600898
 [ 	]*[a-f0-9]+:	67 66 a1 98 08 60 00 	addr32 mov ax,ds:0x600898
 [ 	]*[a-f0-9]+:	67 a1 98 08 60 00    	addr32 mov eax,ds:0x600898
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 60 00 	addr32 mov rax,ds:0x600898
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 80 00 	addr32 mov rax,ds:0x800898
-[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	addr32 mov rbx,QWORD PTR ds:0x800898
+[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
 [ 	]*[a-f0-9]+:	67 a2 98 08 60 00    	addr32 mov ds:0x600898,al
 [ 	]*[a-f0-9]+:	67 66 a3 98 08 60 00 	addr32 mov ds:0x600898,ax
 [ 	]*[a-f0-9]+:	67 a3 98 08 60 00    	addr32 mov ds:0x600898,eax
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 60 00 	addr32 mov ds:0x600898,rax
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 80 00 	addr32 mov ds:0x800898,rax
-[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	addr32 mov QWORD PTR ds:0x800898,rbx
+[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
+[ 	]*[a-f0-9]+:	67 89 04 25 11 22 33 ff 	mov[ ]+DWORD PTR \[eiz\*1-0xccddef\],eax
+[ 	]*[a-f0-9]+:	67 89 04 65 11 22 33 ff 	mov[ ]+DWORD PTR \[eiz\*2-0xccddef\],eax
 #pass
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-addr32.d b/gas/testsuite/gas/i386/ilp32/x86-64-addr32.d
index c2e17d1..b866473 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64-addr32.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-addr32.d
@@ -11,17 +11,19 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	67 48 8d 80 00 00 00 00[ 	]+lea[ 	]+0x0\(%eax\),%rax.*
 [ 	]*[a-f0-9]+:	67 49 8d 80 00 00 00 00[ 	]+lea[ 	]+0x0\(%r8d\),%rax.*
 [ 	]*[a-f0-9]+:	67 48 8d 05 00 00 00 00[ 	]+lea[ 	]+0x0\(%eip\),%rax.*
-[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00[ 	]+addr32 lea[ 	]+0x0,%rax.*
+[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%rax.*
 [ 	]*[a-f0-9]+:	67 a0 98 08 60 00    	addr32 mov 0x600898,%al
 [ 	]*[a-f0-9]+:	67 66 a1 98 08 60 00 	addr32 mov 0x600898,%ax
 [ 	]*[a-f0-9]+:	67 a1 98 08 60 00    	addr32 mov 0x600898,%eax
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 60 00 	addr32 mov 0x600898,%rax
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 80 00 	addr32 mov 0x800898,%rax
-[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	addr32 mov 0x800898,%rbx
+[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	mov[ ]+0x800898\(,%eiz,1\),%rbx
 [ 	]*[a-f0-9]+:	67 a2 98 08 60 00    	addr32 mov %al,0x600898
 [ 	]*[a-f0-9]+:	67 66 a3 98 08 60 00 	addr32 mov %ax,0x600898
 [ 	]*[a-f0-9]+:	67 a3 98 08 60 00    	addr32 mov %eax,0x600898
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 60 00 	addr32 mov %rax,0x600898
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 80 00 	addr32 mov %rax,0x800898
-[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	addr32 mov %rbx,0x800898
+[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	mov[ ]+%rbx,0x800898\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	67 89 04 25 11 22 33 ff 	mov[ ]+%eax,-0xccddef\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	67 89 04 65 11 22 33 ff 	mov[ ]+%eax,-0xccddef\(,%eiz,2\)
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-addr32-intel.d b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
index 3a7a0c0..ec0966c 100644
--- a/gas/testsuite/gas/i386/x86-64-addr32-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
@@ -11,17 +11,19 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	67 48 8d 80 00 00 00 00[ 	]+lea[ 	]+rax,\[eax\+0x0\].*
 [ 	]*[a-f0-9]+:	67 49 8d 80 00 00 00 00[ 	]+lea[ 	]+rax,\[r8d\+0x0\].*
 [ 	]*[a-f0-9]+:	67 48 8d 05 00 00 00 00[ 	]+lea[ 	]+rax,\[eip\+0x0\].*
-[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00 	addr32 lea rax,ds:0x0.*
+[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00 	lea[ ]+rax,\[eiz\*1\+0x0\].*
 [ 	]*[a-f0-9]+:	67 a0 98 08 60 00    	addr32 mov al,ds:0x600898
 [ 	]*[a-f0-9]+:	67 66 a1 98 08 60 00 	addr32 mov ax,ds:0x600898
 [ 	]*[a-f0-9]+:	67 a1 98 08 60 00    	addr32 mov eax,ds:0x600898
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 60 00 	addr32 mov rax,ds:0x600898
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 80 00 	addr32 mov rax,ds:0x800898
-[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	addr32 mov rbx,QWORD PTR ds:0x800898
+[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
 [ 	]*[a-f0-9]+:	67 a2 98 08 60 00    	addr32 mov ds:0x600898,al
 [ 	]*[a-f0-9]+:	67 66 a3 98 08 60 00 	addr32 mov ds:0x600898,ax
 [ 	]*[a-f0-9]+:	67 a3 98 08 60 00    	addr32 mov ds:0x600898,eax
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 60 00 	addr32 mov ds:0x600898,rax
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 80 00 	addr32 mov ds:0x800898,rax
-[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	addr32 mov QWORD PTR ds:0x800898,rbx
+[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
+[ 	]*[a-f0-9]+:	67 89 04 25 11 22 33 ff 	mov[ ]+DWORD PTR \[eiz\*1-0xccddef\],eax
+[ 	]*[a-f0-9]+:	67 89 04 65 11 22 33 ff 	mov[ ]+DWORD PTR \[eiz\*2-0xccddef\],eax
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-addr32.d b/gas/testsuite/gas/i386/x86-64-addr32.d
index b00e023..6b73de9 100644
--- a/gas/testsuite/gas/i386/x86-64-addr32.d
+++ b/gas/testsuite/gas/i386/x86-64-addr32.d
@@ -10,17 +10,19 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	67 48 8d 80 00 00 00 00[ 	]+lea[ 	]+0x0\(%eax\),%rax.*
 [ 	]*[a-f0-9]+:	67 49 8d 80 00 00 00 00[ 	]+lea[ 	]+0x0\(%r8d\),%rax.*
 [ 	]*[a-f0-9]+:	67 48 8d 05 00 00 00 00[ 	]+lea[ 	]+0x0\(%eip\),%rax.*
-[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00[ 	]+addr32 lea[ 	]+0x0,%rax.*
+[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00[ 	]+lea[ ]+0x0\(,%eiz,1\),%rax.*
 [ 	]*[a-f0-9]+:	67 a0 98 08 60 00    	addr32 mov 0x600898,%al
 [ 	]*[a-f0-9]+:	67 66 a1 98 08 60 00 	addr32 mov 0x600898,%ax
 [ 	]*[a-f0-9]+:	67 a1 98 08 60 00    	addr32 mov 0x600898,%eax
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 60 00 	addr32 mov 0x600898,%rax
 [ 	]*[a-f0-9]+:	67 48 a1 98 08 80 00 	addr32 mov 0x800898,%rax
-[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	addr32 mov 0x800898,%rbx
+[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	mov[ ]+0x800898\(,%eiz,1\),%rbx
 [ 	]*[a-f0-9]+:	67 a2 98 08 60 00    	addr32 mov %al,0x600898
 [ 	]*[a-f0-9]+:	67 66 a3 98 08 60 00 	addr32 mov %ax,0x600898
 [ 	]*[a-f0-9]+:	67 a3 98 08 60 00    	addr32 mov %eax,0x600898
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 60 00 	addr32 mov %rax,0x600898
 [ 	]*[a-f0-9]+:	67 48 a3 98 08 80 00 	addr32 mov %rax,0x800898
-[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	addr32 mov %rbx,0x800898
+[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	mov[ ]+%rbx,0x800898\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	67 89 04 25 11 22 33 ff 	mov[ ]+%eax,-0xccddef\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	67 89 04 65 11 22 33 ff 	mov[ ]+%eax,-0xccddef\(,%eiz,2\)
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-addr32.s b/gas/testsuite/gas/i386/x86-64-addr32.s
index 7f661ec..5acdce9 100644
--- a/gas/testsuite/gas/i386/x86-64-addr32.s
+++ b/gas/testsuite/gas/i386/x86-64-addr32.s
@@ -1,4 +1,5 @@
-.text
+	.text
+	.allow_index_reg
 	lea		symbol(%eax), %rax
 	lea		symbol(%r8d), %rax
 	lea		symbol(%eip), %rax
@@ -15,3 +16,5 @@
 	addr32 mov	%rax,0x600898
 	addr32 mov	%rax,0x800898
 	addr32 mov	%rbx,0x800898
+	mov		%eax, -0xccddef(,%eiz,)
+	mov		%eax, -0xccddef(,%eiz,2)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d20b7e9..78b9269 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2018-08-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for
+	address with the addr32 prefix and without base nor index
+	registers.
+
 2018-08-11  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* i386-gen.c (cpu_flag_init): Add CpuCMOV and CpuFXSR to
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 42d219c..77f2e2a 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -15337,6 +15337,7 @@ OP_E_memory (int bytemode, int sizeflag)
       int havebase;
       int haveindex;
       int needindex;
+      int needaddr32;
       int base, rbase;
       int vindex = 0;
       int scale = 0;
@@ -15433,12 +15434,27 @@ OP_E_memory (int bytemode, int sizeflag)
 	  break;
 	}
 
-      /* In 32bit mode, we need index register to tell [offset] from
-	 [eiz*1 + offset].  */
-      needindex = (havesib
-		   && !havebase
-		   && !haveindex
-		   && address_mode == mode_32bit);
+      needindex = 0;
+      needaddr32 = 0;
+      if (havesib
+	  && !havebase
+	  && !haveindex
+	  && address_mode != mode_16bit)
+	{
+	  if (address_mode == mode_64bit)
+	    {
+	      /* Display eiz instead of addr32.  */
+	      needindex = addr32flag;
+	      needaddr32 = 1;
+	    }
+	  else
+	    {
+	      /* In 32-bit mode, we need index register to tell [offset]
+		 from [eiz*1 + offset].  */
+	      needindex = 1;
+	    }
+	}
+
       havedisp = (havebase
 		  || needindex
 		  || (havesib && (haveindex || scale != 0)));
@@ -15458,7 +15474,7 @@ OP_E_memory (int bytemode, int sizeflag)
 	      }
 	  }
 
-      if ((havebase || haveindex || riprel)
+      if ((havebase || haveindex || needaddr32 || riprel)
 	  && (bytemode != v_bnd_mode)
 	  && (bytemode != bnd_mode)
 	  && (bytemode != bnd_swap_mode))



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