[binutils-gdb] Enable Intel VAES instructions.

Igor Tsimbalist itsimbal@sourceware.org
Mon Oct 23 13:18:00 GMT 2017


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=8dcf1fadf2b0763962639fc5dcedc1892e502265

commit 8dcf1fadf2b0763962639fc5dcedc1892e502265
Author: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Date:   Fri Oct 20 23:35:45 2017 +0300

    Enable Intel VAES instructions.
    
    Intel has disclosed a set of new instructions. The spec is
    https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
    
    gas/
    
    	* config/tc-i386.c (cpu_arch): Add VAES.
    	* doc/c-i386.texi: Document VAES.
    	* testsuite/gas/i386/i386.exp: Run VAES tests.
    	* testsuite/gas/i386/avx512f_vaes-intel.d: New test.
    	* testsuite/gas/i386/avx512f_vaes-wig.s: Ditto.
    	* testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Ditto.
    	* testsuite/gas/i386/avx512f_vaes-wig1.d: Ditto.
    	* testsuite/gas/i386/avx512f_vaes.d: Ditto.
    	* testsuite/gas/i386/avx512f_vaes.s: Ditto.
    	* testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto.
    	* testsuite/gas/i386/avx512vl_vaes-wig.s: Ditto.
    	* testsuite/gas/i386/avx512vl_vaes-wig1-intel.d: Ditto.
    	* testsuite/gas/i386/avx512vl_vaes-wig1.d: Ditto.
    	* testsuite/gas/i386/avx512vl_vaes.d: Ditto.
    	* testsuite/gas/i386/avx512vl_vaes.s: Ditto.
    	* testsuite/gas/i386/vaes-intel.d: Ditto.
    	* testsuite/gas/i386/vaes.d: Ditto.
    	* testsuite/gas/i386/vaes.s: Ditto.
    	* testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Ditto.
    	* testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto.
    	* testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Ditto.
    	* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto.
    	* testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto.
    	* testsuite/gas/i386/x86-64-vaes-intel.d: Ditto.
    	* testsuite/gas/i386/x86-64-vaes.d: Ditto.
    	* testsuite/gas/i386/x86-64-vaes.s: Ditto.
    
    opcodes/
    
    	* i386-dis.c (enum): Add PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD,
    	PREFIX_EVEX_0F38DE, PREFIX_EVEX_0F38DF.
    	(enum): Remove VEX_LEN_0F38DC_P_2, VEX_LEN_0F38DD_P_2,
    	VEX_LEN_0F38DE_P_2, VEX_LEN_0F38DF_P_2.
    	(vex_len_table): Ditto.
    	(enum): Remove VEX_W_0F38DC_P_2, VEX_W_0F38DD_P_2,
    	VEX_W_0F38DE_P_2, VEX_W_0F38DF_P_2.
    	(vew_w_table): Ditto.
    	(prefix_table): Adjust instructions (see prefixes above).
    	* i386-dis-evex.h (evex_table):
    	Add new instructions (see prefixes above).
    	* i386-gen.c (cpu_flag_init): Add VAES.
    	(bitfield_cpu_flags): Ditto.
    	* i386-opc.h (enum): Ditto.
    	(i386_cpu_flags): Ditto.
    	* i386-opc.tbl (vaes{enc,dec}{last,}): New instructions.
    	* i386-init.h: Regenerate.
    	* i386-tbl.h: Ditto.

Diff:
---
 gas/config/tc-i386.c                               |     2 +
 gas/doc/c-i386.texi                                |     2 +
 gas/testsuite/gas/i386/avx512f_vaes-intel.d        |    36 +
 gas/testsuite/gas/i386/avx512f_vaes-wig.s          |    37 +
 gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d   |    36 +
 gas/testsuite/gas/i386/avx512f_vaes-wig1.d         |    36 +
 gas/testsuite/gas/i386/avx512f_vaes.d              |    36 +
 gas/testsuite/gas/i386/avx512f_vaes.s              |    37 +
 gas/testsuite/gas/i386/avx512vl_vaes-intel.d       |   108 +
 gas/testsuite/gas/i386/avx512vl_vaes-wig.s         |    45 +
 gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d  |    44 +
 gas/testsuite/gas/i386/avx512vl_vaes-wig1.d        |    44 +
 gas/testsuite/gas/i386/avx512vl_vaes.d             |   108 +
 gas/testsuite/gas/i386/avx512vl_vaes.s             |   117 +
 gas/testsuite/gas/i386/i386.exp                    |    20 +
 gas/testsuite/gas/i386/vaes-intel.d                |    30 +
 gas/testsuite/gas/i386/vaes.d                      |    29 +
 gas/testsuite/gas/i386/vaes.s                      |    30 +
 gas/testsuite/gas/i386/x86-64-avx512f_vaes-intel.d |    28 +
 gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s   |    23 +
 .../gas/i386/x86-64-avx512f_vaes-wig1-intel.d      |    28 +
 gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d  |    28 +
 gas/testsuite/gas/i386/x86-64-avx512f_vaes.d       |    28 +
 gas/testsuite/gas/i386/x86-64-avx512f_vaes.s       |    23 +
 .../gas/i386/x86-64-avx512vl_vaes-intel.d          |    61 +
 gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s  |    39 +
 .../gas/i386/x86-64-avx512vl_vaes-wig1-intel.d     |    44 +
 gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d |    44 +
 gas/testsuite/gas/i386/x86-64-avx512vl_vaes.d      |    61 +
 gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s      |    56 +
 gas/testsuite/gas/i386/x86-64-vaes-intel.d         |    30 +
 gas/testsuite/gas/i386/x86-64-vaes.d               |    29 +
 gas/testsuite/gas/i386/x86-64-vaes.s               |    30 +
 opcodes/i386-dis-evex.h                            |    33 +-
 opcodes/i386-dis.c                                 |    56 +-
 opcodes/i386-gen.c                                 |     3 +
 opcodes/i386-init.h                                |   283 +-
 opcodes/i386-opc.h                                 |     3 +
 opcodes/i386-opc.tbl                               |    24 +
 opcodes/i386-tbl.h                                 | 11076 ++++++++++---------
 40 files changed, 7251 insertions(+), 5576 deletions(-)

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index aff7f9b..4184996 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -998,6 +998,8 @@ static const arch_entry cpu_arch[] =
     CPU_CET_FLAGS, 0 },
   { STRING_COMMA_LEN (".gfni"), PROCESSOR_UNKNOWN,
     CPU_GFNI_FLAGS, 0 },
+  { STRING_COMMA_LEN (".vaes"), PROCESSOR_UNKNOWN,
+    CPU_VAES_FLAGS, 0 },
 };
 
 static const noarch_entry cpu_noarch[] =
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 5740d33..551d9f2 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -169,6 +169,7 @@ accept various extension mnemonics.  For example,
 @code{ptwrite},
 @code{cet},
 @code{gfni},
+@code{vaes},
 @code{prefetchwt1},
 @code{clflushopt},
 @code{se1},
@@ -1227,6 +1228,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
 @item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.gfni}
+@item @samp{.vaes}
 @end multitable
 
 Apart from the warning, there are only two other effects on
diff --git a/gas/testsuite/gas/i386/avx512f_vaes-intel.d b/gas/testsuite/gas/i386/avx512f_vaes-intel.d
new file mode 100644
index 0000000..d49cf49
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512f_vaes-intel.d
@@ -0,0 +1,36 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 AVX512F/VAES insns (Intel disassembly)
+#source: avx512f_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de f4[ 	]*vaesdec zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b2 c0 1f 00 00[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df f4[ 	]*vaesdeclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b2 c0 1f 00 00[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc f4[ 	]*vaesenc zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b2 c0 1f 00 00[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd f4[ 	]*vaesenclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b2 c0 1f 00 00[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de f4[ 	]*vaesdec zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b2 c0 1f 00 00[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df f4[ 	]*vaesdeclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b2 c0 1f 00 00[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc f4[ 	]*vaesenc zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b2 c0 1f 00 00[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd f4[ 	]*vaesenclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b2 c0 1f 00 00[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+#pass
diff --git a/gas/testsuite/gas/i386/avx512f_vaes-wig.s b/gas/testsuite/gas/i386/avx512f_vaes-wig.s
new file mode 100644
index 0000000..e706150
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512f_vaes-wig.s
@@ -0,0 +1,37 @@
+# Check 32bit AVX512F,VAES WIG instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdec	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdec	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	vaesdeclast	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdeclast	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdeclast	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	vaesenc	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenc	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenc	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	vaesenclast	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenclast	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenclast	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	.intel_syntax noprefix
+	vaesdec	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesdec	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesdec	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
+
+	vaesdeclast	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
+
+	vaesenc	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesenc	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesenc	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
+
+	vaesenclast	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesenclast	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesenclast	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
diff --git a/gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d b/gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d
new file mode 100644
index 0000000..73562da
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d
@@ -0,0 +1,36 @@
+#as: -mevexwig=1
+#objdump: -dw -Mintel
+#name: i386 AVX512F/VAES wig insns (Intel disassembly)
+#source: avx512f_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de f4[ 	]*vaesdec zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b2 c0 1f 00 00[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df f4[ 	]*vaesdeclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b2 c0 1f 00 00[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc f4[ 	]*vaesenc zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b2 c0 1f 00 00[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd f4[ 	]*vaesenclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b2 c0 1f 00 00[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de f4[ 	]*vaesdec zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b2 c0 1f 00 00[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df f4[ 	]*vaesdeclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b2 c0 1f 00 00[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc f4[ 	]*vaesenc zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b2 c0 1f 00 00[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd f4[ 	]*vaesenclast zmm6,zmm5,zmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b2 c0 1f 00 00[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
+#pass
diff --git a/gas/testsuite/gas/i386/avx512f_vaes-wig1.d b/gas/testsuite/gas/i386/avx512f_vaes-wig1.d
new file mode 100644
index 0000000..daa4718
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512f_vaes-wig1.d
@@ -0,0 +1,36 @@
+#as: -mevexwig=1
+#objdump: -dw
+#name: i386 AVX512F/VAES wig insns
+#source: avx512f_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de f4[ 	]*vaesdec %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b2 c0 1f 00 00[ 	]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df f4[ 	]*vaesdeclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b2 c0 1f 00 00[ 	]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc f4[ 	]*vaesenc %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b2 c0 1f 00 00[ 	]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd f4[ 	]*vaesenclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b2 c0 1f 00 00[ 	]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de f4[ 	]*vaesdec %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b2 c0 1f 00 00[ 	]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df f4[ 	]*vaesdeclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b2 c0 1f 00 00[ 	]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc f4[ 	]*vaesenc %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b2 c0 1f 00 00[ 	]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd f4[ 	]*vaesenclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b2 c0 1f 00 00[ 	]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx512f_vaes.d b/gas/testsuite/gas/i386/avx512f_vaes.d
new file mode 100644
index 0000000..9ba57ac
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512f_vaes.d
@@ -0,0 +1,36 @@
+#as:
+#objdump: -dw
+#name: i386 AVX512F/VAES insns
+#source: avx512f_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de f4[ 	]*vaesdec %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b2 c0 1f 00 00[ 	]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df f4[ 	]*vaesdeclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b2 c0 1f 00 00[ 	]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc f4[ 	]*vaesenc %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b2 c0 1f 00 00[ 	]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd f4[ 	]*vaesenclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b2 c0 1f 00 00[ 	]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de f4[ 	]*vaesdec %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 de b2 c0 1f 00 00[ 	]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df f4[ 	]*vaesdeclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 df b2 c0 1f 00 00[ 	]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc f4[ 	]*vaesenc %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dc b2 c0 1f 00 00[ 	]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd f4[ 	]*vaesenclast %zmm4,%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 48 dd b2 c0 1f 00 00[ 	]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx512f_vaes.s b/gas/testsuite/gas/i386/avx512f_vaes.s
new file mode 100644
index 0000000..eb76504
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512f_vaes.s
@@ -0,0 +1,37 @@
+# Check 32bit AVX512F,VAES instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdec	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdec	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	vaesdeclast	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdeclast	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesdeclast	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	vaesenc	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenc	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenc	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	vaesenclast	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenclast	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
+	vaesenclast	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
+
+	.intel_syntax noprefix
+	vaesdec	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesdec	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesdec	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
+
+	vaesdeclast	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
+
+	vaesenc	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesenc	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesenc	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
+
+	vaesenclast	zmm6, zmm5, zmm4	 # AVX512F,VAES
+	vaesenclast	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
+	vaesenclast	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
diff --git a/gas/testsuite/gas/i386/avx512vl_vaes-intel.d b/gas/testsuite/gas/i386/avx512vl_vaes-intel.d
new file mode 100644
index 0000000..1c23581
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl_vaes-intel.d
@@ -0,0 +1,108 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 AVX512VL/VAES insns (Intel disassembly)
+#source: avx512vl_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b2 f0 07 00 00[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b2 e0 0f 00 00[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b2 f0 07 00 00[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b2 e0 0f 00 00[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b2 f0 07 00 00[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b2 e0 0f 00 00[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b2 f0 07 00 00[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b2 e0 0f 00 00[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b2 f0 07 00 00[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b2 e0 0f 00 00[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b2 f0 07 00 00[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b2 e0 0f 00 00[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b2 f0 07 00 00[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b2 e0 0f 00 00[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b2 f0 07 00 00[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b2 e0 0f 00 00[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b2 f0 07 00 00[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b2 e0 0f 00 00[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b2 f0 07 00 00[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b2 e0 0f 00 00[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b2 f0 07 00 00[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b2 e0 0f 00 00[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b2 f0 07 00 00[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b2 e0 0f 00 00[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b2 f0 07 00 00[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b2 e0 0f 00 00[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b2 f0 07 00 00[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b2 e0 0f 00 00[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b2 f0 07 00 00[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b2 e0 0f 00 00[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b2 f0 07 00 00[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b2 e0 0f 00 00[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
+#pass
diff --git a/gas/testsuite/gas/i386/avx512vl_vaes-wig.s b/gas/testsuite/gas/i386/avx512vl_vaes-wig.s
new file mode 100644
index 0000000..d3f5d2b
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl_vaes-wig.s
@@ -0,0 +1,45 @@
+# Check 32bit AVX512VL,VAES WIG instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdec	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdec	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesdec	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+
+	vaesdeclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdeclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdeclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesdeclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+
+	vaesenc	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenc	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenc	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesenc	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+
+	vaesenclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesenclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+
+	.intel_syntax noprefix
+	vaesdec	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesdec	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesdec	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesdec	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+
+	vaesdeclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesdeclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesdeclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesdeclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+
+	vaesenc	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesenc	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesenc	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesenc	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+
+	vaesenclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesenclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesenclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesenclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
diff --git a/gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d b/gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d
new file mode 100644
index 0000000..8965d4c
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d
@@ -0,0 +1,44 @@
+#as: -mevexwig=1
+#objdump: -dw -Mintel
+#name: i386 AVX512VL/VAES wig insns (Intel disassembly)
+#source: avx512vl_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
+#pass
diff --git a/gas/testsuite/gas/i386/avx512vl_vaes-wig1.d b/gas/testsuite/gas/i386/avx512vl_vaes-wig1.d
new file mode 100644
index 0000000..ff3e6ff
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl_vaes-wig1.d
@@ -0,0 +1,44 @@
+#as: -mevexwig=1
+#objdump: -dw
+#name: i386 AVX512VL/VAES wig insns
+#source: avx512vl_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx512vl_vaes.d b/gas/testsuite/gas/i386/avx512vl_vaes.d
new file mode 100644
index 0000000..8d932d5
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl_vaes.d
@@ -0,0 +1,108 @@
+#as:
+#objdump: -dw
+#name: i386 AVX512VL/VAES insns
+#source: avx512vl_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx512vl_vaes.s b/gas/testsuite/gas/i386/avx512vl_vaes.s
new file mode 100644
index 0000000..d35f021
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl_vaes.s
@@ -0,0 +1,117 @@
+# Check 32bit AVX512VL,VAES instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdec	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdec	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	vaesdec	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesdec	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesdec	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	vaesdeclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdeclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesdeclast	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	vaesdeclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesdeclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesdeclast	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	vaesenc	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenc	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenc	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	vaesenc	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesenc	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesenc	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	vaesenclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	vaesenclast	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	vaesenclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesenclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	vaesenclast	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	{evex} vaesdec	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesdec	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesdec	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	{evex} vaesdec	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesdec	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesdec	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	{evex} vaesdeclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesdeclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesdeclast	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	{evex} vaesdeclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesdeclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesdeclast	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	{evex} vaesenc	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesenc	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesenc	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	{evex} vaesenc	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesenc	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesenc	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	{evex} vaesenclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesenclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
+	{evex} vaesenclast	2032(%edx), %xmm5, %xmm6	 # AVX512VL,VAES Disp8
+	{evex} vaesenclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesenclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
+	{evex} vaesenclast	4064(%edx), %ymm5, %ymm6	 # AVX512VL,VAES Disp8
+
+	.intel_syntax noprefix
+	vaesdec	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesdec	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesdec	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	vaesdec	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesdec	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesdec	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	vaesdeclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesdeclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesdeclast	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	vaesdeclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesdeclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesdeclast	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	vaesenc	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesenc	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesenc	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	vaesenc	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesenc	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesenc	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	vaesenclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	vaesenclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesenclast	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	vaesenclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	vaesenclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	vaesenclast	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	{evex} vaesdec	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	{evex} vaesdec	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesdec	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	{evex} vaesdec	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	{evex} vaesdec	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesdec	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	{evex} vaesdeclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	{evex} vaesdeclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesdeclast	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	{evex} vaesdeclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	{evex} vaesdeclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesdeclast	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	{evex} vaesenc	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	{evex} vaesenc	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesenc	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	{evex} vaesenc	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	{evex} vaesenc	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesenc	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
+
+	{evex} vaesenclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
+	{evex} vaesenclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesenclast	xmm6, xmm5, XMMWORD PTR [edx+2032]	 # AVX512VL,VAES Disp8
+	{evex} vaesenclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
+	{evex} vaesenclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
+	{evex} vaesenclast	ymm6, ymm5, YMMWORD PTR [edx+4064]	 # AVX512VL,VAES Disp8
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index b764fb1..bb48e5d 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -378,6 +378,14 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "avx512f_gfni-intel"
     run_dump_test "avx512vl_gfni"
     run_dump_test "avx512vl_gfni-intel"
+    run_dump_test "avx512f_vaes"
+    run_dump_test "avx512f_vaes-intel"
+    run_dump_test "avx512f_vaes-wig1"
+    run_dump_test "avx512f_vaes-wig1-intel"
+    run_dump_test "avx512vl_vaes"
+    run_dump_test "avx512vl_vaes-intel"
+    run_dump_test "avx512vl_vaes-wig1"
+    run_dump_test "avx512vl_vaes-wig1-intel"
     run_dump_test "clzero"
     run_dump_test "disassem"
     run_dump_test "mwaitx-bdver4"
@@ -389,6 +397,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "ptwrite-intel"
     run_dump_test "gfni"
     run_dump_test "gfni-intel"
+    run_dump_test "vaes"
+    run_dump_test "vaes-intel"
     run_list_test "avx512vl-1" "-al"
     run_list_test "avx512vl-2" "-al"
     run_dump_test "fpu-bad"
@@ -811,6 +821,14 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-avx512f_gfni-intel"
     run_dump_test "x86-64-avx512vl_gfni"
     run_dump_test "x86-64-avx512vl_gfni-intel"
+    run_dump_test "x86-64-avx512f_vaes"
+    run_dump_test "x86-64-avx512f_vaes-intel"
+    run_dump_test "x86-64-avx512f_vaes-wig1"
+    run_dump_test "x86-64-avx512f_vaes-wig1-intel"
+    run_dump_test "x86-64-avx512vl_vaes"
+    run_dump_test "x86-64-avx512vl_vaes-intel"
+    run_dump_test "x86-64-avx512vl_vaes-wig1"
+    run_dump_test "x86-64-avx512vl_vaes-wig1-intel"
     run_dump_test "x86-64-clzero"
     run_dump_test "x86-64-mwaitx-bdver4"
     run_list_test "x86-64-mwaitx-reg"
@@ -821,6 +839,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-ptwrite-intel"
     run_dump_test "x86-64-gfni"
     run_dump_test "x86-64-gfni-intel"
+    run_dump_test "x86-64-vaes"
+    run_dump_test "x86-64-vaes-intel"
     run_dump_test "x86-64-fence-as-lock-add-yes"
     run_dump_test "x86-64-fence-as-lock-add-no"
     run_dump_test "x86-64-pr20141"
diff --git a/gas/testsuite/gas/i386/vaes-intel.d b/gas/testsuite/gas/i386/vaes-intel.d
new file mode 100644
index 0000000..7f777b8
--- /dev/null
+++ b/gas/testsuite/gas/i386/vaes-intel.d
@@ -0,0 +1,30 @@
+#objdump: -dwMintel
+#name: i386 VAES (Intel disassembly)
+#source: vaes.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast ymm7,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast ymm7,ymm6,YMMWORD PTR \[ecx\]
+#pass
diff --git a/gas/testsuite/gas/i386/vaes.d b/gas/testsuite/gas/i386/vaes.d
new file mode 100644
index 0000000..5c92233
--- /dev/null
+++ b/gas/testsuite/gas/i386/vaes.d
@@ -0,0 +1,29 @@
+#objdump: -dw
+#name: i386 VAES
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast \(%ecx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast \(%ecx\),%ymm6,%ymm7
+#pass
diff --git a/gas/testsuite/gas/i386/vaes.s b/gas/testsuite/gas/i386/vaes.s
new file mode 100644
index 0000000..71d6026
--- /dev/null
+++ b/gas/testsuite/gas/i386/vaes.s
@@ -0,0 +1,30 @@
+# Check VAES instructions
+
+	.allow_index_reg
+	.text
+_start:
+# Tests for op ymm/mem256, ymm, ymm
+	vaesenc %ymm4,%ymm6,%ymm2
+	vaesenc (%ecx),%ymm6,%ymm7
+	vaesenclast %ymm4,%ymm6,%ymm2
+	vaesenclast (%ecx),%ymm6,%ymm7
+	vaesdec %ymm4,%ymm6,%ymm2
+	vaesdec (%ecx),%ymm6,%ymm7
+	vaesdeclast %ymm4,%ymm6,%ymm2
+	vaesdeclast (%ecx),%ymm6,%ymm7
+	
+	.intel_syntax noprefix
+
+# Tests for op ymm/mem256, ymm, ymm
+	vaesenc ymm2,ymm6,ymm4
+	vaesenc ymm7,ymm6,YMMWORD PTR [ecx]
+	vaesenc ymm7,ymm6,[ecx]
+	vaesenclast ymm2,ymm6,ymm4
+	vaesenclast ymm7,ymm6,YMMWORD PTR [ecx]
+	vaesenclast ymm7,ymm6,[ecx]
+	vaesdec ymm2,ymm6,ymm4
+	vaesdec ymm7,ymm6,YMMWORD PTR [ecx]
+	vaesdec ymm7,ymm6,[ecx]
+	vaesdeclast ymm2,ymm6,ymm4
+	vaesdeclast ymm7,ymm6,YMMWORD PTR [ecx]
+	vaesdeclast ymm7,ymm6,[ecx]
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-intel.d b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-intel.d
new file mode 100644
index 0000000..7eacad0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-intel.d
@@ -0,0 +1,28 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 AVX512F/VAES insns (Intel disassembly)
+#source: x86-64-avx512f_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 de f4[ 	]*vaesdec zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 de b4 f0 23 01 00 00[ 	]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 df f4[ 	]*vaesdeclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 df b4 f0 23 01 00 00[ 	]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dc f4[ 	]*vaesenc zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dc b4 f0 23 01 00 00[ 	]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dd f4[ 	]*vaesenclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dd b4 f0 23 01 00 00[ 	]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 de f4[ 	]*vaesdec zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 de b4 f0 34 12 00 00[ 	]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 df f4[ 	]*vaesdeclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 df b4 f0 34 12 00 00[ 	]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dc f4[ 	]*vaesenc zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dc b4 f0 34 12 00 00[ 	]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dd f4[ 	]*vaesenclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dd b4 f0 34 12 00 00[ 	]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s
new file mode 100644
index 0000000..004a92b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s
@@ -0,0 +1,23 @@
+# Check 64bit AVX512F,VAES WIG instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesdec	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+	vaesdeclast	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesdeclast	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenc	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenc	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenclast	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenclast	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+
+	.intel_syntax noprefix
+	vaesdec	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesdec	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
+	vaesdeclast	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesdeclast	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
+	vaesenc	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesenc	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
+	vaesenclast	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesenclast	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d
new file mode 100644
index 0000000..171ed57
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d
@@ -0,0 +1,28 @@
+#as: -mevexwig=1
+#objdump: -dw -Mintel
+#name: x86_64 AVX512F/VAES wig insns (Intel disassembly)
+#source: x86-64-avx512f_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 de f4[ 	]*vaesdec zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 de b4 f0 23 01 00 00[ 	]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 df f4[ 	]*vaesdeclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 df b4 f0 23 01 00 00[ 	]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dc f4[ 	]*vaesenc zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dc b4 f0 23 01 00 00[ 	]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dd f4[ 	]*vaesenclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dd b4 f0 23 01 00 00[ 	]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 de f4[ 	]*vaesdec zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 de b4 f0 34 12 00 00[ 	]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 df f4[ 	]*vaesdeclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 df b4 f0 34 12 00 00[ 	]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dc f4[ 	]*vaesenc zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dc b4 f0 34 12 00 00[ 	]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dd f4[ 	]*vaesenclast zmm30,zmm29,zmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dd b4 f0 34 12 00 00[ 	]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
new file mode 100644
index 0000000..97b9821
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
@@ -0,0 +1,28 @@
+#as: -mevexwig=1
+#objdump: -dw
+#name: x86_64 AVX512F/VAES wig insns
+#source: x86-64-avx512f_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 de f4[ 	]*vaesdec %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 df f4[ 	]*vaesdeclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 df b4 f0 23 01 00 00[ 	]*vaesdeclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dc f4[ 	]*vaesenc %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dc b4 f0 23 01 00 00[ 	]*vaesenc 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dd f4[ 	]*vaesenclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dd b4 f0 23 01 00 00[ 	]*vaesenclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 de f4[ 	]*vaesdec %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 de b4 f0 34 12 00 00[ 	]*vaesdec 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 df f4[ 	]*vaesdeclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 df b4 f0 34 12 00 00[ 	]*vaesdeclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dc f4[ 	]*vaesenc %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dc b4 f0 34 12 00 00[ 	]*vaesenc 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dd f4[ 	]*vaesenclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dd b4 f0 34 12 00 00[ 	]*vaesenclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f_vaes.d b/gas/testsuite/gas/i386/x86-64-avx512f_vaes.d
new file mode 100644
index 0000000..fb66353
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes.d
@@ -0,0 +1,28 @@
+#as:
+#objdump: -dw
+#name: x86_64 AVX512F/VAES insns
+#source: x86-64-avx512f_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 de f4[ 	]*vaesdec %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 df f4[ 	]*vaesdeclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 df b4 f0 23 01 00 00[ 	]*vaesdeclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dc f4[ 	]*vaesenc %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dc b4 f0 23 01 00 00[ 	]*vaesenc 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dd f4[ 	]*vaesenclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dd b4 f0 23 01 00 00[ 	]*vaesenclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 de f4[ 	]*vaesdec %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 de b4 f0 34 12 00 00[ 	]*vaesdec 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 df f4[ 	]*vaesdeclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 df b4 f0 34 12 00 00[ 	]*vaesdeclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dc f4[ 	]*vaesenc %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dc b4 f0 34 12 00 00[ 	]*vaesenc 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 40 dd f4[ 	]*vaesenclast %zmm28,%zmm29,%zmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 40 dd b4 f0 34 12 00 00[ 	]*vaesenclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f_vaes.s b/gas/testsuite/gas/i386/x86-64-avx512f_vaes.s
new file mode 100644
index 0000000..6d3eebe
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes.s
@@ -0,0 +1,23 @@
+# Check 64bit AVX512F,VAES instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesdec	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+	vaesdeclast	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesdeclast	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenc	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenc	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenclast	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
+	vaesenclast	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
+
+	.intel_syntax noprefix
+	vaesdec	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesdec	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
+	vaesdeclast	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesdeclast	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
+	vaesenc	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesenc	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
+	vaesenclast	zmm30, zmm29, zmm28	 # AVX512F,VAES
+	vaesenclast	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d
new file mode 100644
index 0000000..1c1ad50
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d
@@ -0,0 +1,61 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 AVX512VL/VAES insns (Intel disassembly)
+#source: x86-64-avx512vl_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 de f4[ 	]*vaesdec xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 de b4 f0 23 01 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 de b2 f0 07 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 de f4[ 	]*vaesdec ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 de 31[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 de b4 f0 23 01 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 de b2 e0 0f 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 df f4[ 	]*vaesdeclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 df b4 f0 23 01 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 df b2 f0 07 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 df f4[ 	]*vaesdeclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 df b4 f0 23 01 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 df b2 e0 0f 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dc f4[ 	]*vaesenc xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dc b4 f0 23 01 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dc b2 f0 07 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dc f4[ 	]*vaesenc ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dc b4 f0 23 01 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dc b2 e0 0f 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dd f4[ 	]*vaesenclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dd b4 f0 23 01 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dd b2 f0 07 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dd f4[ 	]*vaesenclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dd b4 f0 23 01 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dd b2 e0 0f 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 de f4[ 	]*vaesdec xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 de b4 f0 34 12 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 de b2 f0 07 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 de f4[ 	]*vaesdec ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 de b4 f0 34 12 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 de b2 e0 0f 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 df f4[ 	]*vaesdeclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 df b4 f0 34 12 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 df b2 f0 07 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 df f4[ 	]*vaesdeclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 df b4 f0 34 12 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 df b2 e0 0f 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dc f4[ 	]*vaesenc xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dc b4 f0 34 12 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dc b2 f0 07 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dc f4[ 	]*vaesenc ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dc b4 f0 34 12 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dc b2 e0 0f 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dd f4[ 	]*vaesenclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dd b4 f0 34 12 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dd b2 f0 07 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dd f4[ 	]*vaesenclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dd b4 f0 34 12 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dd b2 e0 0f 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s
new file mode 100644
index 0000000..e287c48
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s
@@ -0,0 +1,39 @@
+# Check 64bit AVX512VL,VAES WIG instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdec	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdec	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdec	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdeclast	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdeclast	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdeclast	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdeclast	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenc	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenc	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenc	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenc	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenclast	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenclast	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenclast	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenclast	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+
+	.intel_syntax noprefix
+	vaesdec	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesdec	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdec	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesdec	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdeclast	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesdeclast	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdeclast	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesdeclast	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenc	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesenc	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenc	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesenc	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenclast	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesenclast	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenclast	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesenclast	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d
new file mode 100644
index 0000000..ccd8607
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d
@@ -0,0 +1,44 @@
+#as: -mevexwig=1
+#objdump: -dw -Mintel
+#name: x86_64 AVX512VL/VAES wig insns (Intel disassembly)
+#source: x86-64-avx512vl_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 de f4[ 	]*vaesdec xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 23 01 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 23 01 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 df b4 f0 23 01 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 df f4[ 	]*vaesdeclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 df b4 f0 23 01 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dc f4[ 	]*vaesenc xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dc b4 f0 23 01 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dc f4[ 	]*vaesenc ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dc b4 f0 23 01 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dd f4[ 	]*vaesenclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dd b4 f0 23 01 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dd f4[ 	]*vaesenclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dd b4 f0 23 01 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 de f4[ 	]*vaesdec xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 34 12 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 34 12 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 df b4 f0 34 12 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 df f4[ 	]*vaesdeclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 df b4 f0 34 12 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dc f4[ 	]*vaesenc xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dc b4 f0 34 12 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dc f4[ 	]*vaesenc ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dc b4 f0 34 12 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dd f4[ 	]*vaesenclast xmm30,xmm29,xmm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dd b4 f0 34 12 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dd f4[ 	]*vaesenclast ymm30,ymm29,ymm28
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dd b4 f0 34 12 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d
new file mode 100644
index 0000000..1fb280b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d
@@ -0,0 +1,44 @@
+#as: -mevexwig=1
+#objdump: -dw
+#name: x86_64 AVX512VL/VAES wig insns
+#source: x86-64-avx512vl_vaes-wig.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 de f4[ 	]*vaesdec %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 df b4 f0 23 01 00 00[ 	]*vaesdeclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 df f4[ 	]*vaesdeclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 df b4 f0 23 01 00 00[ 	]*vaesdeclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dc f4[ 	]*vaesenc %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dc b4 f0 23 01 00 00[ 	]*vaesenc 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dc f4[ 	]*vaesenc %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dc b4 f0 23 01 00 00[ 	]*vaesenc 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dd f4[ 	]*vaesenclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dd b4 f0 23 01 00 00[ 	]*vaesenclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dd f4[ 	]*vaesenclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dd b4 f0 23 01 00 00[ 	]*vaesenclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 de f4[ 	]*vaesdec %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 34 12 00 00[ 	]*vaesdec 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 34 12 00 00[ 	]*vaesdec 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 df b4 f0 34 12 00 00[ 	]*vaesdeclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 df f4[ 	]*vaesdeclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 df b4 f0 34 12 00 00[ 	]*vaesdeclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dc f4[ 	]*vaesenc %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dc b4 f0 34 12 00 00[ 	]*vaesenc 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dc f4[ 	]*vaesenc %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dc b4 f0 34 12 00 00[ 	]*vaesenc 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dd f4[ 	]*vaesenclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dd b4 f0 34 12 00 00[ 	]*vaesenclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dd f4[ 	]*vaesenclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dd b4 f0 34 12 00 00[ 	]*vaesenclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes.d b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes.d
new file mode 100644
index 0000000..fb87e8d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes.d
@@ -0,0 +1,61 @@
+#as:
+#objdump: -dw
+#name: x86_64 AVX512VL/VAES insns
+#source: x86-64-avx512vl_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 de f4[ 	]*vaesdec %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 de f4[ 	]*vaesdec %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 de 31[ 	]*vaesdec \(%rcx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 df f4[ 	]*vaesdeclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 df b4 f0 23 01 00 00[ 	]*vaesdeclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 df f4[ 	]*vaesdeclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 df b4 f0 23 01 00 00[ 	]*vaesdeclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dc f4[ 	]*vaesenc %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dc b4 f0 23 01 00 00[ 	]*vaesenc 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dc f4[ 	]*vaesenc %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dc b4 f0 23 01 00 00[ 	]*vaesenc 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dd f4[ 	]*vaesenclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dd b4 f0 23 01 00 00[ 	]*vaesenclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dd f4[ 	]*vaesenclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dd b4 f0 23 01 00 00[ 	]*vaesenclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 de f4[ 	]*vaesdec %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 de b4 f0 34 12 00 00[ 	]*vaesdec 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 de f4[ 	]*vaesdec %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 de b4 f0 34 12 00 00[ 	]*vaesdec 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 df f4[ 	]*vaesdeclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 df b4 f0 34 12 00 00[ 	]*vaesdeclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 df f4[ 	]*vaesdeclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 df b4 f0 34 12 00 00[ 	]*vaesdeclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dc f4[ 	]*vaesenc %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dc b4 f0 34 12 00 00[ 	]*vaesenc 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dc f4[ 	]*vaesenc %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dc b4 f0 34 12 00 00[ 	]*vaesenc 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%rdx\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 00 dd f4[ 	]*vaesenclast %xmm28,%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 00 dd b4 f0 34 12 00 00[ 	]*vaesenclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 00 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%rdx\),%xmm29,%xmm30
+[ 	]*[a-f0-9]+:[ 	]*62 02 15 20 dd f4[ 	]*vaesenclast %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 22 15 20 dd b4 f0 34 12 00 00[ 	]*vaesenclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 15 20 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%rdx\),%ymm29,%ymm30
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s
new file mode 100644
index 0000000..0b5b111
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s
@@ -0,0 +1,56 @@
+# Check 64bit AVX512VL,VAES instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vaesdec	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdec	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdec	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
+	vaesdec	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdec	(%rcx), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdec	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdec	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
+	vaesdeclast	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdeclast	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesdeclast	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
+	vaesdeclast	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdeclast	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesdeclast	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
+	vaesenc	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenc	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenc	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
+	vaesenc	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenc	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenc	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
+	vaesenclast	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenclast	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
+	vaesenclast	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
+	vaesenclast	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenclast	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
+	vaesenclast	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
+
+	.intel_syntax noprefix
+	vaesdec	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesdec	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdec	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
+	vaesdec	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesdec	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdec	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
+	vaesdeclast	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesdeclast	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdeclast	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
+	vaesdeclast	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesdeclast	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesdeclast	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
+	vaesenc	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesenc	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenc	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
+	vaesenc	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesenc	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenc	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
+	vaesenclast	xmm30, xmm29, xmm28	 # AVX512VL,VAES
+	vaesenclast	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenclast	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
+	vaesenclast	ymm30, ymm29, ymm28	 # AVX512VL,VAES
+	vaesenclast	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
+	vaesenclast	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
diff --git a/gas/testsuite/gas/i386/x86-64-vaes-intel.d b/gas/testsuite/gas/i386/x86-64-vaes-intel.d
new file mode 100644
index 0000000..0a8b385
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-vaes-intel.d
@@ -0,0 +1,30 @@
+#objdump: -dwMintel
+#name: x86-64 VAES (Intel disassembly)
+#source: x86-64-vaes.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast ymm7,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast ymm7,ymm6,YMMWORD PTR \[rcx\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-vaes.d b/gas/testsuite/gas/i386/x86-64-vaes.d
new file mode 100644
index 0000000..4ca814f
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-vaes.d
@@ -0,0 +1,29 @@
+#objdump: -dw
+#name: x86-64 VAES
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dc d4       	vaesenc %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dc 39       	vaesenc \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d dd 39       	vaesenclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d de d4       	vaesdec %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d de 39       	vaesdec \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 4d df 39       	vaesdeclast \(%rcx\),%ymm6,%ymm7
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-vaes.s b/gas/testsuite/gas/i386/x86-64-vaes.s
new file mode 100644
index 0000000..083e659
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-vaes.s
@@ -0,0 +1,30 @@
+# Check 64bit VAES instructions
+
+	.allow_index_reg
+	.text
+_start:
+# Tests for op ymm/mem256, ymm, ymm
+	vaesenc %ymm4,%ymm6,%ymm2
+	vaesenc (%rcx),%ymm6,%ymm7
+	vaesenclast %ymm4,%ymm6,%ymm2
+	vaesenclast (%rcx),%ymm6,%ymm7
+	vaesdec %ymm4,%ymm6,%ymm2
+	vaesdec (%rcx),%ymm6,%ymm7
+	vaesdeclast %ymm4,%ymm6,%ymm2
+	vaesdeclast (%rcx),%ymm6,%ymm7
+	
+	.intel_syntax noprefix
+
+# Tests for op ymm/mem256, ymm, ymm
+	vaesenc ymm2,ymm6,ymm4
+	vaesenc ymm7,ymm6,YMMWORD PTR [rcx]
+	vaesenc ymm7,ymm6,[rcx]
+	vaesenclast ymm2,ymm6,ymm4
+	vaesenclast ymm7,ymm6,YMMWORD PTR [rcx]
+	vaesenclast ymm7,ymm6,[rcx]
+	vaesdec ymm2,ymm6,ymm4
+	vaesdec ymm7,ymm6,YMMWORD PTR [rcx]
+	vaesdec ymm7,ymm6,[rcx]
+	vaesdeclast ymm2,ymm6,ymm4
+	vaesdeclast ymm7,ymm6,YMMWORD PTR [rcx]
+	vaesdeclast ymm7,ymm6,[rcx]
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 9df14db..e72c472 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -542,10 +542,10 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_0F38DC) },
+    { PREFIX_TABLE (PREFIX_EVEX_0F38DD) },
+    { PREFIX_TABLE (PREFIX_EVEX_0F38DE) },
+    { PREFIX_TABLE (PREFIX_EVEX_0F38DF) },
     /* E0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -2539,6 +2539,30 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { "vgf2p8mulb",	{ XM, Vex, EXx }, 0 }, 
   },
+  /* PREFIX_EVEX_0F38DC */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vaesenc",       { XM, Vex, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_0F38DD */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vaesenclast",   { XM, Vex, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_0F38DE */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vaesdec",       { XM, Vex, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_0F38DF */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vaesdeclast",   { XM, Vex, EXx }, 0 },
+  },
   /* PREFIX_EVEX_0F3A00 */
   {
     { Bad_Opcode },
@@ -4040,3 +4064,4 @@ static const struct dis386 evex_table[][256] = {
     { PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_6) },
   },
 #endif /* NEED_MOD_TABLE */
+
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index d5e5680..fe9fcd9 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1660,6 +1660,10 @@ enum
   PREFIX_EVEX_0F38CC,
   PREFIX_EVEX_0F38CD,
   PREFIX_EVEX_0F38CF,
+  PREFIX_EVEX_0F38DC,
+  PREFIX_EVEX_0F38DD,
+  PREFIX_EVEX_0F38DE,
+  PREFIX_EVEX_0F38DF,
 
   PREFIX_EVEX_0F3A00,
   PREFIX_EVEX_0F3A01,
@@ -1865,10 +1869,6 @@ enum
   VEX_LEN_0F3841_P_2,
   VEX_LEN_0F385A_P_2_M_0,
   VEX_LEN_0F38DB_P_2,
-  VEX_LEN_0F38DC_P_2,
-  VEX_LEN_0F38DD_P_2,
-  VEX_LEN_0F38DE_P_2,
-  VEX_LEN_0F38DF_P_2,
   VEX_LEN_0F38F2_P_0,
   VEX_LEN_0F38F3_R_1_P_0,
   VEX_LEN_0F38F3_R_2_P_0,
@@ -2191,10 +2191,6 @@ enum
   VEX_W_0F3879_P_2,
   VEX_W_0F38CF_P_2,
   VEX_W_0F38DB_P_2,
-  VEX_W_0F38DC_P_2,
-  VEX_W_0F38DD_P_2,
-  VEX_W_0F38DE_P_2,
-  VEX_W_0F38DF_P_2,
   VEX_W_0F3A00_P_2,
   VEX_W_0F3A01_P_2,
   VEX_W_0F3A02_P_2,
@@ -6394,28 +6390,28 @@ static const struct dis386 prefix_table[][4] = {
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F38DC_P_2) },
+    { "vaesenc",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38DD */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F38DD_P_2) },
+    { "vaesenclast",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38DE */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F38DE_P_2) },
+    { "vaesdec",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38DF */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F38DF_P_2) },
+    { "vaesdeclast",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38F2 */
@@ -9940,26 +9936,6 @@ static const struct dis386 vex_len_table[][2] = {
     { VEX_W_TABLE (VEX_W_0F38DB_P_2) },
   },
 
-  /* VEX_LEN_0F38DC_P_2 */
-  {
-    { VEX_W_TABLE (VEX_W_0F38DC_P_2) },
-  },
-
-  /* VEX_LEN_0F38DD_P_2 */
-  {
-    { VEX_W_TABLE (VEX_W_0F38DD_P_2) },
-  },
-
-  /* VEX_LEN_0F38DE_P_2 */
-  {
-    { VEX_W_TABLE (VEX_W_0F38DE_P_2) },
-  },
-
-  /* VEX_LEN_0F38DF_P_2 */
-  {
-    { VEX_W_TABLE (VEX_W_0F38DF_P_2) },
-  },
-
   /* VEX_LEN_0F38F2_P_0 */
   {
     { "andnS",		{ Gdq, VexGdq, Edq }, 0 },
@@ -11331,22 +11307,6 @@ static const struct dis386 vex_w_table[][2] = {
     { "vaesimc",	{ XM, EXx }, 0 },
   },
   {
-    /* VEX_W_0F38DC_P_2 */
-    { "vaesenc",	{ XM, Vex128, EXx }, 0 },
-  },
-  {
-    /* VEX_W_0F38DD_P_2 */
-    { "vaesenclast",	{ XM, Vex128, EXx }, 0 },
-  },
-  {
-    /* VEX_W_0F38DE_P_2 */
-    { "vaesdec",	{ XM, Vex128, EXx }, 0 },
-  },
-  {
-    /* VEX_W_0F38DF_P_2 */
-    { "vaesdeclast",	{ XM, Vex128, EXx }, 0 },
-  },
-  {
     /* VEX_W_0F3A00_P_2 */
     { Bad_Opcode },
     { "vpermq",		{ XM, EXx, Ib }, 0 },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index b81e80e..47a9ddb 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -269,6 +269,8 @@ static initializer cpu_flag_init[] =
     "CpuCET" },
   { "CPU_GFNI_FLAGS",
     "CpuGFNI" },
+  { "CPU_VAES_FLAGS",
+    "CpuVAES" },
   { "CPU_ANY_X87_FLAGS",
     "CPU_ANY_287_FLAGS|Cpu8087" },
   { "CPU_ANY_287_FLAGS",
@@ -535,6 +537,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuPTWRITE),
   BITFIELD (CpuCET),
   BITFIELD (CpuGFNI),
+  BITFIELD (CpuVAES),
   BITFIELD (CpuRegMMX),
   BITFIELD (CpuRegXMM),
   BITFIELD (CpuRegYMM),
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 0b2a39e..7feeb16 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -23,966 +23,973 @@
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
-      1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, [...]

[diff truncated at 100000 bytes]



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