[binutils-gdb] AArch64/opcodes: Correct an `index' global shadowing error

[Maciej W.Rozycki]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=eaf0270367cea4695d461261eb7fbd16caaeacf1

commit eaf0270367cea4695d461261eb7fbd16caaeacf1
Author: Maciej W. Rozycki <macro@imgtec.com>
Date:   Tue Oct 18 04:36:01 2016 +0100

    AArch64/opcodes: Correct an `index' global shadowing error
    
    Fix a commit 4df068de5214 ("Add support for SVE addressing modes") build
    regression:
    
    cc1: warnings being treated as errors
    .../opcodes/aarch64-dis.c: In function 'aarch64_ext_sve_addr_rr_lsl':
    .../opcodes/aarch64-dis.c:1324: error: declaration of 'index' shadows a global declaration
    /usr/include/string.h:303: error: shadowed declaration is here
    make[3]: *** [aarch64-dis.lo] Error 1
    
    in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
    line options used when compiling the binutils.").
    
    	opcodes/
    	* aarch64-dis.c (aarch64_ext_sve_addr_rr_lsl): Rename `index'
    	local variable to `index_regno'.

Diff:
---
 opcodes/ChangeLog     | 5 +++++
 opcodes/aarch64-dis.c | 8 ++++----
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index e3cba76..3092e22 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* aarch64-dis.c (aarch64_ext_sve_addr_rr_lsl): Rename `index'
+	local variable to `index_regno'.
+
 2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
 
 	* arc-tbl.h: Removed any "inv.+" instructions from the table.
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index d8c5fa7..188006e 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -1321,14 +1321,14 @@ aarch64_ext_sve_addr_rr_lsl (const aarch64_operand *self,
 			     aarch64_opnd_info *info, aarch64_insn code,
 			     const aarch64_inst *inst ATTRIBUTE_UNUSED)
 {
-  int index;
+  int index_regno;
 
-  index = extract_field (self->fields[1], code, 0);
-  if (index == 31 && (self->flags & OPD_F_NO_ZR) != 0)
+  index_regno = extract_field (self->fields[1], code, 0);
+  if (index_regno == 31 && (self->flags & OPD_F_NO_ZR) != 0)
     return 0;
 
   info->addr.base_regno = extract_field (self->fields[0], code, 0);
-  info->addr.offset.regno = index;
+  info->addr.offset.regno = index_regno;
   info->addr.offset.is_reg = TRUE;
   info->addr.writeback = FALSE;
   info->addr.preind = TRUE;