[binutils-gdb] Avoid creating symbol table entries for registers

[Alan Modra]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=58a6d3c9d8d4d4be8f1dfc1a49fed264dceddaba

commit 58a6d3c9d8d4d4be8f1dfc1a49fed264dceddaba
Author: Andrew Waterman <andrew@sifive.com>
Date:   Tue Dec 20 14:25:33 2016 -0800

    Avoid creating symbol table entries for registers
    
    Instructions like "jal t0, foo" were erroneously creating symbol table
    entries for t0 as well as foo, which causes linking problems.  Fix by
    reordering instruction alternatives so that t0 is first attempted to
    be parsed as a register, rather than as a symbol.
    
    	* riscv-opc.c (riscv_opcodes): Reorder jal and call entries.

Diff:
---
 opcodes/ChangeLog   | 4 ++++
 opcodes/riscv-opc.c | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d009f23..128bb23 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2016-12-21 Andrew Waterman <andrew@sifive.com>
+
+	* riscv-opc.c (riscv_opcodes): Reorder jal and call entries.
+
 2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* mips-dis.c (mips_arch_choices): Use ISA_MIPS64 rather than
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 3c732fd..464078d 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -143,11 +143,11 @@ const struct riscv_opcode riscv_opcodes[] =
 {"jalr",      "I",   "d,s,j",  MATCH_JALR, MASK_JALR, match_opcode, 0 },
 {"j",         "C",   "Ca",  MATCH_C_J, MASK_C_J, match_opcode, INSN_ALIAS },
 {"j",         "I",   "a",  MATCH_JAL, MASK_JAL | MASK_RD, match_opcode, INSN_ALIAS },
+{"jal",       "I",   "d,a",  MATCH_JAL, MASK_JAL, match_opcode, 0 },
 {"jal",       "32C", "Ca",  MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS },
 {"jal",       "I",   "a",  MATCH_JAL | (X_RA << OP_SH_RD), MASK_JAL | MASK_RD, match_opcode, INSN_ALIAS },
-{"jal",       "I",   "d,a",  MATCH_JAL, MASK_JAL, match_opcode, 0 },
-{"call",      "I",   "c", (X_T1 << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL,  match_never, INSN_MACRO },
 {"call",      "I",   "d,c", (X_T1 << OP_SH_RS1), (int) M_CALL,  match_never, INSN_MACRO },
+{"call",      "I",   "c", (X_T1 << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL,  match_never, INSN_MACRO },
 {"tail",      "I",   "c", (X_T1 << OP_SH_RS1), (int) M_CALL,  match_never, INSN_MACRO },
 {"jump",      "I",   "c,s", 0, (int) M_CALL,  match_never, INSN_MACRO },
 {"nop",       "C",   "",  MATCH_C_ADDI, 0xffff, match_opcode, INSN_ALIAS },