src ld/testsuite/ChangeLog ld/testsuite/ld-mip ...

[nickc@sourceware.org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	nickc@sourceware.org	2009-07-17 09:46:00

Modified files:
	ld/testsuite   : ChangeLog 
	ld/testsuite/ld-mips-elf: pic-and-nonpic-3b.dd 
	                          pic-and-nonpic-5b.dd 
	                          pic-and-nonpic-6-o32.dd 
	bfd            : ChangeLog elfxx-mips.c 

Log message:
	* elfxx-mips.c (LOAD_INTERLOCKS_P): New define.
	(_bfd_mips_elf_size_dynamic_sections): For CPUs without load
	interlocking, the last PLT entry needs a nop in the branch delay slot.
	(_bfd_mips_elf_finish_dynamic_symbol): For CPUs with load itnerlocking,
	output the last two PLT entries in reverse order.
	
	* ld-mips-elf/pic-and-nonpic-3b.dd,
	ld-mips-elf/pic-and-nonpic-5b.dd,
	ld-mips-elf/pic-and-nonpic-6-o32.dd: Updated to use new PLT entries.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1129&r2=1.1130
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.dd.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.dd.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.dd.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.4694&r2=1.4695
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/bfd/elfxx-mips.c.diff?cvsroot=src&r1=1.255&r2=1.256