src cpu/ChangeLog cpu/m32c.cpu opcodes/ChangeL ...

dj@sourceware.org dj@sourceware.org
Wed Mar 21 02:53:00 GMT 2007


CVSROOT:	/cvs/src
Module name:	src
Changes by:	dj@sourceware.org	2007-03-21 02:53:51

Modified files:
	cpu            : ChangeLog m32c.cpu 
	opcodes        : ChangeLog m32c-asm.c m32c-desc.c m32c-desc.h 
	                 m32c-dis.c m32c-ibld.c m32c-opc.c m32c-opc.h 

Log message:
	* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
	mem20): New.
	(src16-16-20-An-relative-*): New.
	(dst16-*-20-An-relative-*): New.
	(dst16-16-16sa-*): New
	(dst16-16-16ar-*): New
	(dst32-16-16sa-Unprefixed-*): New
	(jsri): Fix operands.
	(setzx): Fix encoding.
	
	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Regenerate.
	* m32c-desc.h: Regenerate.
	* m32c-dis.h: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ChangeLog.diff?cvsroot=src&r1=1.73&r2=1.74
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/m32c.cpu.diff?cvsroot=src&r1=1.13&r2=1.14
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1037&r2=1.1038
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-asm.c.diff?cvsroot=src&r1=1.11&r2=1.12
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-desc.c.diff?cvsroot=src&r1=1.14&r2=1.15
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-desc.h.diff?cvsroot=src&r1=1.9&r2=1.10
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-dis.c.diff?cvsroot=src&r1=1.10&r2=1.11
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-ibld.c.diff?cvsroot=src&r1=1.9&r2=1.10
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-opc.c.diff?cvsroot=src&r1=1.13&r2=1.14
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-opc.h.diff?cvsroot=src&r1=1.11&r2=1.12



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