src opcodes/ChangeLog opcodes/i386-dis.c opcod ...

[hjl@sourceware.org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	hjl@sourceware.org	2007-08-31 18:48:29

Modified files:
	opcodes        : ChangeLog i386-dis.c i386-opc.tbl i386-tbl.h 
	gas/testsuite  : ChangeLog 
	gas/testsuite/gas/i386: svme.d svme.s svme64.d 

Log message:
	gas/testsuite/
	
	2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
	
	* gas/i386/svme.s: Updated to accept eax in 32bit and rax in
	64bit.
	* gas/i386/svme.d: Updated.
	* gas/i386/svme64.d: Likewise.
	
	opcodes/
	
	2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
	
	* i386-dis.c (SVME_Fixup): Removed.
	(OPC_EXT_39): New.
	(OPC_EXT_RM_6): Likewise.
	(grps): Use OPC_EXT_39.
	(opc_ext_table): Add OPC_EXT_39.
	(opc_ext_rm_table): Add OPC_EXT_RM_6.
	
	* i386-opc.tbl: Correct SVME instructions to take register
	operand only.
	* i386-tbl.h: Regenerated.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1125&r2=1.1126
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/i386-dis.c.diff?cvsroot=src&r1=1.139&r2=1.140
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/i386-opc.tbl.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/i386-tbl.h.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1215&r2=1.1216
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/i386/svme.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/i386/svme.s.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/i386/svme64.d.diff?cvsroot=src&r1=1.1&r2=1.2