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[patch][rfa] Representation of ISA Attribute in CGEN
- From: Dave Brolley <brolley at redhat dot com>
- To: cgen at sources dot redhat dot com, binutils at sources dot redhat dot com, gdb-patches at sources dot redhat dot com, sid at sources dot redhat dot com
- Date: Thu, 22 Sep 2005 16:53:55 -0400
- Subject: [patch][rfa] Representation of ISA Attribute in CGEN
Hi,
These changes have been in our local tree for a few years now and were
developed for an internal port which requires *much* more than 32 ISAs
or even 64 ISAs. These changes could be of benifit to others, so I would
like to submit them for approval.
Currently, ISA is represented as an integer, like all the other
non-boolean attributes. It is a bit mask with each bit representing
whether a particular ISA is supported. Our port requires that there be
no fixed limit on the number of ISAs, and so, we developed an open-ended
representation for a bitset using a bitstring and a length. It is called
CGEN_BITSET and is declared in include/opcode/cgen-bitset.h and
supported by several new functions in opcodes/cgen-opc.c. All
manipulation of these bitsets is done using these functions which hide
the internal representation. See cgen-bitset.h (attached) for a
description of the implementation
The patch has 3 parts:
1) Extension of CGEN_ATTR_VALUE_TYPE to be a union allowing the use of
CGEN_BITSET as well as its supporting macros.
2) Changes to CGEN so that it generates code to correctly access and
initialize the new definition of CGEN_ATTR_VALUE_TYPE and to use the
proper cover functions when manipulating ISAs.
3) Changes to hand written portions of existing opcodes, sim and sid
ports as in 2). Fortunately, the use of existing CGEN macros made these
changes minimal.
I have also included in the patch the regenerated source for the frv
port so that you can see the effect on the generated code. None of the
generated code for existing sid ports is affected.
One natural extension of this work would be use the same representation
for all bitset attributes in CGEN. I believe that MACH is the only other
one at this time.
Seeking comments and approval to commit.
Thanks,
Dave
cgen/ChangeLog:
2005-09-19 Dave Brolley <brolley@redhat.com>
* attr.scm (gen-value-for-defn-raw): New methods.
(gen-value-for-defn): Don't test for 'SID-SIMULATOR. Call
gen-value-for-defn-raw.
* sid.scm (gen-obj-attr-sid-defn): Call gen-value-for-defn-raw.
2002-12-13 Dave Brolley <brolley@redhat.com>
* utils-cgen.scm (gen-attr-type): Moved from sid.scm.
(-gen-attr-accessors): New function.
(gen-obj-attr-defn): Update terminating initializer.
(gen-obj-attr-end-defn): New function.
* sid.scm (gen-attr-type): Moved to utils-cgen.scm.
* sid-cpu.scm (cgen-desc.h): Generate code to include
"opcode/cgen-bitset.h"
* intrinsics.scm (kept-insn-isas): Correct the extraction of the isa
name.
* desc.scm ('gen-defn): Update terminating initializer.
* desc-cpu.scm (gen-ifld-decls): Call -gen-attr-accessors. Update
terminatinig initializer.
(gen-hw-decls): Ditto.
(gen-operand-decls): Ditto.
(gen-insn-decls): Ditto.
(-gen-hash-defines): Generate code to include "opcde/cgen-bitset.h"
(gen-insn-table): Update terminating initializer.
(-gen-cpu-open): Update generation of @arch@_cgen_rebuild_tables,
@arch@_cgen_cpu_open, @arch@_cgen_cpu_close.
* attr.scm (charmask-bytes): New function.
(bitset-attr->charmask): New function.
(<bitset-attribute>): Handle isa-attributes specially. Also handle
differences for SID-SIMULATOR.
(<integer-attribute>): Handle differences for SID-SIMULATOR.
(<enum-attribute>): Ditto.
include/ChangeLog:
2003-09-29 Dave Brolley <brolley@redhat.com>
* dis-asm.h (disassemble_info): insn_sets now (void *) to allow for
more exotic underlying types to be used.
include/opcode/ChangeLog:
2005-02-16 Dave Brolley <brolley@redhat.com>
* cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
cgen_isa_mask_* to cgen_bitset_*.
* cgen.h: Likewise.
2003-10-21 Richard Sandiford <rsandifo@redhat.com>
* cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition.
(CGEN_ATTR_ENTRY): Change "value" to type "unsigned".
(CGEN_CPU_TABLE): Make isas a ponter.
2003-09-29 Dave Brolley <brolley@redhat.com>
* cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef.
(CGEN_ATTR_VALUE_ENUM_TYPE): Ditto.
(CGEN_ATTR_VALUE_TYPE): Use these new typedefs.
2002-12-13 Dave Brolley <brolley@redhat.com>
* cgen.h (symcat.h): #include it.
(cgen-bitset.h): #include it.
(CGEN_ATTR_VALUE_TYPE): Now a union.
(CGEN_ATTR_VALUE): Reference macros generated in opcodes/<arch>-desc.h.
(CGEN_ATTR_ENTRY): 'value' now unsigned.
(cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*).
* cgen-bitset.h: New file.
opcodes/ChangeLog:
2005-09-19 Dave Brolley <brolley@redhat.com>
* disassemble.c (disassemble_init_for_target): Add 'break' to case for
bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
bfd_arch_m32c case.
2005-02-16 Dave Brolley <brolley@redhat.com>
* cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
cgen_isa_mask_* to cgen_bitset_*.
* cgen-opc.c: Likewise.
2003-11-28 Richard Sandiford <rsandifo@redhat.com>
* cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
* *-dis.c: Regenerate.
2003-06-05 DJ Delorie <dj@redhat.com>
* cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
it, as it may point to a reused buffer. Set prev_isas when we
change cpus.
2002-12-13 Dave Brolley <brolley@redhat.com>
* cgen-opc.c (cgen_isa_mask_create): New support function for
CGEN_ISA_MASK.
(cgen_isa_mask_init): Ditto.
(cgen_isa_mask_clear): Ditto.
(cgen_isa_mask_add): Ditto.
(cgen_isa_mask_set): Ditto.
(cgen_isa_supported): Ditto.
(cgen_isa_mask_compare): Ditto.
(cgen_isa_mask_intersection): Ditto.
(cgen_isa_mask_copy): Ditto.
(cgen_isa_mask_combine): Ditto.
* cgen-dis.in (libiberty.h): #include it.
(isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
(print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
* Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
* Makefile.in: Regenerated.
sid/component/cgen-cpu/ChangeLog:
2003-10-07 Dave Brolley <brolley@redhat.com>
* tracedis.cxx (cgen_disassemble): Rename isa_mask to isas. Now
(CGEN_ISA_MASK*).
* tracedis.h (opcode/cgen-bitset.h): #include it.
(cgen_disassemble): Rename isa_mask to isas. Now
(CGEN_ISA_MASK*).
(cgen_bi_endian_cpu::disassemble): 'isas' now (CGEN_ISA_MASK *).
* cgen-cpu.h (opcode/cgen-bitset.h): #include it.
(cgen_bi_endian_cpu::disassemble): 'isas' now (CGEN_ISA_MASK *).
* compCGEN.cxx (cgen_disassemble): Rename isa_mask to isas. Now
(CGEN_ISA_MASK*).
cpu/ChangeLog:
2003-09-24 Dave Brolley <brolley@redhat.com>
* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
Use cgen_bitset_intersect_p.
gas/ChangeLog:
2005-09-19 Dave Brolley <brolley@redhat.com>
* config/tc-m32c.c (default_isa): New static variable.
(m32c_isa): Now of type CGEN_BITSET.
(md_begin): Pass &m32c_isa to m32c_cgen_cpu_open.
sim/frv/ChangeLog:
2003-09-29 Dave Brolley <brolley@redhat.com>
* frv-sim.h: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* mloop.in: Ditto.
* pipeline.c: Ditto.
* traps.c: Ditto.
/* Header file the type CGEN_BITSET.
Copyright 2002, 2005 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger, and the GNU Binutils.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef CGEN_BITSET_H
#define CGEN_BITSET_H
#ifdef __cplusplus
extern "C" {
#endif
/* A bitmask represented as a string.
Each member of the set is represented as a bit
in the string. Bytes are indexed from left to right in the string and
bits from most significant to least within each byte.
For example, the bit representing member number 6 is (set->bits[0] & 0x02).
*/
typedef struct cgen_bitset
{
unsigned length;
char *bits;
} CGEN_BITSET;
extern CGEN_BITSET *cgen_bitset_create PARAMS ((unsigned));
extern void cgen_bitset_init PARAMS ((CGEN_BITSET *, unsigned));
extern void cgen_bitset_clear PARAMS ((CGEN_BITSET *));
extern void cgen_bitset_add PARAMS ((CGEN_BITSET *, unsigned));
extern void cgen_bitset_set PARAMS ((CGEN_BITSET *, unsigned));
extern int cgen_bitset_compare PARAMS ((CGEN_BITSET *, CGEN_BITSET *));
extern void cgen_bitset_union PARAMS ((CGEN_BITSET *, CGEN_BITSET *, CGEN_BITSET *));
extern int cgen_bitset_intersect_p PARAMS ((CGEN_BITSET *, CGEN_BITSET *));
extern int cgen_bitset_contains PARAMS ((CGEN_BITSET *, unsigned));
extern CGEN_BITSET *cgen_bitset_copy PARAMS ((CGEN_BITSET *));
#ifdef __cplusplus
} // extern "C"
#endif
#endif
? include/opcode/cgen-bitset.h
Index: cgen/attr.scm
===================================================================
RCS file: /cvs/src/src/cgen/attr.scm,v
retrieving revision 1.3
diff -c -p -r1.3 attr.scm
*** cgen/attr.scm 16 Jul 2003 05:35:47 -0000 1.3
--- cgen/attr.scm 19 Sep 2005 19:48:42 -0000
***************
*** 1,5 ****
; Attributes.
! ; Copyright (C) 2000 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
--- 1,5 ----
; Attributes.
! ; Copyright (C) 2000, 2003 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
***************
*** 613,618 ****
--- 613,654 ----
(map string->symbol (string-cut (->string x) #\,))
)
+ ; Generate a list representing a bit mask of the indices of 'values'
+ ; within 'all-values'. Each element in the resulting list represents a byte.
+ ; Both bits and bytes are indexed from left to right starting at 0
+ ; with 8 bits in a byte.
+ (define (charmask-bytes values all-values vec-length)
+ (logit 3 "charmask-bytes for " values " " all-values "\n")
+ (let ((result (make-vector vec-length 0))
+ (indices (map (lambda (name)
+ (list-ref (map cadr all-values)
+ (element-lookup-index name (map car all-values) 0)))
+ values)))
+ (logit 3 "indices: " indices "\n")
+ (for-each (lambda (x)
+ (let* ((byteno (quotient x 8))
+ (bitno (- 7 (remainder x 8)))
+ (byteval (logior (vector-ref result byteno)
+ (ash 1 bitno))))
+ (vector-set! result byteno byteval)))
+ indices)
+ (logit 3 "result: " (vector->list result) "\n")
+ (vector->list result))
+ )
+
+ ; Convert a bitset value into a bit string based on the
+ ; index of each member in values
+ (define (bitset-attr->charmask value values)
+ (let* ((values-names (map car values))
+ (values-values (map cadr values))
+ (vec-length (+ 1 (quotient (apply max values-values) 8))))
+ (string-append "{ " (number->string vec-length) ", \""
+ (string-map (lambda (x)
+ (string-append "\\x" (number->hex x)))
+ (charmask-bytes (bitset-attr->list value)
+ values vec-length))
+ "\" }"))
+ )
; Return the enum of ATTR-NAME for type TYPE.
; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
***************
*** 916,922 ****
; (maybe utils-cgen.scm?) and there's only a few of them.
(method-make!
! <boolean-attribute> 'gen-value-for-defn
(lambda (self value)
(if (not value)
"0"
--- 952,958 ----
; (maybe utils-cgen.scm?) and there's only a few of them.
(method-make!
! <boolean-attribute> 'gen-value-for-defn-raw
(lambda (self value)
(if (not value)
"0"
***************
*** 925,954 ****
)
(method-make!
<bitset-attribute> 'gen-value-for-defn
(lambda (self value)
! (string-drop1
! (string-upcase
! (string-map (lambda (x)
! (string-append "|(1<<"
! (gen-sym self)
! "_" (gen-c-symbol x) ")"))
! (bitset-attr->list value)))))
)
(method-make!
<integer-attribute> 'gen-value-for-defn
(lambda (self value)
! (number->string value))
)
(method-make!
! <enum-attribute> 'gen-value-for-defn
(lambda (self value)
(string-upcase
(gen-c-symbol (string-append (obj:str-name self)
"_"
! (symbol->string value)))))
)
; Called before loading a .cpu file to initialize.
--- 961,1042 ----
)
(method-make!
+ <boolean-attribute> 'gen-value-for-defn
+ (lambda (self value)
+ (send self 'gen-value-for-defn-raw value))
+ )
+
+ (method-make!
+ <bitset-attribute> 'gen-value-for-defn-raw
+ (lambda (self value)
+ (if (string=? (string-downcase (gen-sym self)) "isa")
+ (bitset-attr->charmask value (elm-get self 'values))
+ (string-drop1
+ (string-upcase
+ (string-map (lambda (x)
+ (string-append "|(1<<"
+ (gen-sym self)
+ "_" (gen-c-symbol x) ")"))
+ (bitset-attr->list value)))))
+ )
+ )
+
+ (method-make!
<bitset-attribute> 'gen-value-for-defn
(lambda (self value)
! (string-append
! "{ "
! (if (string=? (string-downcase (gen-sym self)) "isa")
! (bitset-attr->charmask value (elm-get self 'values))
! (string-append
! "{ "
! (string-drop1
! (string-upcase
! (string-map (lambda (x)
! (string-append "|(1<<"
! (gen-sym self)
! "_" (gen-c-symbol x) ")"))
! (bitset-attr->list value))))
! ", 0 }"))
! " }")
! )
! )
!
! (method-make!
! <integer-attribute> 'gen-value-for-defn-raw
! (lambda (self value)
! (number->string value)
! )
)
(method-make!
<integer-attribute> 'gen-value-for-defn
(lambda (self value)
! (string-append
! "{ { "
! (send self 'gen-value-for-defn-raw value)
! ", 0 } }")
! )
)
(method-make!
! <enum-attribute> 'gen-value-for-defn-raw
(lambda (self value)
(string-upcase
(gen-c-symbol (string-append (obj:str-name self)
"_"
! (symbol->string value))))
! )
! )
!
! (method-make!
! <enum-attribute> 'gen-value-for-defn
! (lambda (self value)
! (string-append
! "{ { "
! (send self 'gen-value-for-defn-raw value)
! ", 0 } }")
! )
)
; Called before loading a .cpu file to initialize.
Index: cgen/desc-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/desc-cpu.scm,v
retrieving revision 1.21
diff -c -p -r1.21 desc-cpu.scm
*** cgen/desc-cpu.scm 1 Jul 2005 11:16:30 -0000 1.21
--- cgen/desc-cpu.scm 19 Sep 2005 19:48:42 -0000
*************** static const CGEN_MACH @arch@_cgen_mach_
*** 114,119 ****
--- 114,120 ----
"/* Ifield support. */\n\n"
"/* Ifield attribute indices. */\n\n"
(gen-attr-enum-decl "cgen_ifld" (current-ifld-attr-list))
+ (-gen-attr-accessors "cgen_ifld" (current-ifld-attr-list))
(gen-enum-decl 'ifield_type "@arch@ ifield types"
"@ARCH@_"
(append (gen-obj-list-enums (non-derived-ifields (current-ifld-list)))
*************** const CGEN_IFLD @arch@_cgen_ifld_table[]
*** 161,167 ****
" },\n")))
ifld-list)
"\
! { 0, 0, 0, 0, 0, 0, {0, {0}} }
};
#undef A
--- 162,168 ----
" },\n")))
ifld-list)
"\
! { 0, 0, 0, 0, 0, 0, " (gen-obj-attr-end-defn all-attrs num-non-bools) " }
};
#undef A
*************** const CGEN_IFLD @arch@_cgen_ifld_table[]
*** 180,185 ****
--- 181,187 ----
(string-list
"/* Hardware attribute indices. */\n\n"
(gen-attr-enum-decl "cgen_hw" (current-hw-attr-list))
+ (-gen-attr-accessors "cgen_hw" (current-hw-attr-list))
(gen-enum-decl 'cgen_hw_type "@arch@ hardware types"
"HW_" ; FIXME: @ARCH@_
(append (nub (map (lambda (hw)
*************** const CGEN_HW_ENTRY @arch@_cgen_hw_table
*** 281,287 ****
" },\n")))
(current-hw-list))
"\
! { 0, 0, CGEN_ASM_NONE, 0, {0, {0}} }
};
#undef A
--- 283,289 ----
" },\n")))
(current-hw-list))
"\
! { 0, 0, CGEN_ASM_NONE, 0, " (gen-obj-attr-end-defn all-attrs num-non-bools) " }
};
#undef A
*************** const CGEN_HW_ENTRY @arch@_cgen_hw_table
*** 298,303 ****
--- 300,307 ----
(define (-gen-hash-defines)
(logit 2 "Generating #define's ...\n")
(string-list
+ "#include \"opcode/cgen-bitset.h\"\n"
+ "\n"
"#define CGEN_ARCH @arch@\n\n"
"/* Given symbol S, return @arch@_cgen_<S>. */\n"
(gen-define-with-symcat "CGEN_SYM(s) @arch@" "_cgen_" "s")
*************** const CGEN_HW_ENTRY @arch@_cgen_hw_table
*** 365,370 ****
--- 369,375 ----
(string-list
"/* Operand attribute indices. */\n\n"
(gen-attr-enum-decl "cgen_operand" (current-op-attr-list))
+ (-gen-attr-accessors "cgen_operand" (current-op-attr-list))
(gen-enum-decl 'cgen_operand_type "@arch@ operand types"
"@ARCH@_OPERAND_"
(nub (append (gen-obj-list-enums (current-op-list))
*************** const CGEN_OPERAND @arch@_cgen_operand_t
*** 475,481 ****
)))))
(current-op-list))
"/* sentinel */\n\
! { 0, 0, 0, 0, 0,\n { 0, { (const PTR) 0 } },\n { 0, { 0 } } }
};
#undef A
--- 480,486 ----
)))))
(current-op-list))
"/* sentinel */\n\
! { 0, 0, 0, 0, 0,\n { 0, { (const PTR) 0 } },\n " (gen-obj-attr-end-defn all-attrs num-non-bools) " }
};
#undef A
*************** const CGEN_OPERAND @arch@_cgen_operand_t
*** 494,499 ****
--- 499,505 ----
(string-list
"/* Insn attribute indices. */\n\n"
(gen-attr-enum-decl "cgen_insn" (current-insn-attr-list))
+ (-gen-attr-accessors "cgen_insn" (current-insn-attr-list))
)
)
*************** static const CGEN_IBASE @arch@_cgen_insn
*** 552,558 ****
/* Special null first entry.
A `num' value of zero is thus invalid.
Also, the special `invalid' insn resides here. */
! { 0, 0, 0, 0, {0, {0}} },\n"
(lambda ()
(string-write-map (lambda (insn)
--- 558,564 ----
/* Special null first entry.
A `num' value of zero is thus invalid.
Also, the special `invalid' insn resides here. */
! { 0, 0, 0, 0, " (gen-obj-attr-end-defn all-attrs num-non-bools) " },\n"
(lambda ()
(string-write-map (lambda (insn)
*************** static void
*** 696,702 ****
@arch@_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
{
int i;
! unsigned int isas = cd->isas;
unsigned int machs = cd->machs;
cd->int_insn_p = CGEN_INT_INSN_P;
--- 702,708 ----
@arch@_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
{
int i;
! CGEN_BITSET *isas = cd->isas;
unsigned int machs = cd->machs;
cd->int_insn_p = CGEN_INT_INSN_P;
*************** static void
*** 708,714 ****
cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cd->max_insn_bitsize = 0;
for (i = 0; i < MAX_ISAS; ++i)
! if (((1 << i) & isas) != 0)
{
const CGEN_ISA *isa = & @arch@_cgen_isa_table[i];
--- 714,720 ----
cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cd->max_insn_bitsize = 0;
for (i = 0; i < MAX_ISAS; ++i)
! if (cgen_bitset_contains (isas, i))
{
const CGEN_ISA *isa = & @arch@_cgen_isa_table[i];
*************** CGEN_CPU_DESC
*** 793,799 ****
{
CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
static int init_p;
! unsigned int isas = 0; /* 0 = \"unspecified\" */
unsigned int machs = 0; /* 0 = \"unspecified\" */
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
va_list ap;
--- 799,805 ----
{
CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
static int init_p;
! CGEN_BITSET *isas = 0; /* 0 = \"unspecified\" */
unsigned int machs = 0; /* 0 = \"unspecified\" */
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
va_list ap;
*************** CGEN_CPU_DESC
*** 812,818 ****
switch (arg_type)
{
case CGEN_CPU_OPEN_ISAS :
! isas = va_arg (ap, unsigned int);
break;
case CGEN_CPU_OPEN_MACHS :
machs = va_arg (ap, unsigned int);
--- 818,824 ----
switch (arg_type)
{
case CGEN_CPU_OPEN_ISAS :
! isas = va_arg (ap, CGEN_BITSET *);
break;
case CGEN_CPU_OPEN_MACHS :
machs = va_arg (ap, unsigned int);
*************** CGEN_CPU_DESC
*** 843,851 ****
machs = (1 << MAX_MACHS) - 1;
/* Base mach is always selected. */
machs |= 1;
- /* ISA unspecified means \"all\". */
- if (isas == 0)
- isas = (1 << MAX_ISAS) - 1;
if (endian == CGEN_ENDIAN_UNKNOWN)
{
/* ??? If target has only one, could have a default. */
--- 849,854 ----
*************** CGEN_CPU_DESC
*** 853,859 ****
abort ();
}
! cd->isas = isas;
cd->machs = machs;
cd->endian = endian;
/* FIXME: for the sparc case we can determine insn-endianness statically.
--- 856,862 ----
abort ();
}
! cd->isas = cgen_bitset_copy (isas);
cd->machs = machs;
cd->endian = endian;
/* FIXME: for the sparc case we can determine insn-endianness statically.
Index: cgen/desc.scm
===================================================================
RCS file: /cvs/src/src/cgen/desc.scm,v
retrieving revision 1.4
diff -c -p -r1.4 desc.scm
*** cgen/desc.scm 16 Jul 2003 05:35:47 -0000 1.4
--- cgen/desc.scm 19 Sep 2005 19:48:42 -0000
***************
*** 1,5 ****
; General cpu info generator support.
! ; Copyright (C) 2000 Red Hat, Inc.
; This file is part of CGEN.
;
; This file generates C versions of the more salient parts of the description
--- 1,5 ----
; General cpu info generator support.
! ; Copyright (C) 2000, 2003 Red Hat, Inc.
; This file is part of CGEN.
;
; This file generates C versions of the more salient parts of the description
*************** static const CGEN_ATTR_ENTRY bool_attr[]
*** 128,134 ****
(if (string? (cadr e))
(cadr e)
(number->string (cadr e))) ; value
! ", {0, {0}}, 0, 0"
" },\n"
))
(elm-get self 'values)))
--- 128,134 ----
(if (string? (cadr e))
(cadr e)
(number->string (cadr e))) ; value
! ", {0, {{{0, 0}}}}, 0, 0"
" },\n"
))
(elm-get self 'values)))
Index: cgen/mach.scm
===================================================================
RCS file: /cvs/src/src/cgen/mach.scm,v
retrieving revision 1.9
diff -c -p -r1.9 mach.scm
*** cgen/mach.scm 15 Jun 2005 21:28:18 -0000 1.9
--- cgen/mach.scm 19 Sep 2005 19:48:42 -0000
***************
*** 1,5 ****
; CPU architecture description.
! ; Copyright (C) 2000 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
--- 1,5 ----
; CPU architecture description.
! ; Copyright (C) 2000, 2003 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
***************
*** 902,909 ****
(apply min (cons 65535
(map insn-length (find (lambda (insn)
(and (not (has-attr? insn 'ALIAS))
! (eq? (obj-attr-value insn 'ISA)
! (obj:name isa))))
(non-multi-insns (current-insn-list))))))
)
--- 902,908 ----
(apply min (cons 65535
(map insn-length (find (lambda (insn)
(and (not (has-attr? insn 'ALIAS))
! (isa-supports? isa insn)))
(non-multi-insns (current-insn-list))))))
)
***************
*** 913,920 ****
(apply max (cons 0
(map insn-length (find (lambda (insn)
(and (not (has-attr? insn 'ALIAS))
! (eq? (obj-attr-value insn 'ISA)
! (obj:name isa))))
(non-multi-insns (current-insn-list))))))
)
--- 912,918 ----
(apply max (cons 0
(map insn-length (find (lambda (insn)
(and (not (has-attr? insn 'ALIAS))
! (isa-supports? isa insn)))
(non-multi-insns (current-insn-list))))))
)
Index: cgen/sid-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/sid-cpu.scm,v
retrieving revision 1.13
diff -c -p -r1.13 sid-cpu.scm
*** cgen/sid-cpu.scm 29 Jul 2005 19:25:33 -0000 1.13
--- cgen/sid-cpu.scm 19 Sep 2005 19:48:42 -0000
***************
*** 80,85 ****
--- 80,87 ----
#ifndef DESC_@ARCH@_H
#define DESC_@ARCH@_H
+ #include \"opcode/cgen-bitset.h\"
+
namespace @arch@ {
\n"
*************** using namespace cgen;
*** 650,660 ****
"_memory")
m 1))
modes)))
-
(logit 2 "Generating writer function ...\n")
(string-append
"
-
void @prefix@::write_stacks::writeback (int tick, @cpu@::@cpu@_cpu* current_cpu)
{
"
--- 652,660 ----
Index: cgen/sid.scm
===================================================================
RCS file: /cvs/src/src/cgen/sid.scm,v
retrieving revision 1.15
diff -c -p -r1.15 sid.scm
*** cgen/sid.scm 15 Jun 2005 21:28:19 -0000 1.15
--- cgen/sid.scm 19 Sep 2005 19:48:42 -0000
***************
*** 230,236 ****
(attr-default attr))))
; FIXME: Are we missing attr-prefix here?
(string-append ", "
! (send attr 'gen-value-for-defn val))))
all-non-bools)))
" }"))
)
--- 230,236 ----
(attr-default attr))))
; FIXME: Are we missing attr-prefix here?
(string-append ", "
! (send attr 'gen-value-for-defn-raw val))))
all-non-bools)))
" }"))
)
Index: cgen/utils-cgen.scm
===================================================================
RCS file: /cvs/src/src/cgen/utils-cgen.scm,v
retrieving revision 1.6
diff -c -p -r1.6 utils-cgen.scm
*** cgen/utils-cgen.scm 16 Dec 2004 21:24:07 -0000 1.6
--- cgen/utils-cgen.scm 19 Sep 2005 19:48:42 -0000
***************
*** 1,5 ****
; CGEN Utilities.
! ; Copyright (C) 2000 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
;
--- 1,5 ----
; CGEN Utilities.
! ; Copyright (C) 2000, 2002, 2003 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
;
***************
*** 467,472 ****
--- 467,530 ----
; Attributes
+ ; Return the C/C++ type to use to hold a value for attribute ATTR.
+
+ (define (gen-attr-type attr)
+ (if (string=? (string-downcase (gen-sym attr)) "isa")
+ "CGEN_BITSET"
+ (case (attr-kind attr)
+ ((boolean) "int")
+ ((bitset) "unsigned int")
+ ((integer) "int")
+ ((enum) (string-append "enum " (string-downcase (gen-sym attr)) "_attr"))
+ ))
+ )
+
+ ; Return C macros for accessing an object's attributes ATTRS.
+ ; PREFIX is one of "cgen_ifld", "cgen_hw", "cgen_operand", "cgen_insn".
+ ; ATTRS is an alist of attribute values. The value is unimportant except that
+ ; it is used to determine bool/non-bool.
+ ; Non-bools need to be separated from bools as they're each recorded
+ ; differently. Non-bools are recorded in an int for each. All bools are
+ ; combined into one int to save space.
+ ; ??? We assume there is at least one bool.
+
+ (define (-gen-attr-accessors prefix attrs)
+ (string-append
+ "/* " prefix " attribute accessor macros. */\n"
+ (string-map (lambda (attr)
+ (string-append
+ "#define CGEN_ATTR_"
+ (string-upcase prefix)
+ "_"
+ (string-upcase (gen-sym attr))
+ "_VALUE(attrs) "
+ (if (bool-attr? attr)
+ (string-append
+ "(((attrs)->bool & (1 << "
+ (string-upcase prefix)
+ "_"
+ (string-upcase (gen-sym attr))
+ ")) != 0)")
+ (string-append
+ "((attrs)->nonbool["
+ (string-upcase prefix)
+ "_"
+ (string-upcase (gen-sym attr))
+ "-"
+ (string-upcase prefix)
+ "_START_NBOOLS-1]."
+ (case (attr-kind attr)
+ ((bitset)
+ (if (string=? (string-downcase (gen-sym attr)) "isa")
+ ""
+ "non"))
+ (else "non"))
+ "bitset)"))
+ "\n"))
+ attrs)
+ "\n")
+ )
; Return C code to declare an enum of attributes ATTRS.
; PREFIX is one of "cgen_ifld", "cgen_hw", "cgen_operand", "cgen_insn".
; ATTRS is an alist of attribute values. The value is unimportant except that
***************
*** 565,570 ****
--- 623,649 ----
))
)
+ ; Return the C definition of the terminating entry of an object's attributes.
+ ; ALL-ATTRS is an ordered alist of all attributes.
+ ; "ordered" means all the non-boolean attributes are at the front and
+ ; duplicate entries have been removed.
+
+ (define (gen-obj-attr-end-defn all-attrs num-non-bools)
+ (let ((all-non-bools (list-take num-non-bools all-attrs)))
+ (string-append
+ "{ 0, {"
+ (if (null? all-non-bools)
+ " { 0, 0 }"
+ (string-drop1 ; drop the leading ","
+ (string-map (lambda (attr)
+ (let ((val (attr-default attr)))
+ ; FIXME: Are we missing attr-prefix here?
+ (string-append ", "
+ (send attr 'gen-value-for-defn val))))
+ all-non-bools)))
+ " } }"
+ ))
+ )
; Return a boolean indicating if ATLIST indicates a CTI insn.
(define (atlist-cti? atlist)
Index: cpu/frv.opc
===================================================================
RCS file: /cvs/src/src/cpu/frv.opc,v
retrieving revision 1.13
diff -c -p -r1.13 frv.opc
*** cpu/frv.opc 1 Jul 2005 11:16:30 -0000 1.13
--- cpu/frv.opc 19 Sep 2005 19:48:42 -0000
***************
*** 50,56 ****
#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
! typedef CGEN_ATTR_VALUE_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
typedef struct
{
--- 50,56 ----
#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
! typedef CGEN_ATTR_VALUE_ENUM_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
typedef struct
{
*************** typedef struct
*** 58,72 ****
int constraint_violation;
unsigned long mach;
unsigned long elf_flags;
! CGEN_ATTR_VALUE_TYPE * unit_mapping;
VLIW_COMBO * current_vliw;
! CGEN_ATTR_VALUE_TYPE major[FRV_VLIW_SIZE];
const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW;
! int frv_is_branch_major (CGEN_ATTR_VALUE_TYPE, unsigned long);
! int frv_is_float_major (CGEN_ATTR_VALUE_TYPE, unsigned long);
! int frv_is_media_major (CGEN_ATTR_VALUE_TYPE, unsigned long);
int frv_is_branch_insn (const CGEN_INSN *);
int frv_is_float_insn (const CGEN_INSN *);
int frv_is_media_insn (const CGEN_INSN *);
--- 58,72 ----
int constraint_violation;
unsigned long mach;
unsigned long elf_flags;
! CGEN_ATTR_VALUE_ENUM_TYPE * unit_mapping;
VLIW_COMBO * current_vliw;
! CGEN_ATTR_VALUE_ENUM_TYPE major[FRV_VLIW_SIZE];
const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW;
! int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
! int frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
! int frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_branch_insn (const CGEN_INSN *);
int frv_is_float_insn (const CGEN_INSN *);
int frv_is_media_insn (const CGEN_INSN *);
*************** int spr_valid (long);
*** 83,89 ****
development tree. */
bfd_boolean
! frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
switch (mach)
{
--- 83,89 ----
development tree. */
bfd_boolean
! frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
{
switch (mach)
{
*************** frv_is_branch_major (CGEN_ATTR_VALUE_TYP
*** 107,113 ****
/* Returns TRUE if {MAJOR,MACH} supports floating point insns. */
bfd_boolean
! frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
switch (mach)
{
--- 107,113 ----
/* Returns TRUE if {MAJOR,MACH} supports floating point insns. */
bfd_boolean
! frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
{
switch (mach)
{
*************** frv_is_float_major (CGEN_ATTR_VALUE_TYPE
*** 126,132 ****
/* Returns TRUE if {MAJOR,MACH} supports media insns. */
bfd_boolean
! frv_is_media_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
switch (mach)
{
--- 126,132 ----
/* Returns TRUE if {MAJOR,MACH} supports media insns. */
bfd_boolean
! frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
{
switch (mach)
{
*************** static VLIW_COMBO fr550_allowed_vliw[] =
*** 270,276 ****
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 270,276 ----
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** static CGEN_ATTR_VALUE_TYPE fr400_unit_m
*** 305,311 ****
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 305,311 ----
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** static CGEN_ATTR_VALUE_TYPE fr450_unit_m
*** 337,343 ****
/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */
};
! static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 337,343 ----
/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */
};
! static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** static CGEN_ATTR_VALUE_TYPE fr500_unit_m
*** 369,375 ****
/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
};
! static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 369,375 ----
/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
};
! static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** frv_vliw_reset (FRV_VLIW *vliw, unsigned
*** 435,441 ****
*_allowed_vliw tables above. */
static bfd_boolean
match_unit (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE unit1, CGEN_ATTR_VALUE_TYPE unit2)
{
/* Map any specialized implementation units to actual ones. */
unit1 = vliw->unit_mapping[unit1];
--- 435,441 ----
*_allowed_vliw tables above. */
static bfd_boolean
match_unit (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE unit1, CGEN_ATTR_VALUE_ENUM_TYPE unit2)
{
/* Map any specialized implementation units to actual ones. */
unit1 = vliw->unit_mapping[unit1];
*************** match_vliw (VLIW_COMBO *vliw1, VLIW_COMB
*** 487,493 ****
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
! add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
{
int next = vliw->next_slot;
VLIW_COMBO *current = vliw->current_vliw;
--- 487,493 ----
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
! add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit)
{
int next = vliw->next_slot;
VLIW_COMBO *current = vliw->current_vliw;
*************** add_next_to_vliw (FRV_VLIW *vliw, CGEN_A
*** 518,524 ****
Returns TRUE if found, FALSE otherwise. */
static bfd_boolean
! find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
int i;
--- 518,524 ----
Returns TRUE if found, FALSE otherwise. */
static bfd_boolean
! find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
int i;
*************** find_major_in_vliw (FRV_VLIW *vliw, CGEN
*** 533,539 ****
types. */
static bfd_boolean
! fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
/* In the cpu file, all media insns are represented as being allowed in
both media units. This makes it easier since this is the case for fr500.
--- 533,539 ----
types. */
static bfd_boolean
! fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
/* In the cpu file, all media insns are represented as being allowed in
both media units. This makes it easier since this is the case for fr500.
*************** fr400_check_insn_major_constraints (FRV_
*** 553,561 ****
}
static bfd_boolean
! fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
! CGEN_ATTR_VALUE_TYPE other_major;
/* Our caller guarantees there's at least one other instruction. */
other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR);
--- 553,561 ----
}
static bfd_boolean
! fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
! CGEN_ATTR_VALUE_ENUM_TYPE other_major;
/* Our caller guarantees there's at least one other instruction. */
other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR);
*************** fr450_check_insn_major_constraints (FRV_
*** 588,594 ****
}
static bfd_boolean
! find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
{
int i;
--- 588,594 ----
}
static bfd_boolean
! find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit)
{
int i;
*************** find_unit_in_vliw (FRV_VLIW *vliw, CGEN_
*** 601,608 ****
static bfd_boolean
find_major_in_slot (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE major,
! CGEN_ATTR_VALUE_TYPE slot)
{
int i;
--- 601,608 ----
static bfd_boolean
find_major_in_slot (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE major,
! CGEN_ATTR_VALUE_ENUM_TYPE slot)
{
int i;
*************** fr550_find_float_in_vliw (FRV_VLIW *vliw
*** 657,667 ****
static bfd_boolean
fr550_check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE major,
const CGEN_INSN *insn)
{
! CGEN_ATTR_VALUE_TYPE unit;
! CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
switch (slot)
{
case UNIT_I2:
--- 657,667 ----
static bfd_boolean
fr550_check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE major,
const CGEN_INSN *insn)
{
! CGEN_ATTR_VALUE_ENUM_TYPE unit;
! CGEN_ATTR_VALUE_ENUM_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
switch (slot)
{
case UNIT_I2:
*************** fr550_check_insn_major_constraints (FRV_
*** 707,713 ****
}
static bfd_boolean
! fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
/* TODO: A table might be faster for some of the more complex instances
here. */
--- 707,713 ----
}
static bfd_boolean
! fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
/* TODO: A table might be faster for some of the more complex instances
here. */
*************** fr500_check_insn_major_constraints (FRV_
*** 815,821 ****
static bfd_boolean
check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE major,
const CGEN_INSN *insn)
{
switch (vliw->mach)
--- 815,821 ----
static bfd_boolean
check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE major,
const CGEN_INSN *insn)
{
switch (vliw->mach)
*************** int
*** 841,848 ****
frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
{
int index;
! CGEN_ATTR_VALUE_TYPE major;
! CGEN_ATTR_VALUE_TYPE unit;
VLIW_COMBO *new_vliw;
if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn))
--- 841,848 ----
frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
{
int index;
! CGEN_ATTR_VALUE_ENUM_TYPE major;
! CGEN_ATTR_VALUE_ENUM_TYPE unit;
VLIW_COMBO *new_vliw;
if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn))
Index: cpu/m32c.opc
===================================================================
RCS file: /cvs/src/src/cpu/m32c.opc,v
retrieving revision 1.5
diff -c -p -r1.5 m32c.opc
*** cpu/m32c.opc 26 Jul 2005 03:21:50 -0000 1.5
--- cpu/m32c.opc 19 Sep 2005 19:48:42 -0000
*************** m32c_cgen_insn_supported (CGEN_CPU_DESC
*** 775,788 ****
const CGEN_INSN *insn)
{
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
! int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
/* If attributes are absent, assume no restriction. */
if (machs == 0)
machs = ~0;
return ((machs & cd->machs)
! && (isas & cd->isas));
}
/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
--- 775,788 ----
const CGEN_INSN *insn)
{
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
! CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
/* If attributes are absent, assume no restriction. */
if (machs == 0)
machs = ~0;
return ((machs & cd->machs)
! && cgen_bitset_intersect_p (& isas, cd->isas));
}
/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
Index: gas/config/tc-m32c.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m32c.c,v
retrieving revision 1.3
diff -c -p -r1.3 tc-m32c.c
*** gas/config/tc-m32c.c 26 Jul 2005 03:21:52 -0000 1.3
--- gas/config/tc-m32c.c 19 Sep 2005 19:48:44 -0000
*************** static int insn_size;
*** 87,98 ****
/* Flags to set in the elf header */
static flagword m32c_flags = DEFAULT_FLAGS;
! static unsigned int m32c_isa = (1 << ISA_M16C);
static void
set_isa (enum isa_attr isa_num)
{
! m32c_isa = (1 << isa_num);
}
static void s_bss (int);
--- 87,99 ----
/* Flags to set in the elf header */
static flagword m32c_flags = DEFAULT_FLAGS;
! static char default_isa = 1 << (7 - ISA_M16C);
! static CGEN_BITSET m32c_isa = {1, & default_isa};
static void
set_isa (enum isa_attr isa_num)
{
! cgen_bitset_set (& m32c_isa, isa_num);
}
static void s_bss (int);
*************** md_begin (void)
*** 156,162 ****
gas_cgen_cpu_desc = m32c_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, cpu_mach,
CGEN_CPU_OPEN_ENDIAN,
CGEN_ENDIAN_BIG,
! CGEN_CPU_OPEN_ISAS, m32c_isa,
CGEN_CPU_OPEN_END);
m32c_cgen_init_asm (gas_cgen_cpu_desc);
--- 157,163 ----
gas_cgen_cpu_desc = m32c_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, cpu_mach,
CGEN_CPU_OPEN_ENDIAN,
CGEN_ENDIAN_BIG,
! CGEN_CPU_OPEN_ISAS, & m32c_isa,
CGEN_CPU_OPEN_END);
m32c_cgen_init_asm (gas_cgen_cpu_desc);
Index: include/dis-asm.h
===================================================================
RCS file: /cvs/src/src/include/dis-asm.h,v
retrieving revision 1.56
diff -c -p -r1.56 dis-asm.h
*** include/dis-asm.h 18 Aug 2005 03:49:39 -0000 1.56
--- include/dis-asm.h 19 Sep 2005 19:48:49 -0000
*************** typedef struct disassemble_info {
*** 78,84 ****
for processors with run-time-switchable instruction sets. The default,
zero, means that there is no constraint. CGEN-based opcodes ports
may use ISA_foo masks. */
! unsigned long insn_sets;
/* Some targets need information about the current section to accurately
display insns. If this is NULL, the target disassembler function
--- 78,84 ----
for processors with run-time-switchable instruction sets. The default,
zero, means that there is no constraint. CGEN-based opcodes ports
may use ISA_foo masks. */
! void *insn_sets;
/* Some targets need information about the current section to accurately
display insns. If this is NULL, the target disassembler function
Index: include/opcode/cgen.h
===================================================================
RCS file: /cvs/src/src/include/opcode/cgen.h,v
retrieving revision 1.22
diff -c -p -r1.22 cgen.h
*** include/opcode/cgen.h 10 May 2005 10:21:12 -0000 1.22
--- include/opcode/cgen.h 19 Sep 2005 19:48:51 -0000
*************** with this program; if not, write to the
*** 22,27 ****
--- 22,29 ----
#ifndef CGEN_H
#define CGEN_H
+ #include "symcat.h"
+ #include "cgen-bitset.h"
/* ??? This file requires bfd.h but only to get bfd_vma.
Seems like an awful lot to require just to get such a fundamental type.
Perhaps the definition of bfd_vma can be moved outside of bfd.h.
*************** typedef struct cgen_cpu_desc *CGEN_CPU_D
*** 107,113 ****
/* Type of attribute values. */
! typedef int CGEN_ATTR_VALUE_TYPE;
/* Struct to record attribute information. */
--- 109,121 ----
/* Type of attribute values. */
! typedef CGEN_BITSET CGEN_ATTR_VALUE_BITSET_TYPE;
! typedef int CGEN_ATTR_VALUE_ENUM_TYPE;
! typedef union
! {
! CGEN_ATTR_VALUE_BITSET_TYPE bitset;
! CGEN_ATTR_VALUE_ENUM_TYPE nonbitset;
! } CGEN_ATTR_VALUE_TYPE;
/* Struct to record attribute information. */
*************** struct { unsigned int bool; \
*** 153,159 ****
#define CGEN_ATTR_VALUE(obj, attr_table, attr) \
((unsigned int) (attr) < CGEN_ATTR_NBOOL_OFFSET \
? ((CGEN_ATTR_BOOLS (attr_table) & CGEN_ATTR_MASK (attr)) != 0) \
! : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET]))
/* Attribute name/value tables.
These are used to assist parsing of descriptions at run-time. */
--- 161,169 ----
#define CGEN_ATTR_VALUE(obj, attr_table, attr) \
((unsigned int) (attr) < CGEN_ATTR_NBOOL_OFFSET \
? ((CGEN_ATTR_BOOLS (attr_table) & CGEN_ATTR_MASK (attr)) != 0) \
! : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET].nonbitset))
! #define CGEN_BITSET_ATTR_VALUE(obj, attr_table, attr) \
! ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET].bitset)
/* Attribute name/value tables.
These are used to assist parsing of descriptions at run-time. */
*************** struct { unsigned int bool; \
*** 161,167 ****
typedef struct
{
const char * name;
! CGEN_ATTR_VALUE_TYPE value;
} CGEN_ATTR_ENTRY;
/* For each domain (ifld,hw,operand,insn), list of attributes. */
--- 171,177 ----
typedef struct
{
const char * name;
! unsigned value;
} CGEN_ATTR_ENTRY;
/* For each domain (ifld,hw,operand,insn), list of attributes. */
*************** typedef CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_
*** 965,970 ****
--- 975,981 ----
typedef enum cgen_insn_attr {
CGEN_INSN_ALIAS = 0
} CGEN_INSN_ATTR;
+ #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) ((attrs)->bool & (1 << CGEN_INSN_ALIAS))
#endif
/* This struct defines each entry in the instruction table. */
*************** typedef struct
*** 1016,1021 ****
--- 1027,1034 ----
/* Return value of attribute ATTR in INSN. */
#define CGEN_INSN_ATTR_VALUE(insn, attr) \
CGEN_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr))
+ #define CGEN_INSN_BITSET_ATTR_VALUE(insn, attr) \
+ CGEN_BITSET_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr))
} CGEN_IBASE;
/* Return non-zero if INSN is the "invalid" insn marker. */
*************** typedef struct cgen_cpu_desc
*** 1179,1188 ****
/* Bitmap of selected machine(s) (a la BFD machine number). */
int machs;
! /* Bitmap of selected isa(s).
! ??? Simultaneous multiple isas might not make sense, but it's not (yet)
! precluded. */
! int isas;
/* Current endian. */
enum cgen_endian endian;
--- 1192,1200 ----
/* Bitmap of selected machine(s) (a la BFD machine number). */
int machs;
! /* Bitmap of selected isa(s). */
! CGEN_BITSET *isas;
! #define CGEN_CPU_ISAS(cd) ((cd)->isas)
/* Current endian. */
enum cgen_endian endian;
Index: opcodes/cgen-dis.in
===================================================================
RCS file: /cvs/src/src/opcodes/cgen-dis.in,v
retrieving revision 1.21
diff -c -p -r1.21 cgen-dis.in
*** opcodes/cgen-dis.in 1 Jul 2005 11:16:31 -0000 1.21
--- opcodes/cgen-dis.in 19 Sep 2005 19:48:54 -0000
***************
*** 4,10 ****
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
! Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
--- 4,10 ----
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
! Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
*************** default_print_insn (CGEN_CPU_DESC cd, bf
*** 347,353 ****
typedef struct cpu_desc_list
{
struct cpu_desc_list *next;
! int isa;
int mach;
int endian;
CGEN_CPU_DESC cd;
--- 347,353 ----
typedef struct cpu_desc_list
{
struct cpu_desc_list *next;
! CGEN_BITSET *isa;
int mach;
int endian;
CGEN_CPU_DESC cd;
*************** print_insn_@arch@ (bfd_vma pc, disassemb
*** 359,369 ****
static cpu_desc_list *cd_list = 0;
cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
! static int prev_isa;
static int prev_mach;
static int prev_endian;
int length;
! int isa,mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
--- 359,370 ----
static cpu_desc_list *cd_list = 0;
cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
! static CGEN_BITSET *prev_isa;
static int prev_mach;
static int prev_endian;
int length;
! CGEN_BITSET *isa;
! int mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
*************** print_insn_@arch@ (bfd_vma pc, disassemb
*** 386,410 ****
#endif
#ifdef CGEN_COMPUTE_ISA
! isa = CGEN_COMPUTE_ISA (info);
#else
isa = info->insn_sets;
#endif
/* If we've switched cpu's, try to find a handle we've used before */
if (cd
! && (isa != prev_isa
|| mach != prev_mach
|| endian != prev_endian))
{
cd = 0;
for (cl = cd_list; cl; cl = cl->next)
{
! if (cl->isa == isa &&
cl->mach == mach &&
cl->endian == endian)
{
cd = cl->cd;
break;
}
}
--- 387,420 ----
#endif
#ifdef CGEN_COMPUTE_ISA
! {
! static CGEN_BITSET *permanent_isa;
!
! if (!permanent_isa)
! permanent_isa = cgen_bitset_create (MAX_ISAS);
! isa = permanent_isa;
! cgen_bitset_clear (isa);
! cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
! }
#else
isa = info->insn_sets;
#endif
/* If we've switched cpu's, try to find a handle we've used before */
if (cd
! && (cgen_bitset_compare (isa, prev_isa) != 0
|| mach != prev_mach
|| endian != prev_endian))
{
cd = 0;
for (cl = cd_list; cl; cl = cl->next)
{
! if (cgen_bitset_compare (cl->isa, isa) == 0 &&
cl->mach == mach &&
cl->endian == endian)
{
cd = cl->cd;
+ prev_isa = cd->isas;
break;
}
}
*************** print_insn_@arch@ (bfd_vma pc, disassemb
*** 420,426 ****
abort ();
mach_name = arch_type->printable_name;
! prev_isa = isa;
prev_mach = mach;
prev_endian = endian;
cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
--- 430,436 ----
abort ();
mach_name = arch_type->printable_name;
! prev_isa = cgen_bitset_copy (isa);
prev_mach = mach;
prev_endian = endian;
cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
*************** print_insn_@arch@ (bfd_vma pc, disassemb
*** 433,439 ****
/* Save this away for future reference. */
cl = xmalloc (sizeof (struct cpu_desc_list));
cl->cd = cd;
! cl->isa = isa;
cl->mach = mach;
cl->endian = endian;
cl->next = cd_list;
--- 443,449 ----
/* Save this away for future reference. */
cl = xmalloc (sizeof (struct cpu_desc_list));
cl->cd = cd;
! cl->isa = prev_isa;
cl->mach = mach;
cl->endian = endian;
cl->next = cd_list;
Index: opcodes/cgen-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/cgen-opc.c,v
retrieving revision 1.15
diff -c -p -r1.15 cgen-opc.c
*** opcodes/cgen-opc.c 1 Jul 2005 11:16:31 -0000 1.15
--- opcodes/cgen-opc.c 19 Sep 2005 19:48:54 -0000
*************** cgen_signed_overflow_ok_p (CGEN_CPU_DESC
*** 613,615 ****
--- 613,763 ----
{
return cd->signed_overflow_ok_p;
}
+ /* Functions for manipulating CGEN_BITSET. */
+
+ /* Create a bit mask. */
+ CGEN_BITSET *
+ cgen_bitset_create (unsigned bit_count)
+ {
+ CGEN_BITSET * mask = xmalloc (sizeof (* mask));
+ cgen_bitset_init (mask, bit_count);
+ return mask;
+ }
+
+ /* Initialize an existing bit mask. */
+
+ void
+ cgen_bitset_init (CGEN_BITSET * mask, unsigned bit_count)
+ {
+ if (! mask)
+ return;
+ mask->length = (bit_count / 8) + 1;
+ mask->bits = xmalloc (mask->length);
+ cgen_bitset_clear (mask);
+ }
+
+ /* Clear the bits of a bit mask. */
+
+ void
+ cgen_bitset_clear (CGEN_BITSET * mask)
+ {
+ unsigned i;
+
+ if (! mask)
+ return;
+
+ for (i = 0; i < mask->length; ++i)
+ mask->bits[i] = 0;
+ }
+
+ /* Add a bit to a bit mask. */
+
+ void
+ cgen_bitset_add (CGEN_BITSET * mask, unsigned bit_num)
+ {
+ int byte_ix, bit_ix;
+ int bit_mask;
+
+ if (! mask)
+ return;
+ byte_ix = bit_num / 8;
+ bit_ix = bit_num % 8;
+ bit_mask = 1 << (7 - bit_ix);
+ mask->bits[byte_ix] |= bit_mask;
+ }
+
+ /* Set a bit mask. */
+
+ void
+ cgen_bitset_set (CGEN_BITSET * mask, unsigned bit_num)
+ {
+ if (! mask)
+ return;
+ cgen_bitset_clear (mask);
+ cgen_bitset_add (mask, bit_num);
+ }
+
+ /* Test for a bit in a bit mask.
+ Returns 1 if the bit is found */
+
+ int
+ cgen_bitset_contains (CGEN_BITSET * mask, unsigned bit_num)
+ {
+ int byte_ix, bit_ix;
+ int bit_mask;
+
+ if (! mask)
+ return 1; /* No bit restrictions. */
+
+ byte_ix = bit_num / 8;
+ bit_ix = 7 - (bit_num % 8);
+ bit_mask = 1 << bit_ix;
+ return (mask->bits[byte_ix] & bit_mask) >> bit_ix;
+ }
+
+ /* Compare two bit masks for equality.
+ Returns 0 if they are equal. */
+
+ int
+ cgen_bitset_compare (CGEN_BITSET * mask1, CGEN_BITSET * mask2)
+ {
+ if (mask1 == mask2)
+ return 0;
+ if (! mask1 || ! mask2)
+ return 1;
+ if (mask1->length != mask2->length)
+ return 1;
+ return memcmp (mask1->bits, mask2->bits, mask1->length);
+ }
+
+ /* Test two bit masks for common bits.
+ Returns 1 if a common bit is found. */
+
+ int
+ cgen_bitset_intersect_p (CGEN_BITSET * mask1, CGEN_BITSET * mask2)
+ {
+ unsigned i, limit;
+
+ if (mask1 == mask2)
+ return 1;
+ if (! mask1 || ! mask2)
+ return 0;
+ limit = mask1->length < mask2->length ? mask1->length : mask2->length;
+
+ for (i = 0; i < limit; ++i)
+ if ((mask1->bits[i] & mask2->bits[i]))
+ return 1;
+
+ return 0;
+ }
+
+ /* Make a copy of a bit mask. */
+
+ CGEN_BITSET *
+ cgen_bitset_copy (CGEN_BITSET * mask)
+ {
+ CGEN_BITSET* newmask;
+
+ if (! mask)
+ return NULL;
+ newmask = cgen_bitset_create ((mask->length * 8) - 1);
+ memcpy (newmask->bits, mask->bits, mask->length);
+ return newmask;
+ }
+
+ /* Combine two bit masks. */
+
+ void
+ cgen_bitset_union (CGEN_BITSET * mask1, CGEN_BITSET * mask2,
+ CGEN_BITSET * result)
+ {
+ unsigned i;
+
+ if (! mask1 || ! mask2 || ! result
+ || mask1->length != mask2->length
+ || mask1->length != result->length)
+ return;
+
+ for (i = 0; i < result->length; ++i)
+ result->bits[i] = mask1->bits[i] | mask2->bits[i];
+ }
Index: opcodes/disassemble.c
===================================================================
RCS file: /cvs/src/src/opcodes/disassemble.c,v
retrieving revision 1.56
diff -c -p -r1.56 disassemble.c
*** opcodes/disassemble.c 18 Aug 2005 03:49:00 -0000 1.56
--- opcodes/disassemble.c 19 Sep 2005 19:48:54 -0000
*************** disassemble_init_for_target (struct disa
*** 440,453 ****
#ifdef ARCH_tic4x
case bfd_arch_tic4x:
info->skip_zeroes = 32;
#endif
#ifdef ARCH_m32c
case bfd_arch_m32c:
info->endian = BFD_ENDIAN_BIG;
! if (info->mach == bfd_mach_m16c)
! info->insn_sets = 1 << ISA_M16C;
! else
! info->insn_sets = 1 << ISA_M32C;
break;
#endif
default:
--- 440,458 ----
#ifdef ARCH_tic4x
case bfd_arch_tic4x:
info->skip_zeroes = 32;
+ break;
#endif
#ifdef ARCH_m32c
case bfd_arch_m32c:
info->endian = BFD_ENDIAN_BIG;
! if (! info->insn_sets)
! {
! info->insn_sets = cgen_bitset_create (ISA_MAX);
! if (info->mach == bfd_mach_m16c)
! cgen_bitset_set (info->insn_sets, ISA_M16C);
! else
! cgen_bitset_set (info->insn_sets, ISA_M32C);
! }
break;
#endif
default:
Index: opcodes/frv-desc.c
===================================================================
RCS file: /cvs/src/src/opcodes/frv-desc.c,v
retrieving revision 1.21
diff -c -p -r1.21 frv-desc.c
*** opcodes/frv-desc.c 1 Jul 2005 11:16:31 -0000 1.21
--- opcodes/frv-desc.c 19 Sep 2005 19:48:55 -0000
*************** static const CGEN_MACH frv_cgen_mach_tab
*** 296,367 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_gr_names_entries[] =
{
! { "sp", 1, {0, {0}}, 0, 0 },
! { "fp", 2, {0, {0}}, 0, 0 },
! { "gr0", 0, {0, {0}}, 0, 0 },
! { "gr1", 1, {0, {0}}, 0, 0 },
! { "gr2", 2, {0, {0}}, 0, 0 },
! { "gr3", 3, {0, {0}}, 0, 0 },
! { "gr4", 4, {0, {0}}, 0, 0 },
! { "gr5", 5, {0, {0}}, 0, 0 },
! { "gr6", 6, {0, {0}}, 0, 0 },
! { "gr7", 7, {0, {0}}, 0, 0 },
! { "gr8", 8, {0, {0}}, 0, 0 },
! { "gr9", 9, {0, {0}}, 0, 0 },
! { "gr10", 10, {0, {0}}, 0, 0 },
! { "gr11", 11, {0, {0}}, 0, 0 },
! { "gr12", 12, {0, {0}}, 0, 0 },
! { "gr13", 13, {0, {0}}, 0, 0 },
! { "gr14", 14, {0, {0}}, 0, 0 },
! { "gr15", 15, {0, {0}}, 0, 0 },
! { "gr16", 16, {0, {0}}, 0, 0 },
! { "gr17", 17, {0, {0}}, 0, 0 },
! { "gr18", 18, {0, {0}}, 0, 0 },
! { "gr19", 19, {0, {0}}, 0, 0 },
! { "gr20", 20, {0, {0}}, 0, 0 },
! { "gr21", 21, {0, {0}}, 0, 0 },
! { "gr22", 22, {0, {0}}, 0, 0 },
! { "gr23", 23, {0, {0}}, 0, 0 },
! { "gr24", 24, {0, {0}}, 0, 0 },
! { "gr25", 25, {0, {0}}, 0, 0 },
! { "gr26", 26, {0, {0}}, 0, 0 },
! { "gr27", 27, {0, {0}}, 0, 0 },
! { "gr28", 28, {0, {0}}, 0, 0 },
! { "gr29", 29, {0, {0}}, 0, 0 },
! { "gr30", 30, {0, {0}}, 0, 0 },
! { "gr31", 31, {0, {0}}, 0, 0 },
! { "gr32", 32, {0, {0}}, 0, 0 },
! { "gr33", 33, {0, {0}}, 0, 0 },
! { "gr34", 34, {0, {0}}, 0, 0 },
! { "gr35", 35, {0, {0}}, 0, 0 },
! { "gr36", 36, {0, {0}}, 0, 0 },
! { "gr37", 37, {0, {0}}, 0, 0 },
! { "gr38", 38, {0, {0}}, 0, 0 },
! { "gr39", 39, {0, {0}}, 0, 0 },
! { "gr40", 40, {0, {0}}, 0, 0 },
! { "gr41", 41, {0, {0}}, 0, 0 },
! { "gr42", 42, {0, {0}}, 0, 0 },
! { "gr43", 43, {0, {0}}, 0, 0 },
! { "gr44", 44, {0, {0}}, 0, 0 },
! { "gr45", 45, {0, {0}}, 0, 0 },
! { "gr46", 46, {0, {0}}, 0, 0 },
! { "gr47", 47, {0, {0}}, 0, 0 },
! { "gr48", 48, {0, {0}}, 0, 0 },
! { "gr49", 49, {0, {0}}, 0, 0 },
! { "gr50", 50, {0, {0}}, 0, 0 },
! { "gr51", 51, {0, {0}}, 0, 0 },
! { "gr52", 52, {0, {0}}, 0, 0 },
! { "gr53", 53, {0, {0}}, 0, 0 },
! { "gr54", 54, {0, {0}}, 0, 0 },
! { "gr55", 55, {0, {0}}, 0, 0 },
! { "gr56", 56, {0, {0}}, 0, 0 },
! { "gr57", 57, {0, {0}}, 0, 0 },
! { "gr58", 58, {0, {0}}, 0, 0 },
! { "gr59", 59, {0, {0}}, 0, 0 },
! { "gr60", 60, {0, {0}}, 0, 0 },
! { "gr61", 61, {0, {0}}, 0, 0 },
! { "gr62", 62, {0, {0}}, 0, 0 },
! { "gr63", 63, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_gr_names =
--- 296,367 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_gr_names_entries[] =
{
! { "sp", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "fp", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "gr0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "gr1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "gr2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "gr3", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "gr4", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "gr5", 5, {0, {{{0, 0}}}}, 0, 0 },
! { "gr6", 6, {0, {{{0, 0}}}}, 0, 0 },
! { "gr7", 7, {0, {{{0, 0}}}}, 0, 0 },
! { "gr8", 8, {0, {{{0, 0}}}}, 0, 0 },
! { "gr9", 9, {0, {{{0, 0}}}}, 0, 0 },
! { "gr10", 10, {0, {{{0, 0}}}}, 0, 0 },
! { "gr11", 11, {0, {{{0, 0}}}}, 0, 0 },
! { "gr12", 12, {0, {{{0, 0}}}}, 0, 0 },
! { "gr13", 13, {0, {{{0, 0}}}}, 0, 0 },
! { "gr14", 14, {0, {{{0, 0}}}}, 0, 0 },
! { "gr15", 15, {0, {{{0, 0}}}}, 0, 0 },
! { "gr16", 16, {0, {{{0, 0}}}}, 0, 0 },
! { "gr17", 17, {0, {{{0, 0}}}}, 0, 0 },
! { "gr18", 18, {0, {{{0, 0}}}}, 0, 0 },
! { "gr19", 19, {0, {{{0, 0}}}}, 0, 0 },
! { "gr20", 20, {0, {{{0, 0}}}}, 0, 0 },
! { "gr21", 21, {0, {{{0, 0}}}}, 0, 0 },
! { "gr22", 22, {0, {{{0, 0}}}}, 0, 0 },
! { "gr23", 23, {0, {{{0, 0}}}}, 0, 0 },
! { "gr24", 24, {0, {{{0, 0}}}}, 0, 0 },
! { "gr25", 25, {0, {{{0, 0}}}}, 0, 0 },
! { "gr26", 26, {0, {{{0, 0}}}}, 0, 0 },
! { "gr27", 27, {0, {{{0, 0}}}}, 0, 0 },
! { "gr28", 28, {0, {{{0, 0}}}}, 0, 0 },
! { "gr29", 29, {0, {{{0, 0}}}}, 0, 0 },
! { "gr30", 30, {0, {{{0, 0}}}}, 0, 0 },
! { "gr31", 31, {0, {{{0, 0}}}}, 0, 0 },
! { "gr32", 32, {0, {{{0, 0}}}}, 0, 0 },
! { "gr33", 33, {0, {{{0, 0}}}}, 0, 0 },
! { "gr34", 34, {0, {{{0, 0}}}}, 0, 0 },
! { "gr35", 35, {0, {{{0, 0}}}}, 0, 0 },
! { "gr36", 36, {0, {{{0, 0}}}}, 0, 0 },
! { "gr37", 37, {0, {{{0, 0}}}}, 0, 0 },
! { "gr38", 38, {0, {{{0, 0}}}}, 0, 0 },
! { "gr39", 39, {0, {{{0, 0}}}}, 0, 0 },
! { "gr40", 40, {0, {{{0, 0}}}}, 0, 0 },
! { "gr41", 41, {0, {{{0, 0}}}}, 0, 0 },
! { "gr42", 42, {0, {{{0, 0}}}}, 0, 0 },
! { "gr43", 43, {0, {{{0, 0}}}}, 0, 0 },
! { "gr44", 44, {0, {{{0, 0}}}}, 0, 0 },
! { "gr45", 45, {0, {{{0, 0}}}}, 0, 0 },
! { "gr46", 46, {0, {{{0, 0}}}}, 0, 0 },
! { "gr47", 47, {0, {{{0, 0}}}}, 0, 0 },
! { "gr48", 48, {0, {{{0, 0}}}}, 0, 0 },
! { "gr49", 49, {0, {{{0, 0}}}}, 0, 0 },
! { "gr50", 50, {0, {{{0, 0}}}}, 0, 0 },
! { "gr51", 51, {0, {{{0, 0}}}}, 0, 0 },
! { "gr52", 52, {0, {{{0, 0}}}}, 0, 0 },
! { "gr53", 53, {0, {{{0, 0}}}}, 0, 0 },
! { "gr54", 54, {0, {{{0, 0}}}}, 0, 0 },
! { "gr55", 55, {0, {{{0, 0}}}}, 0, 0 },
! { "gr56", 56, {0, {{{0, 0}}}}, 0, 0 },
! { "gr57", 57, {0, {{{0, 0}}}}, 0, 0 },
! { "gr58", 58, {0, {{{0, 0}}}}, 0, 0 },
! { "gr59", 59, {0, {{{0, 0}}}}, 0, 0 },
! { "gr60", 60, {0, {{{0, 0}}}}, 0, 0 },
! { "gr61", 61, {0, {{{0, 0}}}}, 0, 0 },
! { "gr62", 62, {0, {{{0, 0}}}}, 0, 0 },
! { "gr63", 63, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_gr_names =
*************** CGEN_KEYWORD frv_cgen_opval_gr_names =
*** 373,442 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_fr_names_entries[] =
{
! { "fr0", 0, {0, {0}}, 0, 0 },
! { "fr1", 1, {0, {0}}, 0, 0 },
! { "fr2", 2, {0, {0}}, 0, 0 },
! { "fr3", 3, {0, {0}}, 0, 0 },
! { "fr4", 4, {0, {0}}, 0, 0 },
! { "fr5", 5, {0, {0}}, 0, 0 },
! { "fr6", 6, {0, {0}}, 0, 0 },
! { "fr7", 7, {0, {0}}, 0, 0 },
! { "fr8", 8, {0, {0}}, 0, 0 },
! { "fr9", 9, {0, {0}}, 0, 0 },
! { "fr10", 10, {0, {0}}, 0, 0 },
! { "fr11", 11, {0, {0}}, 0, 0 },
! { "fr12", 12, {0, {0}}, 0, 0 },
! { "fr13", 13, {0, {0}}, 0, 0 },
! { "fr14", 14, {0, {0}}, 0, 0 },
! { "fr15", 15, {0, {0}}, 0, 0 },
! { "fr16", 16, {0, {0}}, 0, 0 },
! { "fr17", 17, {0, {0}}, 0, 0 },
! { "fr18", 18, {0, {0}}, 0, 0 },
! { "fr19", 19, {0, {0}}, 0, 0 },
! { "fr20", 20, {0, {0}}, 0, 0 },
! { "fr21", 21, {0, {0}}, 0, 0 },
! { "fr22", 22, {0, {0}}, 0, 0 },
! { "fr23", 23, {0, {0}}, 0, 0 },
! { "fr24", 24, {0, {0}}, 0, 0 },
! { "fr25", 25, {0, {0}}, 0, 0 },
! { "fr26", 26, {0, {0}}, 0, 0 },
! { "fr27", 27, {0, {0}}, 0, 0 },
! { "fr28", 28, {0, {0}}, 0, 0 },
! { "fr29", 29, {0, {0}}, 0, 0 },
! { "fr30", 30, {0, {0}}, 0, 0 },
! { "fr31", 31, {0, {0}}, 0, 0 },
! { "fr32", 32, {0, {0}}, 0, 0 },
! { "fr33", 33, {0, {0}}, 0, 0 },
! { "fr34", 34, {0, {0}}, 0, 0 },
! { "fr35", 35, {0, {0}}, 0, 0 },
! { "fr36", 36, {0, {0}}, 0, 0 },
! { "fr37", 37, {0, {0}}, 0, 0 },
! { "fr38", 38, {0, {0}}, 0, 0 },
! { "fr39", 39, {0, {0}}, 0, 0 },
! { "fr40", 40, {0, {0}}, 0, 0 },
! { "fr41", 41, {0, {0}}, 0, 0 },
! { "fr42", 42, {0, {0}}, 0, 0 },
! { "fr43", 43, {0, {0}}, 0, 0 },
! { "fr44", 44, {0, {0}}, 0, 0 },
! { "fr45", 45, {0, {0}}, 0, 0 },
! { "fr46", 46, {0, {0}}, 0, 0 },
! { "fr47", 47, {0, {0}}, 0, 0 },
! { "fr48", 48, {0, {0}}, 0, 0 },
! { "fr49", 49, {0, {0}}, 0, 0 },
! { "fr50", 50, {0, {0}}, 0, 0 },
! { "fr51", 51, {0, {0}}, 0, 0 },
! { "fr52", 52, {0, {0}}, 0, 0 },
! { "fr53", 53, {0, {0}}, 0, 0 },
! { "fr54", 54, {0, {0}}, 0, 0 },
! { "fr55", 55, {0, {0}}, 0, 0 },
! { "fr56", 56, {0, {0}}, 0, 0 },
! { "fr57", 57, {0, {0}}, 0, 0 },
! { "fr58", 58, {0, {0}}, 0, 0 },
! { "fr59", 59, {0, {0}}, 0, 0 },
! { "fr60", 60, {0, {0}}, 0, 0 },
! { "fr61", 61, {0, {0}}, 0, 0 },
! { "fr62", 62, {0, {0}}, 0, 0 },
! { "fr63", 63, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_fr_names =
--- 373,442 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_fr_names_entries[] =
{
! { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
! { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
! { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
! { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
! { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
! { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
! { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
! { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
! { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
! { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
! { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 },
! { "fr16", 16, {0, {{{0, 0}}}}, 0, 0 },
! { "fr17", 17, {0, {{{0, 0}}}}, 0, 0 },
! { "fr18", 18, {0, {{{0, 0}}}}, 0, 0 },
! { "fr19", 19, {0, {{{0, 0}}}}, 0, 0 },
! { "fr20", 20, {0, {{{0, 0}}}}, 0, 0 },
! { "fr21", 21, {0, {{{0, 0}}}}, 0, 0 },
! { "fr22", 22, {0, {{{0, 0}}}}, 0, 0 },
! { "fr23", 23, {0, {{{0, 0}}}}, 0, 0 },
! { "fr24", 24, {0, {{{0, 0}}}}, 0, 0 },
! { "fr25", 25, {0, {{{0, 0}}}}, 0, 0 },
! { "fr26", 26, {0, {{{0, 0}}}}, 0, 0 },
! { "fr27", 27, {0, {{{0, 0}}}}, 0, 0 },
! { "fr28", 28, {0, {{{0, 0}}}}, 0, 0 },
! { "fr29", 29, {0, {{{0, 0}}}}, 0, 0 },
! { "fr30", 30, {0, {{{0, 0}}}}, 0, 0 },
! { "fr31", 31, {0, {{{0, 0}}}}, 0, 0 },
! { "fr32", 32, {0, {{{0, 0}}}}, 0, 0 },
! { "fr33", 33, {0, {{{0, 0}}}}, 0, 0 },
! { "fr34", 34, {0, {{{0, 0}}}}, 0, 0 },
! { "fr35", 35, {0, {{{0, 0}}}}, 0, 0 },
! { "fr36", 36, {0, {{{0, 0}}}}, 0, 0 },
! { "fr37", 37, {0, {{{0, 0}}}}, 0, 0 },
! { "fr38", 38, {0, {{{0, 0}}}}, 0, 0 },
! { "fr39", 39, {0, {{{0, 0}}}}, 0, 0 },
! { "fr40", 40, {0, {{{0, 0}}}}, 0, 0 },
! { "fr41", 41, {0, {{{0, 0}}}}, 0, 0 },
! { "fr42", 42, {0, {{{0, 0}}}}, 0, 0 },
! { "fr43", 43, {0, {{{0, 0}}}}, 0, 0 },
! { "fr44", 44, {0, {{{0, 0}}}}, 0, 0 },
! { "fr45", 45, {0, {{{0, 0}}}}, 0, 0 },
! { "fr46", 46, {0, {{{0, 0}}}}, 0, 0 },
! { "fr47", 47, {0, {{{0, 0}}}}, 0, 0 },
! { "fr48", 48, {0, {{{0, 0}}}}, 0, 0 },
! { "fr49", 49, {0, {{{0, 0}}}}, 0, 0 },
! { "fr50", 50, {0, {{{0, 0}}}}, 0, 0 },
! { "fr51", 51, {0, {{{0, 0}}}}, 0, 0 },
! { "fr52", 52, {0, {{{0, 0}}}}, 0, 0 },
! { "fr53", 53, {0, {{{0, 0}}}}, 0, 0 },
! { "fr54", 54, {0, {{{0, 0}}}}, 0, 0 },
! { "fr55", 55, {0, {{{0, 0}}}}, 0, 0 },
! { "fr56", 56, {0, {{{0, 0}}}}, 0, 0 },
! { "fr57", 57, {0, {{{0, 0}}}}, 0, 0 },
! { "fr58", 58, {0, {{{0, 0}}}}, 0, 0 },
! { "fr59", 59, {0, {{{0, 0}}}}, 0, 0 },
! { "fr60", 60, {0, {{{0, 0}}}}, 0, 0 },
! { "fr61", 61, {0, {{{0, 0}}}}, 0, 0 },
! { "fr62", 62, {0, {{{0, 0}}}}, 0, 0 },
! { "fr63", 63, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_fr_names =
*************** CGEN_KEYWORD frv_cgen_opval_fr_names =
*** 448,517 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_cpr_names_entries[] =
{
! { "cpr0", 0, {0, {0}}, 0, 0 },
! { "cpr1", 1, {0, {0}}, 0, 0 },
! { "cpr2", 2, {0, {0}}, 0, 0 },
! { "cpr3", 3, {0, {0}}, 0, 0 },
! { "cpr4", 4, {0, {0}}, 0, 0 },
! { "cpr5", 5, {0, {0}}, 0, 0 },
! { "cpr6", 6, {0, {0}}, 0, 0 },
! { "cpr7", 7, {0, {0}}, 0, 0 },
! { "cpr8", 8, {0, {0}}, 0, 0 },
! { "cpr9", 9, {0, {0}}, 0, 0 },
! { "cpr10", 10, {0, {0}}, 0, 0 },
! { "cpr11", 11, {0, {0}}, 0, 0 },
! { "cpr12", 12, {0, {0}}, 0, 0 },
! { "cpr13", 13, {0, {0}}, 0, 0 },
! { "cpr14", 14, {0, {0}}, 0, 0 },
! { "cpr15", 15, {0, {0}}, 0, 0 },
! { "cpr16", 16, {0, {0}}, 0, 0 },
! { "cpr17", 17, {0, {0}}, 0, 0 },
! { "cpr18", 18, {0, {0}}, 0, 0 },
! { "cpr19", 19, {0, {0}}, 0, 0 },
! { "cpr20", 20, {0, {0}}, 0, 0 },
! { "cpr21", 21, {0, {0}}, 0, 0 },
! { "cpr22", 22, {0, {0}}, 0, 0 },
! { "cpr23", 23, {0, {0}}, 0, 0 },
! { "cpr24", 24, {0, {0}}, 0, 0 },
! { "cpr25", 25, {0, {0}}, 0, 0 },
! { "cpr26", 26, {0, {0}}, 0, 0 },
! { "cpr27", 27, {0, {0}}, 0, 0 },
! { "cpr28", 28, {0, {0}}, 0, 0 },
! { "cpr29", 29, {0, {0}}, 0, 0 },
! { "cpr30", 30, {0, {0}}, 0, 0 },
! { "cpr31", 31, {0, {0}}, 0, 0 },
! { "cpr32", 32, {0, {0}}, 0, 0 },
! { "cpr33", 33, {0, {0}}, 0, 0 },
! { "cpr34", 34, {0, {0}}, 0, 0 },
! { "cpr35", 35, {0, {0}}, 0, 0 },
! { "cpr36", 36, {0, {0}}, 0, 0 },
! { "cpr37", 37, {0, {0}}, 0, 0 },
! { "cpr38", 38, {0, {0}}, 0, 0 },
! { "cpr39", 39, {0, {0}}, 0, 0 },
! { "cpr40", 40, {0, {0}}, 0, 0 },
! { "cpr41", 41, {0, {0}}, 0, 0 },
! { "cpr42", 42, {0, {0}}, 0, 0 },
! { "cpr43", 43, {0, {0}}, 0, 0 },
! { "cpr44", 44, {0, {0}}, 0, 0 },
! { "cpr45", 45, {0, {0}}, 0, 0 },
! { "cpr46", 46, {0, {0}}, 0, 0 },
! { "cpr47", 47, {0, {0}}, 0, 0 },
! { "cpr48", 48, {0, {0}}, 0, 0 },
! { "cpr49", 49, {0, {0}}, 0, 0 },
! { "cpr50", 50, {0, {0}}, 0, 0 },
! { "cpr51", 51, {0, {0}}, 0, 0 },
! { "cpr52", 52, {0, {0}}, 0, 0 },
! { "cpr53", 53, {0, {0}}, 0, 0 },
! { "cpr54", 54, {0, {0}}, 0, 0 },
! { "cpr55", 55, {0, {0}}, 0, 0 },
! { "cpr56", 56, {0, {0}}, 0, 0 },
! { "cpr57", 57, {0, {0}}, 0, 0 },
! { "cpr58", 58, {0, {0}}, 0, 0 },
! { "cpr59", 59, {0, {0}}, 0, 0 },
! { "cpr60", 60, {0, {0}}, 0, 0 },
! { "cpr61", 61, {0, {0}}, 0, 0 },
! { "cpr62", 62, {0, {0}}, 0, 0 },
! { "cpr63", 63, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_cpr_names =
--- 448,517 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_cpr_names_entries[] =
{
! { "cpr0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr3", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr4", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr5", 5, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr6", 6, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr7", 7, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr8", 8, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr9", 9, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr10", 10, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr11", 11, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr12", 12, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr13", 13, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr14", 14, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr15", 15, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr16", 16, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr17", 17, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr18", 18, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr19", 19, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr20", 20, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr21", 21, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr22", 22, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr23", 23, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr24", 24, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr25", 25, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr26", 26, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr27", 27, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr28", 28, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr29", 29, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr30", 30, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr31", 31, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr32", 32, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr33", 33, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr34", 34, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr35", 35, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr36", 36, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr37", 37, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr38", 38, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr39", 39, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr40", 40, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr41", 41, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr42", 42, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr43", 43, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr44", 44, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr45", 45, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr46", 46, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr47", 47, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr48", 48, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr49", 49, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr50", 50, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr51", 51, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr52", 52, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr53", 53, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr54", 54, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr55", 55, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr56", 56, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr57", 57, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr58", 58, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr59", 59, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr60", 60, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr61", 61, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr62", 62, {0, {{{0, 0}}}}, 0, 0 },
! { "cpr63", 63, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_cpr_names =
*************** CGEN_KEYWORD frv_cgen_opval_cpr_names =
*** 523,1550 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
{
! { "psr", 0, {0, {0}}, 0, 0 },
! { "pcsr", 1, {0, {0}}, 0, 0 },
! { "bpcsr", 2, {0, {0}}, 0, 0 },
! { "tbr", 3, {0, {0}}, 0, 0 },
! { "bpsr", 4, {0, {0}}, 0, 0 },
! { "hsr0", 16, {0, {0}}, 0, 0 },
! { "hsr1", 17, {0, {0}}, 0, 0 },
! { "hsr2", 18, {0, {0}}, 0, 0 },
! { "hsr3", 19, {0, {0}}, 0, 0 },
! { "hsr4", 20, {0, {0}}, 0, 0 },
! { "hsr5", 21, {0, {0}}, 0, 0 },
! { "hsr6", 22, {0, {0}}, 0, 0 },
! { "hsr7", 23, {0, {0}}, 0, 0 },
! { "hsr8", 24, {0, {0}}, 0, 0 },
! { "hsr9", 25, {0, {0}}, 0, 0 },
! { "hsr10", 26, {0, {0}}, 0, 0 },
! { "hsr11", 27, {0, {0}}, 0, 0 },
! { "hsr12", 28, {0, {0}}, 0, 0 },
! { "hsr13", 29, {0, {0}}, 0, 0 },
! { "hsr14", 30, {0, {0}}, 0, 0 },
! { "hsr15", 31, {0, {0}}, 0, 0 },
! { "hsr16", 32, {0, {0}}, 0, 0 },
! { "hsr17", 33, {0, {0}}, 0, 0 },
! { "hsr18", 34, {0, {0}}, 0, 0 },
! { "hsr19", 35, {0, {0}}, 0, 0 },
! { "hsr20", 36, {0, {0}}, 0, 0 },
! { "hsr21", 37, {0, {0}}, 0, 0 },
! { "hsr22", 38, {0, {0}}, 0, 0 },
! { "hsr23", 39, {0, {0}}, 0, 0 },
! { "hsr24", 40, {0, {0}}, 0, 0 },
! { "hsr25", 41, {0, {0}}, 0, 0 },
! { "hsr26", 42, {0, {0}}, 0, 0 },
! { "hsr27", 43, {0, {0}}, 0, 0 },
! { "hsr28", 44, {0, {0}}, 0, 0 },
! { "hsr29", 45, {0, {0}}, 0, 0 },
! { "hsr30", 46, {0, {0}}, 0, 0 },
! { "hsr31", 47, {0, {0}}, 0, 0 },
! { "hsr32", 48, {0, {0}}, 0, 0 },
! { "hsr33", 49, {0, {0}}, 0, 0 },
! { "hsr34", 50, {0, {0}}, 0, 0 },
! { "hsr35", 51, {0, {0}}, 0, 0 },
! { "hsr36", 52, {0, {0}}, 0, 0 },
! { "hsr37", 53, {0, {0}}, 0, 0 },
! { "hsr38", 54, {0, {0}}, 0, 0 },
! { "hsr39", 55, {0, {0}}, 0, 0 },
! { "hsr40", 56, {0, {0}}, 0, 0 },
! { "hsr41", 57, {0, {0}}, 0, 0 },
! { "hsr42", 58, {0, {0}}, 0, 0 },
! { "hsr43", 59, {0, {0}}, 0, 0 },
! { "hsr44", 60, {0, {0}}, 0, 0 },
! { "hsr45", 61, {0, {0}}, 0, 0 },
! { "hsr46", 62, {0, {0}}, 0, 0 },
! { "hsr47", 63, {0, {0}}, 0, 0 },
! { "hsr48", 64, {0, {0}}, 0, 0 },
! { "hsr49", 65, {0, {0}}, 0, 0 },
! { "hsr50", 66, {0, {0}}, 0, 0 },
! { "hsr51", 67, {0, {0}}, 0, 0 },
! { "hsr52", 68, {0, {0}}, 0, 0 },
! { "hsr53", 69, {0, {0}}, 0, 0 },
! { "hsr54", 70, {0, {0}}, 0, 0 },
! { "hsr55", 71, {0, {0}}, 0, 0 },
! { "hsr56", 72, {0, {0}}, 0, 0 },
! { "hsr57", 73, {0, {0}}, 0, 0 },
! { "hsr58", 74, {0, {0}}, 0, 0 },
! { "hsr59", 75, {0, {0}}, 0, 0 },
! { "hsr60", 76, {0, {0}}, 0, 0 },
! { "hsr61", 77, {0, {0}}, 0, 0 },
! { "hsr62", 78, {0, {0}}, 0, 0 },
! { "hsr63", 79, {0, {0}}, 0, 0 },
! { "ccr", 256, {0, {0}}, 0, 0 },
! { "cccr", 263, {0, {0}}, 0, 0 },
! { "lr", 272, {0, {0}}, 0, 0 },
! { "lcr", 273, {0, {0}}, 0, 0 },
! { "iacc0h", 280, {0, {0}}, 0, 0 },
! { "iacc0l", 281, {0, {0}}, 0, 0 },
! { "isr", 288, {0, {0}}, 0, 0 },
! { "neear0", 352, {0, {0}}, 0, 0 },
! { "neear1", 353, {0, {0}}, 0, 0 },
! { "neear2", 354, {0, {0}}, 0, 0 },
! { "neear3", 355, {0, {0}}, 0, 0 },
! { "neear4", 356, {0, {0}}, 0, 0 },
! { "neear5", 357, {0, {0}}, 0, 0 },
! { "neear6", 358, {0, {0}}, 0, 0 },
! { "neear7", 359, {0, {0}}, 0, 0 },
! { "neear8", 360, {0, {0}}, 0, 0 },
! { "neear9", 361, {0, {0}}, 0, 0 },
! { "neear10", 362, {0, {0}}, 0, 0 },
! { "neear11", 363, {0, {0}}, 0, 0 },
! { "neear12", 364, {0, {0}}, 0, 0 },
! { "neear13", 365, {0, {0}}, 0, 0 },
! { "neear14", 366, {0, {0}}, 0, 0 },
! { "neear15", 367, {0, {0}}, 0, 0 },
! { "neear16", 368, {0, {0}}, 0, 0 },
! { "neear17", 369, {0, {0}}, 0, 0 },
! { "neear18", 370, {0, {0}}, 0, 0 },
! { "neear19", 371, {0, {0}}, 0, 0 },
! { "neear20", 372, {0, {0}}, 0, 0 },
! { "neear21", 373, {0, {0}}, 0, 0 },
! { "neear22", 374, {0, {0}}, 0, 0 },
! { "neear23", 375, {0, {0}}, 0, 0 },
! { "neear24", 376, {0, {0}}, 0, 0 },
! { "neear25", 377, {0, {0}}, 0, 0 },
! { "neear26", 378, {0, {0}}, 0, 0 },
! { "neear27", 379, {0, {0}}, 0, 0 },
! { "neear28", 380, {0, {0}}, 0, 0 },
! { "neear29", 381, {0, {0}}, 0, 0 },
! { "neear30", 382, {0, {0}}, 0, 0 },
! { "neear31", 383, {0, {0}}, 0, 0 },
! { "nesr0", 384, {0, {0}}, 0, 0 },
! { "nesr1", 385, {0, {0}}, 0, 0 },
! { "nesr2", 386, {0, {0}}, 0, 0 },
! { "nesr3", 387, {0, {0}}, 0, 0 },
! { "nesr4", 388, {0, {0}}, 0, 0 },
! { "nesr5", 389, {0, {0}}, 0, 0 },
! { "nesr6", 390, {0, {0}}, 0, 0 },
! { "nesr7", 391, {0, {0}}, 0, 0 },
! { "nesr8", 392, {0, {0}}, 0, 0 },
! { "nesr9", 393, {0, {0}}, 0, 0 },
! { "nesr10", 394, {0, {0}}, 0, 0 },
! { "nesr11", 395, {0, {0}}, 0, 0 },
! { "nesr12", 396, {0, {0}}, 0, 0 },
! { "nesr13", 397, {0, {0}}, 0, 0 },
! { "nesr14", 398, {0, {0}}, 0, 0 },
! { "nesr15", 399, {0, {0}}, 0, 0 },
! { "nesr16", 400, {0, {0}}, 0, 0 },
! { "nesr17", 401, {0, {0}}, 0, 0 },
! { "nesr18", 402, {0, {0}}, 0, 0 },
! { "nesr19", 403, {0, {0}}, 0, 0 },
! { "nesr20", 404, {0, {0}}, 0, 0 },
! { "nesr21", 405, {0, {0}}, 0, 0 },
! { "nesr22", 406, {0, {0}}, 0, 0 },
! { "nesr23", 407, {0, {0}}, 0, 0 },
! { "nesr24", 408, {0, {0}}, 0, 0 },
! { "nesr25", 409, {0, {0}}, 0, 0 },
! { "nesr26", 410, {0, {0}}, 0, 0 },
! { "nesr27", 411, {0, {0}}, 0, 0 },
! { "nesr28", 412, {0, {0}}, 0, 0 },
! { "nesr29", 413, {0, {0}}, 0, 0 },
! { "nesr30", 414, {0, {0}}, 0, 0 },
! { "nesr31", 415, {0, {0}}, 0, 0 },
! { "necr", 416, {0, {0}}, 0, 0 },
! { "gner0", 432, {0, {0}}, 0, 0 },
! { "gner1", 433, {0, {0}}, 0, 0 },
! { "fner0", 434, {0, {0}}, 0, 0 },
! { "fner1", 435, {0, {0}}, 0, 0 },
! { "epcr0", 512, {0, {0}}, 0, 0 },
! { "epcr1", 513, {0, {0}}, 0, 0 },
! { "epcr2", 514, {0, {0}}, 0, 0 },
! { "epcr3", 515, {0, {0}}, 0, 0 },
! { "epcr4", 516, {0, {0}}, 0, 0 },
! { "epcr5", 517, {0, {0}}, 0, 0 },
! { "epcr6", 518, {0, {0}}, 0, 0 },
! { "epcr7", 519, {0, {0}}, 0, 0 },
! { "epcr8", 520, {0, {0}}, 0, 0 },
! { "epcr9", 521, {0, {0}}, 0, 0 },
! { "epcr10", 522, {0, {0}}, 0, 0 },
! { "epcr11", 523, {0, {0}}, 0, 0 },
! { "epcr12", 524, {0, {0}}, 0, 0 },
! { "epcr13", 525, {0, {0}}, 0, 0 },
! { "epcr14", 526, {0, {0}}, 0, 0 },
! { "epcr15", 527, {0, {0}}, 0, 0 },
! { "epcr16", 528, {0, {0}}, 0, 0 },
! { "epcr17", 529, {0, {0}}, 0, 0 },
! { "epcr18", 530, {0, {0}}, 0, 0 },
! { "epcr19", 531, {0, {0}}, 0, 0 },
! { "epcr20", 532, {0, {0}}, 0, 0 },
! { "epcr21", 533, {0, {0}}, 0, 0 },
! { "epcr22", 534, {0, {0}}, 0, 0 },
! { "epcr23", 535, {0, {0}}, 0, 0 },
! { "epcr24", 536, {0, {0}}, 0, 0 },
! { "epcr25", 537, {0, {0}}, 0, 0 },
! { "epcr26", 538, {0, {0}}, 0, 0 },
! { "epcr27", 539, {0, {0}}, 0, 0 },
! { "epcr28", 540, {0, {0}}, 0, 0 },
! { "epcr29", 541, {0, {0}}, 0, 0 },
! { "epcr30", 542, {0, {0}}, 0, 0 },
! { "epcr31", 543, {0, {0}}, 0, 0 },
! { "epcr32", 544, {0, {0}}, 0, 0 },
! { "epcr33", 545, {0, {0}}, 0, 0 },
! { "epcr34", 546, {0, {0}}, 0, 0 },
! { "epcr35", 547, {0, {0}}, 0, 0 },
! { "epcr36", 548, {0, {0}}, 0, 0 },
! { "epcr37", 549, {0, {0}}, 0, 0 },
! { "epcr38", 550, {0, {0}}, 0, 0 },
! { "epcr39", 551, {0, {0}}, 0, 0 },
! { "epcr40", 552, {0, {0}}, 0, 0 },
! { "epcr41", 553, {0, {0}}, 0, 0 },
! { "epcr42", 554, {0, {0}}, 0, 0 },
! { "epcr43", 555, {0, {0}}, 0, 0 },
! { "epcr44", 556, {0, {0}}, 0, 0 },
! { "epcr45", 557, {0, {0}}, 0, 0 },
! { "epcr46", 558, {0, {0}}, 0, 0 },
! { "epcr47", 559, {0, {0}}, 0, 0 },
! { "epcr48", 560, {0, {0}}, 0, 0 },
! { "epcr49", 561, {0, {0}}, 0, 0 },
! { "epcr50", 562, {0, {0}}, 0, 0 },
! { "epcr51", 563, {0, {0}}, 0, 0 },
! { "epcr52", 564, {0, {0}}, 0, 0 },
! { "epcr53", 565, {0, {0}}, 0, 0 },
! { "epcr54", 566, {0, {0}}, 0, 0 },
! { "epcr55", 567, {0, {0}}, 0, 0 },
! { "epcr56", 568, {0, {0}}, 0, 0 },
! { "epcr57", 569, {0, {0}}, 0, 0 },
! { "epcr58", 570, {0, {0}}, 0, 0 },
! { "epcr59", 571, {0, {0}}, 0, 0 },
! { "epcr60", 572, {0, {0}}, 0, 0 },
! { "epcr61", 573, {0, {0}}, 0, 0 },
! { "epcr62", 574, {0, {0}}, 0, 0 },
! { "epcr63", 575, {0, {0}}, 0, 0 },
! { "esr0", 576, {0, {0}}, 0, 0 },
! { "esr1", 577, {0, {0}}, 0, 0 },
! { "esr2", 578, {0, {0}}, 0, 0 },
! { "esr3", 579, {0, {0}}, 0, 0 },
! { "esr4", 580, {0, {0}}, 0, 0 },
! { "esr5", 581, {0, {0}}, 0, 0 },
! { "esr6", 582, {0, {0}}, 0, 0 },
! { "esr7", 583, {0, {0}}, 0, 0 },
! { "esr8", 584, {0, {0}}, 0, 0 },
! { "esr9", 585, {0, {0}}, 0, 0 },
! { "esr10", 586, {0, {0}}, 0, 0 },
! { "esr11", 587, {0, {0}}, 0, 0 },
! { "esr12", 588, {0, {0}}, 0, 0 },
! { "esr13", 589, {0, {0}}, 0, 0 },
! { "esr14", 590, {0, {0}}, 0, 0 },
! { "esr15", 591, {0, {0}}, 0, 0 },
! { "esr16", 592, {0, {0}}, 0, 0 },
! { "esr17", 593, {0, {0}}, 0, 0 },
! { "esr18", 594, {0, {0}}, 0, 0 },
! { "esr19", 595, {0, {0}}, 0, 0 },
! { "esr20", 596, {0, {0}}, 0, 0 },
! { "esr21", 597, {0, {0}}, 0, 0 },
! { "esr22", 598, {0, {0}}, 0, 0 },
! { "esr23", 599, {0, {0}}, 0, 0 },
! { "esr24", 600, {0, {0}}, 0, 0 },
! { "esr25", 601, {0, {0}}, 0, 0 },
! { "esr26", 602, {0, {0}}, 0, 0 },
! { "esr27", 603, {0, {0}}, 0, 0 },
! { "esr28", 604, {0, {0}}, 0, 0 },
! { "esr29", 605, {0, {0}}, 0, 0 },
! { "esr30", 606, {0, {0}}, 0, 0 },
! { "esr31", 607, {0, {0}}, 0, 0 },
! { "esr32", 608, {0, {0}}, 0, 0 },
! { "esr33", 609, {0, {0}}, 0, 0 },
! { "esr34", 610, {0, {0}}, 0, 0 },
! { "esr35", 611, {0, {0}}, 0, 0 },
! { "esr36", 612, {0, {0}}, 0, 0 },
! { "esr37", 613, {0, {0}}, 0, 0 },
! { "esr38", 614, {0, {0}}, 0, 0 },
! { "esr39", 615, {0, {0}}, 0, 0 },
! { "esr40", 616, {0, {0}}, 0, 0 },
! { "esr41", 617, {0, {0}}, 0, 0 },
! { "esr42", 618, {0, {0}}, 0, 0 },
! { "esr43", 619, {0, {0}}, 0, 0 },
! { "esr44", 620, {0, {0}}, 0, 0 },
! { "esr45", 621, {0, {0}}, 0, 0 },
! { "esr46", 622, {0, {0}}, 0, 0 },
! { "esr47", 623, {0, {0}}, 0, 0 },
! { "esr48", 624, {0, {0}}, 0, 0 },
! { "esr49", 625, {0, {0}}, 0, 0 },
! { "esr50", 626, {0, {0}}, 0, 0 },
! { "esr51", 627, {0, {0}}, 0, 0 },
! { "esr52", 628, {0, {0}}, 0, 0 },
! { "esr53", 629, {0, {0}}, 0, 0 },
! { "esr54", 630, {0, {0}}, 0, 0 },
! { "esr55", 631, {0, {0}}, 0, 0 },
! { "esr56", 632, {0, {0}}, 0, 0 },
! { "esr57", 633, {0, {0}}, 0, 0 },
! { "esr58", 634, {0, {0}}, 0, 0 },
! { "esr59", 635, {0, {0}}, 0, 0 },
! { "esr60", 636, {0, {0}}, 0, 0 },
! { "esr61", 637, {0, {0}}, 0, 0 },
! { "esr62", 638, {0, {0}}, 0, 0 },
! { "esr63", 639, {0, {0}}, 0, 0 },
! { "eir0", 640, {0, {0}}, 0, 0 },
! { "eir1", 641, {0, {0}}, 0, 0 },
! { "eir2", 642, {0, {0}}, 0, 0 },
! { "eir3", 643, {0, {0}}, 0, 0 },
! { "eir4", 644, {0, {0}}, 0, 0 },
! { "eir5", 645, {0, {0}}, 0, 0 },
! { "eir6", 646, {0, {0}}, 0, 0 },
! { "eir7", 647, {0, {0}}, 0, 0 },
! { "eir8", 648, {0, {0}}, 0, 0 },
! { "eir9", 649, {0, {0}}, 0, 0 },
! { "eir10", 650, {0, {0}}, 0, 0 },
! { "eir11", 651, {0, {0}}, 0, 0 },
! { "eir12", 652, {0, {0}}, 0, 0 },
! { "eir13", 653, {0, {0}}, 0, 0 },
! { "eir14", 654, {0, {0}}, 0, 0 },
! { "eir15", 655, {0, {0}}, 0, 0 },
! { "eir16", 656, {0, {0}}, 0, 0 },
! { "eir17", 657, {0, {0}}, 0, 0 },
! { "eir18", 658, {0, {0}}, 0, 0 },
! { "eir19", 659, {0, {0}}, 0, 0 },
! { "eir20", 660, {0, {0}}, 0, 0 },
! { "eir21", 661, {0, {0}}, 0, 0 },
! { "eir22", 662, {0, {0}}, 0, 0 },
! { "eir23", 663, {0, {0}}, 0, 0 },
! { "eir24", 664, {0, {0}}, 0, 0 },
! { "eir25", 665, {0, {0}}, 0, 0 },
! { "eir26", 666, {0, {0}}, 0, 0 },
! { "eir27", 667, {0, {0}}, 0, 0 },
! { "eir28", 668, {0, {0}}, 0, 0 },
! { "eir29", 669, {0, {0}}, 0, 0 },
! { "eir30", 670, {0, {0}}, 0, 0 },
! { "eir31", 671, {0, {0}}, 0, 0 },
! { "esfr0", 672, {0, {0}}, 0, 0 },
! { "esfr1", 673, {0, {0}}, 0, 0 },
! { "sr0", 768, {0, {0}}, 0, 0 },
! { "sr1", 769, {0, {0}}, 0, 0 },
! { "sr2", 770, {0, {0}}, 0, 0 },
! { "sr3", 771, {0, {0}}, 0, 0 },
! { "scr0", 832, {0, {0}}, 0, 0 },
! { "scr1", 833, {0, {0}}, 0, 0 },
! { "scr2", 834, {0, {0}}, 0, 0 },
! { "scr3", 835, {0, {0}}, 0, 0 },
! { "fsr0", 1024, {0, {0}}, 0, 0 },
! { "fsr1", 1025, {0, {0}}, 0, 0 },
! { "fsr2", 1026, {0, {0}}, 0, 0 },
! { "fsr3", 1027, {0, {0}}, 0, 0 },
! { "fsr4", 1028, {0, {0}}, 0, 0 },
! { "fsr5", 1029, {0, {0}}, 0, 0 },
! { "fsr6", 1030, {0, {0}}, 0, 0 },
! { "fsr7", 1031, {0, {0}}, 0, 0 },
! { "fsr8", 1032, {0, {0}}, 0, 0 },
! { "fsr9", 1033, {0, {0}}, 0, 0 },
! { "fsr10", 1034, {0, {0}}, 0, 0 },
! { "fsr11", 1035, {0, {0}}, 0, 0 },
! { "fsr12", 1036, {0, {0}}, 0, 0 },
! { "fsr13", 1037, {0, {0}}, 0, 0 },
! { "fsr14", 1038, {0, {0}}, 0, 0 },
! { "fsr15", 1039, {0, {0}}, 0, 0 },
! { "fsr16", 1040, {0, {0}}, 0, 0 },
! { "fsr17", 1041, {0, {0}}, 0, 0 },
! { "fsr18", 1042, {0, {0}}, 0, 0 },
! { "fsr19", 1043, {0, {0}}, 0, 0 },
! { "fsr20", 1044, {0, {0}}, 0, 0 },
! { "fsr21", 1045, {0, {0}}, 0, 0 },
! { "fsr22", 1046, {0, {0}}, 0, 0 },
! { "fsr23", 1047, {0, {0}}, 0, 0 },
! { "fsr24", 1048, {0, {0}}, 0, 0 },
! { "fsr25", 1049, {0, {0}}, 0, 0 },
! { "fsr26", 1050, {0, {0}}, 0, 0 },
! { "fsr27", 1051, {0, {0}}, 0, 0 },
! { "fsr28", 1052, {0, {0}}, 0, 0 },
! { "fsr29", 1053, {0, {0}}, 0, 0 },
! { "fsr30", 1054, {0, {0}}, 0, 0 },
! { "fsr31", 1055, {0, {0}}, 0, 0 },
! { "fsr32", 1056, {0, {0}}, 0, 0 },
! { "fsr33", 1057, {0, {0}}, 0, 0 },
! { "fsr34", 1058, {0, {0}}, 0, 0 },
! { "fsr35", 1059, {0, {0}}, 0, 0 },
! { "fsr36", 1060, {0, {0}}, 0, 0 },
! { "fsr37", 1061, {0, {0}}, 0, 0 },
! { "fsr38", 1062, {0, {0}}, 0, 0 },
! { "fsr39", 1063, {0, {0}}, 0, 0 },
! { "fsr40", 1064, {0, {0}}, 0, 0 },
! { "fsr41", 1065, {0, {0}}, 0, 0 },
! { "fsr42", 1066, {0, {0}}, 0, 0 },
! { "fsr43", 1067, {0, {0}}, 0, 0 },
! { "fsr44", 1068, {0, {0}}, 0, 0 },
! { "fsr45", 1069, {0, {0}}, 0, 0 },
! { "fsr46", 1070, {0, {0}}, 0, 0 },
! { "fsr47", 1071, {0, {0}}, 0, 0 },
! { "fsr48", 1072, {0, {0}}, 0, 0 },
! { "fsr49", 1073, {0, {0}}, 0, 0 },
! { "fsr50", 1074, {0, {0}}, 0, 0 },
! { "fsr51", 1075, {0, {0}}, 0, 0 },
! { "fsr52", 1076, {0, {0}}, 0, 0 },
! { "fsr53", 1077, {0, {0}}, 0, 0 },
! { "fsr54", 1078, {0, {0}}, 0, 0 },
! { "fsr55", 1079, {0, {0}}, 0, 0 },
! { "fsr56", 1080, {0, {0}}, 0, 0 },
! { "fsr57", 1081, {0, {0}}, 0, 0 },
! { "fsr58", 1082, {0, {0}}, 0, 0 },
! { "fsr59", 1083, {0, {0}}, 0, 0 },
! { "fsr60", 1084, {0, {0}}, 0, 0 },
! { "fsr61", 1085, {0, {0}}, 0, 0 },
! { "fsr62", 1086, {0, {0}}, 0, 0 },
! { "fsr63", 1087, {0, {0}}, 0, 0 },
! { "fqop0", 1088, {0, {0}}, 0, 0 },
! { "fqop1", 1090, {0, {0}}, 0, 0 },
! { "fqop2", 1092, {0, {0}}, 0, 0 },
! { "fqop3", 1094, {0, {0}}, 0, 0 },
! { "fqop4", 1096, {0, {0}}, 0, 0 },
! { "fqop5", 1098, {0, {0}}, 0, 0 },
! { "fqop6", 1100, {0, {0}}, 0, 0 },
! { "fqop7", 1102, {0, {0}}, 0, 0 },
! { "fqop8", 1104, {0, {0}}, 0, 0 },
! { "fqop9", 1106, {0, {0}}, 0, 0 },
! { "fqop10", 1108, {0, {0}}, 0, 0 },
! { "fqop11", 1110, {0, {0}}, 0, 0 },
! { "fqop12", 1112, {0, {0}}, 0, 0 },
! { "fqop13", 1114, {0, {0}}, 0, 0 },
! { "fqop14", 1116, {0, {0}}, 0, 0 },
! { "fqop15", 1118, {0, {0}}, 0, 0 },
! { "fqop16", 1120, {0, {0}}, 0, 0 },
! { "fqop17", 1122, {0, {0}}, 0, 0 },
! { "fqop18", 1124, {0, {0}}, 0, 0 },
! { "fqop19", 1126, {0, {0}}, 0, 0 },
! { "fqop20", 1128, {0, {0}}, 0, 0 },
! { "fqop21", 1130, {0, {0}}, 0, 0 },
! { "fqop22", 1132, {0, {0}}, 0, 0 },
! { "fqop23", 1134, {0, {0}}, 0, 0 },
! { "fqop24", 1136, {0, {0}}, 0, 0 },
! { "fqop25", 1138, {0, {0}}, 0, 0 },
! { "fqop26", 1140, {0, {0}}, 0, 0 },
! { "fqop27", 1142, {0, {0}}, 0, 0 },
! { "fqop28", 1144, {0, {0}}, 0, 0 },
! { "fqop29", 1146, {0, {0}}, 0, 0 },
! { "fqop30", 1148, {0, {0}}, 0, 0 },
! { "fqop31", 1150, {0, {0}}, 0, 0 },
! { "fqst0", 1089, {0, {0}}, 0, 0 },
! { "fqst1", 1091, {0, {0}}, 0, 0 },
! { "fqst2", 1093, {0, {0}}, 0, 0 },
! { "fqst3", 1095, {0, {0}}, 0, 0 },
! { "fqst4", 1097, {0, {0}}, 0, 0 },
! { "fqst5", 1099, {0, {0}}, 0, 0 },
! { "fqst6", 1101, {0, {0}}, 0, 0 },
! { "fqst7", 1103, {0, {0}}, 0, 0 },
! { "fqst8", 1105, {0, {0}}, 0, 0 },
! { "fqst9", 1107, {0, {0}}, 0, 0 },
! { "fqst10", 1109, {0, {0}}, 0, 0 },
! { "fqst11", 1111, {0, {0}}, 0, 0 },
! { "fqst12", 1113, {0, {0}}, 0, 0 },
! { "fqst13", 1115, {0, {0}}, 0, 0 },
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! { "fqst15", 1119, {0, {0}}, 0, 0 },
! { "fqst16", 1121, {0, {0}}, 0, 0 },
! { "fqst17", 1123, {0, {0}}, 0, 0 },
! { "fqst18", 1125, {0, {0}}, 0, 0 },
! { "fqst19", 1127, {0, {0}}, 0, 0 },
! { "fqst20", 1129, {0, {0}}, 0, 0 },
! { "fqst21", 1131, {0, {0}}, 0, 0 },
! { "fqst22", 1133, {0, {0}}, 0, 0 },
! { "fqst23", 1135, {0, {0}}, 0, 0 },
! { "fqst24", 1137, {0, {0}}, 0, 0 },
! { "fqst25", 1139, {0, {0}}, 0, 0 },
! { "fqst26", 1141, {0, {0}}, 0, 0 },
! { "fqst27", 1143, {0, {0}}, 0, 0 },
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! { "iampr47", 1775, {0, {0}}, 0, 0 },
! { "iampr48", 1776, {0, {0}}, 0, 0 },
! { "iampr49", 1777, {0, {0}}, 0, 0 },
! { "iampr50", 1778, {0, {0}}, 0, 0 },
! { "iampr51", 1779, {0, {0}}, 0, 0 },
! { "iampr52", 1780, {0, {0}}, 0, 0 },
! { "iampr53", 1781, {0, {0}}, 0, 0 },
! { "iampr54", 1782, {0, {0}}, 0, 0 },
! { "iampr55", 1783, {0, {0}}, 0, 0 },
! { "iampr56", 1784, {0, {0}}, 0, 0 },
! { "iampr57", 1785, {0, {0}}, 0, 0 },
! { "iampr58", 1786, {0, {0}}, 0, 0 },
! { "iampr59", 1787, {0, {0}}, 0, 0 },
! { "iampr60", 1788, {0, {0}}, 0, 0 },
! { "iampr61", 1789, {0, {0}}, 0, 0 },
! { "iampr62", 1790, {0, {0}}, 0, 0 },
! { "iampr63", 1791, {0, {0}}, 0, 0 },
! { "damlr0", 1792, {0, {0}}, 0, 0 },
! { "damlr1", 1793, {0, {0}}, 0, 0 },
! { "damlr2", 1794, {0, {0}}, 0, 0 },
! { "damlr3", 1795, {0, {0}}, 0, 0 },
! { "damlr4", 1796, {0, {0}}, 0, 0 },
! { "damlr5", 1797, {0, {0}}, 0, 0 },
! { "damlr6", 1798, {0, {0}}, 0, 0 },
! { "damlr7", 1799, {0, {0}}, 0, 0 },
! { "damlr8", 1800, {0, {0}}, 0, 0 },
! { "damlr9", 1801, {0, {0}}, 0, 0 },
! { "damlr10", 1802, {0, {0}}, 0, 0 },
! { "damlr11", 1803, {0, {0}}, 0, 0 },
! { "damlr12", 1804, {0, {0}}, 0, 0 },
! { "damlr13", 1805, {0, {0}}, 0, 0 },
! { "damlr14", 1806, {0, {0}}, 0, 0 },
! { "damlr15", 1807, {0, {0}}, 0, 0 },
! { "damlr16", 1808, {0, {0}}, 0, 0 },
! { "damlr17", 1809, {0, {0}}, 0, 0 },
! { "damlr18", 1810, {0, {0}}, 0, 0 },
! { "damlr19", 1811, {0, {0}}, 0, 0 },
! { "damlr20", 1812, {0, {0}}, 0, 0 },
! { "damlr21", 1813, {0, {0}}, 0, 0 },
! { "damlr22", 1814, {0, {0}}, 0, 0 },
! { "damlr23", 1815, {0, {0}}, 0, 0 },
! { "damlr24", 1816, {0, {0}}, 0, 0 },
! { "damlr25", 1817, {0, {0}}, 0, 0 },
! { "damlr26", 1818, {0, {0}}, 0, 0 },
! { "damlr27", 1819, {0, {0}}, 0, 0 },
! { "damlr28", 1820, {0, {0}}, 0, 0 },
! { "damlr29", 1821, {0, {0}}, 0, 0 },
! { "damlr30", 1822, {0, {0}}, 0, 0 },
! { "damlr31", 1823, {0, {0}}, 0, 0 },
! { "damlr32", 1824, {0, {0}}, 0, 0 },
! { "damlr33", 1825, {0, {0}}, 0, 0 },
! { "damlr34", 1826, {0, {0}}, 0, 0 },
! { "damlr35", 1827, {0, {0}}, 0, 0 },
! { "damlr36", 1828, {0, {0}}, 0, 0 },
! { "damlr37", 1829, {0, {0}}, 0, 0 },
! { "damlr38", 1830, {0, {0}}, 0, 0 },
! { "damlr39", 1831, {0, {0}}, 0, 0 },
! { "damlr40", 1832, {0, {0}}, 0, 0 },
! { "damlr41", 1833, {0, {0}}, 0, 0 },
! { "damlr42", 1834, {0, {0}}, 0, 0 },
! { "damlr43", 1835, {0, {0}}, 0, 0 },
! { "damlr44", 1836, {0, {0}}, 0, 0 },
! { "damlr45", 1837, {0, {0}}, 0, 0 },
! { "damlr46", 1838, {0, {0}}, 0, 0 },
! { "damlr47", 1839, {0, {0}}, 0, 0 },
! { "damlr48", 1840, {0, {0}}, 0, 0 },
! { "damlr49", 1841, {0, {0}}, 0, 0 },
! { "damlr50", 1842, {0, {0}}, 0, 0 },
! { "damlr51", 1843, {0, {0}}, 0, 0 },
! { "damlr52", 1844, {0, {0}}, 0, 0 },
! { "damlr53", 1845, {0, {0}}, 0, 0 },
! { "damlr54", 1846, {0, {0}}, 0, 0 },
! { "damlr55", 1847, {0, {0}}, 0, 0 },
! { "damlr56", 1848, {0, {0}}, 0, 0 },
! { "damlr57", 1849, {0, {0}}, 0, 0 },
! { "damlr58", 1850, {0, {0}}, 0, 0 },
! { "damlr59", 1851, {0, {0}}, 0, 0 },
! { "damlr60", 1852, {0, {0}}, 0, 0 },
! { "damlr61", 1853, {0, {0}}, 0, 0 },
! { "damlr62", 1854, {0, {0}}, 0, 0 },
! { "damlr63", 1855, {0, {0}}, 0, 0 },
! { "dampr0", 1856, {0, {0}}, 0, 0 },
! { "dampr1", 1857, {0, {0}}, 0, 0 },
! { "dampr2", 1858, {0, {0}}, 0, 0 },
! { "dampr3", 1859, {0, {0}}, 0, 0 },
! { "dampr4", 1860, {0, {0}}, 0, 0 },
! { "dampr5", 1861, {0, {0}}, 0, 0 },
! { "dampr6", 1862, {0, {0}}, 0, 0 },
! { "dampr7", 1863, {0, {0}}, 0, 0 },
! { "dampr8", 1864, {0, {0}}, 0, 0 },
! { "dampr9", 1865, {0, {0}}, 0, 0 },
! { "dampr10", 1866, {0, {0}}, 0, 0 },
! { "dampr11", 1867, {0, {0}}, 0, 0 },
! { "dampr12", 1868, {0, {0}}, 0, 0 },
! { "dampr13", 1869, {0, {0}}, 0, 0 },
! { "dampr14", 1870, {0, {0}}, 0, 0 },
! { "dampr15", 1871, {0, {0}}, 0, 0 },
! { "dampr16", 1872, {0, {0}}, 0, 0 },
! { "dampr17", 1873, {0, {0}}, 0, 0 },
! { "dampr18", 1874, {0, {0}}, 0, 0 },
! { "dampr19", 1875, {0, {0}}, 0, 0 },
! { "dampr20", 1876, {0, {0}}, 0, 0 },
! { "dampr21", 1877, {0, {0}}, 0, 0 },
! { "dampr22", 1878, {0, {0}}, 0, 0 },
! { "dampr23", 1879, {0, {0}}, 0, 0 },
! { "dampr24", 1880, {0, {0}}, 0, 0 },
! { "dampr25", 1881, {0, {0}}, 0, 0 },
! { "dampr26", 1882, {0, {0}}, 0, 0 },
! { "dampr27", 1883, {0, {0}}, 0, 0 },
! { "dampr28", 1884, {0, {0}}, 0, 0 },
! { "dampr29", 1885, {0, {0}}, 0, 0 },
! { "dampr30", 1886, {0, {0}}, 0, 0 },
! { "dampr31", 1887, {0, {0}}, 0, 0 },
! { "dampr32", 1888, {0, {0}}, 0, 0 },
! { "dampr33", 1889, {0, {0}}, 0, 0 },
! { "dampr34", 1890, {0, {0}}, 0, 0 },
! { "dampr35", 1891, {0, {0}}, 0, 0 },
! { "dampr36", 1892, {0, {0}}, 0, 0 },
! { "dampr37", 1893, {0, {0}}, 0, 0 },
! { "dampr38", 1894, {0, {0}}, 0, 0 },
! { "dampr39", 1895, {0, {0}}, 0, 0 },
! { "dampr40", 1896, {0, {0}}, 0, 0 },
! { "dampr41", 1897, {0, {0}}, 0, 0 },
! { "dampr42", 1898, {0, {0}}, 0, 0 },
! { "dampr43", 1899, {0, {0}}, 0, 0 },
! { "dampr44", 1900, {0, {0}}, 0, 0 },
! { "dampr45", 1901, {0, {0}}, 0, 0 },
! { "dampr46", 1902, {0, {0}}, 0, 0 },
! { "dampr47", 1903, {0, {0}}, 0, 0 },
! { "dampr48", 1904, {0, {0}}, 0, 0 },
! { "dampr49", 1905, {0, {0}}, 0, 0 },
! { "dampr50", 1906, {0, {0}}, 0, 0 },
! { "dampr51", 1907, {0, {0}}, 0, 0 },
! { "dampr52", 1908, {0, {0}}, 0, 0 },
! { "dampr53", 1909, {0, {0}}, 0, 0 },
! { "dampr54", 1910, {0, {0}}, 0, 0 },
! { "dampr55", 1911, {0, {0}}, 0, 0 },
! { "dampr56", 1912, {0, {0}}, 0, 0 },
! { "dampr57", 1913, {0, {0}}, 0, 0 },
! { "dampr58", 1914, {0, {0}}, 0, 0 },
! { "dampr59", 1915, {0, {0}}, 0, 0 },
! { "dampr60", 1916, {0, {0}}, 0, 0 },
! { "dampr61", 1917, {0, {0}}, 0, 0 },
! { "dampr62", 1918, {0, {0}}, 0, 0 },
! { "dampr63", 1919, {0, {0}}, 0, 0 },
! { "amcr", 1920, {0, {0}}, 0, 0 },
! { "stbar", 1921, {0, {0}}, 0, 0 },
! { "mmcr", 1922, {0, {0}}, 0, 0 },
! { "iamvr1", 1925, {0, {0}}, 0, 0 },
! { "damvr1", 1927, {0, {0}}, 0, 0 },
! { "cxnr", 1936, {0, {0}}, 0, 0 },
! { "ttbr", 1937, {0, {0}}, 0, 0 },
! { "tplr", 1938, {0, {0}}, 0, 0 },
! { "tppr", 1939, {0, {0}}, 0, 0 },
! { "tpxr", 1940, {0, {0}}, 0, 0 },
! { "timerh", 1952, {0, {0}}, 0, 0 },
! { "timerl", 1953, {0, {0}}, 0, 0 },
! { "timerd", 1954, {0, {0}}, 0, 0 },
! { "dcr", 2048, {0, {0}}, 0, 0 },
! { "brr", 2049, {0, {0}}, 0, 0 },
! { "nmar", 2050, {0, {0}}, 0, 0 },
! { "btbr", 2051, {0, {0}}, 0, 0 },
! { "ibar0", 2052, {0, {0}}, 0, 0 },
! { "ibar1", 2053, {0, {0}}, 0, 0 },
! { "ibar2", 2054, {0, {0}}, 0, 0 },
! { "ibar3", 2055, {0, {0}}, 0, 0 },
! { "dbar0", 2056, {0, {0}}, 0, 0 },
! { "dbar1", 2057, {0, {0}}, 0, 0 },
! { "dbar2", 2058, {0, {0}}, 0, 0 },
! { "dbar3", 2059, {0, {0}}, 0, 0 },
! { "dbdr00", 2060, {0, {0}}, 0, 0 },
! { "dbdr01", 2061, {0, {0}}, 0, 0 },
! { "dbdr02", 2062, {0, {0}}, 0, 0 },
! { "dbdr03", 2063, {0, {0}}, 0, 0 },
! { "dbdr10", 2064, {0, {0}}, 0, 0 },
! { "dbdr11", 2065, {0, {0}}, 0, 0 },
! { "dbdr12", 2066, {0, {0}}, 0, 0 },
! { "dbdr13", 2067, {0, {0}}, 0, 0 },
! { "dbdr20", 2068, {0, {0}}, 0, 0 },
! { "dbdr21", 2069, {0, {0}}, 0, 0 },
! { "dbdr22", 2070, {0, {0}}, 0, 0 },
! { "dbdr23", 2071, {0, {0}}, 0, 0 },
! { "dbdr30", 2072, {0, {0}}, 0, 0 },
! { "dbdr31", 2073, {0, {0}}, 0, 0 },
! { "dbdr32", 2074, {0, {0}}, 0, 0 },
! { "dbdr33", 2075, {0, {0}}, 0, 0 },
! { "dbmr00", 2076, {0, {0}}, 0, 0 },
! { "dbmr01", 2077, {0, {0}}, 0, 0 },
! { "dbmr02", 2078, {0, {0}}, 0, 0 },
! { "dbmr03", 2079, {0, {0}}, 0, 0 },
! { "dbmr10", 2080, {0, {0}}, 0, 0 },
! { "dbmr11", 2081, {0, {0}}, 0, 0 },
! { "dbmr12", 2082, {0, {0}}, 0, 0 },
! { "dbmr13", 2083, {0, {0}}, 0, 0 },
! { "dbmr20", 2084, {0, {0}}, 0, 0 },
! { "dbmr21", 2085, {0, {0}}, 0, 0 },
! { "dbmr22", 2086, {0, {0}}, 0, 0 },
! { "dbmr23", 2087, {0, {0}}, 0, 0 },
! { "dbmr30", 2088, {0, {0}}, 0, 0 },
! { "dbmr31", 2089, {0, {0}}, 0, 0 },
! { "dbmr32", 2090, {0, {0}}, 0, 0 },
! { "dbmr33", 2091, {0, {0}}, 0, 0 },
! { "cpcfr", 2092, {0, {0}}, 0, 0 },
! { "cpcr", 2093, {0, {0}}, 0, 0 },
! { "cpsr", 2094, {0, {0}}, 0, 0 },
! { "cpesr0", 2096, {0, {0}}, 0, 0 },
! { "cpesr1", 2097, {0, {0}}, 0, 0 },
! { "cpemr0", 2098, {0, {0}}, 0, 0 },
! { "cpemr1", 2099, {0, {0}}, 0, 0 },
! { "ihsr8", 3848, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_spr_names =
--- 523,1550 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
{
! { "psr", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "pcsr", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "bpcsr", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "tbr", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "bpsr", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr0", 16, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr1", 17, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr2", 18, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr3", 19, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr4", 20, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr5", 21, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr6", 22, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr7", 23, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr8", 24, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr9", 25, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr10", 26, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr11", 27, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr12", 28, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr13", 29, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr14", 30, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr15", 31, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr16", 32, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr17", 33, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr18", 34, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr19", 35, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr20", 36, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr21", 37, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr22", 38, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr23", 39, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr24", 40, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr25", 41, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr26", 42, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr27", 43, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr28", 44, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr29", 45, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr30", 46, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr31", 47, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr32", 48, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr33", 49, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr34", 50, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr35", 51, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr36", 52, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr37", 53, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr38", 54, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr39", 55, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr40", 56, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr41", 57, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr42", 58, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr43", 59, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr44", 60, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr45", 61, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr46", 62, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr47", 63, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr48", 64, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr49", 65, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr50", 66, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr51", 67, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr52", 68, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr53", 69, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr54", 70, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr55", 71, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr56", 72, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr57", 73, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr58", 74, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr59", 75, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr60", 76, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr61", 77, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr62", 78, {0, {{{0, 0}}}}, 0, 0 },
! { "hsr63", 79, {0, {{{0, 0}}}}, 0, 0 },
! { "ccr", 256, {0, {{{0, 0}}}}, 0, 0 },
! { "cccr", 263, {0, {{{0, 0}}}}, 0, 0 },
! { "lr", 272, {0, {{{0, 0}}}}, 0, 0 },
! { "lcr", 273, {0, {{{0, 0}}}}, 0, 0 },
! { "iacc0h", 280, {0, {{{0, 0}}}}, 0, 0 },
! { "iacc0l", 281, {0, {{{0, 0}}}}, 0, 0 },
! { "isr", 288, {0, {{{0, 0}}}}, 0, 0 },
! { "neear0", 352, {0, {{{0, 0}}}}, 0, 0 },
! { "neear1", 353, {0, {{{0, 0}}}}, 0, 0 },
! { "neear2", 354, {0, {{{0, 0}}}}, 0, 0 },
! { "neear3", 355, {0, {{{0, 0}}}}, 0, 0 },
! { "neear4", 356, {0, {{{0, 0}}}}, 0, 0 },
! { "neear5", 357, {0, {{{0, 0}}}}, 0, 0 },
! { "neear6", 358, {0, {{{0, 0}}}}, 0, 0 },
! { "neear7", 359, {0, {{{0, 0}}}}, 0, 0 },
! { "neear8", 360, {0, {{{0, 0}}}}, 0, 0 },
! { "neear9", 361, {0, {{{0, 0}}}}, 0, 0 },
! { "neear10", 362, {0, {{{0, 0}}}}, 0, 0 },
! { "neear11", 363, {0, {{{0, 0}}}}, 0, 0 },
! { "neear12", 364, {0, {{{0, 0}}}}, 0, 0 },
! { "neear13", 365, {0, {{{0, 0}}}}, 0, 0 },
! { "neear14", 366, {0, {{{0, 0}}}}, 0, 0 },
! { "neear15", 367, {0, {{{0, 0}}}}, 0, 0 },
! { "neear16", 368, {0, {{{0, 0}}}}, 0, 0 },
! { "neear17", 369, {0, {{{0, 0}}}}, 0, 0 },
! { "neear18", 370, {0, {{{0, 0}}}}, 0, 0 },
! { "neear19", 371, {0, {{{0, 0}}}}, 0, 0 },
! { "neear20", 372, {0, {{{0, 0}}}}, 0, 0 },
! { "neear21", 373, {0, {{{0, 0}}}}, 0, 0 },
! { "neear22", 374, {0, {{{0, 0}}}}, 0, 0 },
! { "neear23", 375, {0, {{{0, 0}}}}, 0, 0 },
! { "neear24", 376, {0, {{{0, 0}}}}, 0, 0 },
! { "neear25", 377, {0, {{{0, 0}}}}, 0, 0 },
! { "neear26", 378, {0, {{{0, 0}}}}, 0, 0 },
! { "neear27", 379, {0, {{{0, 0}}}}, 0, 0 },
! { "neear28", 380, {0, {{{0, 0}}}}, 0, 0 },
! { "neear29", 381, {0, {{{0, 0}}}}, 0, 0 },
! { "neear30", 382, {0, {{{0, 0}}}}, 0, 0 },
! { "neear31", 383, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr0", 384, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr1", 385, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr2", 386, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr3", 387, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr4", 388, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr5", 389, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr6", 390, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr7", 391, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr8", 392, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr9", 393, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr10", 394, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr11", 395, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr12", 396, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr13", 397, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr14", 398, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr15", 399, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr16", 400, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr17", 401, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr18", 402, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr19", 403, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr20", 404, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr21", 405, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr22", 406, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr23", 407, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr24", 408, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr25", 409, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr26", 410, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr27", 411, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr28", 412, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr29", 413, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr30", 414, {0, {{{0, 0}}}}, 0, 0 },
! { "nesr31", 415, {0, {{{0, 0}}}}, 0, 0 },
! { "necr", 416, {0, {{{0, 0}}}}, 0, 0 },
! { "gner0", 432, {0, {{{0, 0}}}}, 0, 0 },
! { "gner1", 433, {0, {{{0, 0}}}}, 0, 0 },
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! { "iampr5", 1733, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr6", 1734, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr7", 1735, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr8", 1736, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr9", 1737, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr10", 1738, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr11", 1739, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr12", 1740, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr13", 1741, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr14", 1742, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr15", 1743, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr16", 1744, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr17", 1745, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr18", 1746, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr19", 1747, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr20", 1748, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr21", 1749, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr22", 1750, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr23", 1751, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr24", 1752, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr25", 1753, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr26", 1754, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr27", 1755, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr28", 1756, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr29", 1757, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr30", 1758, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr31", 1759, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr32", 1760, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr33", 1761, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr34", 1762, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr35", 1763, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr36", 1764, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr37", 1765, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr38", 1766, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr39", 1767, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr40", 1768, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr41", 1769, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr42", 1770, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr43", 1771, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr44", 1772, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr45", 1773, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr46", 1774, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr47", 1775, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr48", 1776, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr49", 1777, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr50", 1778, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr51", 1779, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr52", 1780, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr53", 1781, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr54", 1782, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr55", 1783, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr56", 1784, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr57", 1785, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr58", 1786, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr59", 1787, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr60", 1788, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr61", 1789, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr62", 1790, {0, {{{0, 0}}}}, 0, 0 },
! { "iampr63", 1791, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr0", 1792, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr1", 1793, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr2", 1794, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr3", 1795, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr4", 1796, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr5", 1797, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr6", 1798, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr7", 1799, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr8", 1800, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr9", 1801, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr10", 1802, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr11", 1803, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr12", 1804, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr13", 1805, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr14", 1806, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr15", 1807, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr16", 1808, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr17", 1809, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr18", 1810, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr19", 1811, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr20", 1812, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr21", 1813, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr22", 1814, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr23", 1815, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr24", 1816, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr25", 1817, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr26", 1818, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr27", 1819, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr28", 1820, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr29", 1821, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr30", 1822, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr31", 1823, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr32", 1824, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr33", 1825, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr34", 1826, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr35", 1827, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr36", 1828, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr37", 1829, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr38", 1830, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr39", 1831, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr40", 1832, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr41", 1833, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr42", 1834, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr43", 1835, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr44", 1836, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr45", 1837, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr46", 1838, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr47", 1839, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr48", 1840, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr49", 1841, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr50", 1842, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr51", 1843, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr52", 1844, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr53", 1845, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr54", 1846, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr55", 1847, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr56", 1848, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr57", 1849, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr58", 1850, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr59", 1851, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr60", 1852, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr61", 1853, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr62", 1854, {0, {{{0, 0}}}}, 0, 0 },
! { "damlr63", 1855, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr0", 1856, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr1", 1857, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr2", 1858, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr3", 1859, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr4", 1860, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr5", 1861, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr6", 1862, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr7", 1863, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr8", 1864, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr9", 1865, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr10", 1866, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr11", 1867, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr12", 1868, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr13", 1869, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr14", 1870, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr15", 1871, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr16", 1872, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr17", 1873, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr18", 1874, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr19", 1875, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr20", 1876, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr21", 1877, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr22", 1878, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr23", 1879, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr24", 1880, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr25", 1881, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr26", 1882, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr27", 1883, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr28", 1884, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr29", 1885, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr30", 1886, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr31", 1887, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr32", 1888, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr33", 1889, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr34", 1890, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr35", 1891, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr36", 1892, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr37", 1893, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr38", 1894, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr39", 1895, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr40", 1896, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr41", 1897, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr42", 1898, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr43", 1899, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr44", 1900, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr45", 1901, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr46", 1902, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr47", 1903, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr48", 1904, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr49", 1905, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr50", 1906, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr51", 1907, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr52", 1908, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr53", 1909, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr54", 1910, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr55", 1911, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr56", 1912, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr57", 1913, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr58", 1914, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr59", 1915, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr60", 1916, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr61", 1917, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr62", 1918, {0, {{{0, 0}}}}, 0, 0 },
! { "dampr63", 1919, {0, {{{0, 0}}}}, 0, 0 },
! { "amcr", 1920, {0, {{{0, 0}}}}, 0, 0 },
! { "stbar", 1921, {0, {{{0, 0}}}}, 0, 0 },
! { "mmcr", 1922, {0, {{{0, 0}}}}, 0, 0 },
! { "iamvr1", 1925, {0, {{{0, 0}}}}, 0, 0 },
! { "damvr1", 1927, {0, {{{0, 0}}}}, 0, 0 },
! { "cxnr", 1936, {0, {{{0, 0}}}}, 0, 0 },
! { "ttbr", 1937, {0, {{{0, 0}}}}, 0, 0 },
! { "tplr", 1938, {0, {{{0, 0}}}}, 0, 0 },
! { "tppr", 1939, {0, {{{0, 0}}}}, 0, 0 },
! { "tpxr", 1940, {0, {{{0, 0}}}}, 0, 0 },
! { "timerh", 1952, {0, {{{0, 0}}}}, 0, 0 },
! { "timerl", 1953, {0, {{{0, 0}}}}, 0, 0 },
! { "timerd", 1954, {0, {{{0, 0}}}}, 0, 0 },
! { "dcr", 2048, {0, {{{0, 0}}}}, 0, 0 },
! { "brr", 2049, {0, {{{0, 0}}}}, 0, 0 },
! { "nmar", 2050, {0, {{{0, 0}}}}, 0, 0 },
! { "btbr", 2051, {0, {{{0, 0}}}}, 0, 0 },
! { "ibar0", 2052, {0, {{{0, 0}}}}, 0, 0 },
! { "ibar1", 2053, {0, {{{0, 0}}}}, 0, 0 },
! { "ibar2", 2054, {0, {{{0, 0}}}}, 0, 0 },
! { "ibar3", 2055, {0, {{{0, 0}}}}, 0, 0 },
! { "dbar0", 2056, {0, {{{0, 0}}}}, 0, 0 },
! { "dbar1", 2057, {0, {{{0, 0}}}}, 0, 0 },
! { "dbar2", 2058, {0, {{{0, 0}}}}, 0, 0 },
! { "dbar3", 2059, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr00", 2060, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr01", 2061, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr02", 2062, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr03", 2063, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr10", 2064, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr11", 2065, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr12", 2066, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr13", 2067, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr20", 2068, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr21", 2069, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr22", 2070, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr23", 2071, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr30", 2072, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr31", 2073, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr32", 2074, {0, {{{0, 0}}}}, 0, 0 },
! { "dbdr33", 2075, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr00", 2076, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr01", 2077, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr02", 2078, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr03", 2079, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr10", 2080, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr11", 2081, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr12", 2082, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr13", 2083, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr20", 2084, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr21", 2085, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr22", 2086, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr23", 2087, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr30", 2088, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr31", 2089, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr32", 2090, {0, {{{0, 0}}}}, 0, 0 },
! { "dbmr33", 2091, {0, {{{0, 0}}}}, 0, 0 },
! { "cpcfr", 2092, {0, {{{0, 0}}}}, 0, 0 },
! { "cpcr", 2093, {0, {{{0, 0}}}}, 0, 0 },
! { "cpsr", 2094, {0, {{{0, 0}}}}, 0, 0 },
! { "cpesr0", 2096, {0, {{{0, 0}}}}, 0, 0 },
! { "cpesr1", 2097, {0, {{{0, 0}}}}, 0, 0 },
! { "cpemr0", 2098, {0, {{{0, 0}}}}, 0, 0 },
! { "cpemr1", 2099, {0, {{{0, 0}}}}, 0, 0 },
! { "ihsr8", 3848, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_spr_names =
*************** CGEN_KEYWORD frv_cgen_opval_spr_names =
*** 1556,1625 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_accg_names_entries[] =
{
! { "accg0", 0, {0, {0}}, 0, 0 },
! { "accg1", 1, {0, {0}}, 0, 0 },
! { "accg2", 2, {0, {0}}, 0, 0 },
! { "accg3", 3, {0, {0}}, 0, 0 },
! { "accg4", 4, {0, {0}}, 0, 0 },
! { "accg5", 5, {0, {0}}, 0, 0 },
! { "accg6", 6, {0, {0}}, 0, 0 },
! { "accg7", 7, {0, {0}}, 0, 0 },
! { "accg8", 8, {0, {0}}, 0, 0 },
! { "accg9", 9, {0, {0}}, 0, 0 },
! { "accg10", 10, {0, {0}}, 0, 0 },
! { "accg11", 11, {0, {0}}, 0, 0 },
! { "accg12", 12, {0, {0}}, 0, 0 },
! { "accg13", 13, {0, {0}}, 0, 0 },
! { "accg14", 14, {0, {0}}, 0, 0 },
! { "accg15", 15, {0, {0}}, 0, 0 },
! { "accg16", 16, {0, {0}}, 0, 0 },
! { "accg17", 17, {0, {0}}, 0, 0 },
! { "accg18", 18, {0, {0}}, 0, 0 },
! { "accg19", 19, {0, {0}}, 0, 0 },
! { "accg20", 20, {0, {0}}, 0, 0 },
! { "accg21", 21, {0, {0}}, 0, 0 },
! { "accg22", 22, {0, {0}}, 0, 0 },
! { "accg23", 23, {0, {0}}, 0, 0 },
! { "accg24", 24, {0, {0}}, 0, 0 },
! { "accg25", 25, {0, {0}}, 0, 0 },
! { "accg26", 26, {0, {0}}, 0, 0 },
! { "accg27", 27, {0, {0}}, 0, 0 },
! { "accg28", 28, {0, {0}}, 0, 0 },
! { "accg29", 29, {0, {0}}, 0, 0 },
! { "accg30", 30, {0, {0}}, 0, 0 },
! { "accg31", 31, {0, {0}}, 0, 0 },
! { "accg32", 32, {0, {0}}, 0, 0 },
! { "accg33", 33, {0, {0}}, 0, 0 },
! { "accg34", 34, {0, {0}}, 0, 0 },
! { "accg35", 35, {0, {0}}, 0, 0 },
! { "accg36", 36, {0, {0}}, 0, 0 },
! { "accg37", 37, {0, {0}}, 0, 0 },
! { "accg38", 38, {0, {0}}, 0, 0 },
! { "accg39", 39, {0, {0}}, 0, 0 },
! { "accg40", 40, {0, {0}}, 0, 0 },
! { "accg41", 41, {0, {0}}, 0, 0 },
! { "accg42", 42, {0, {0}}, 0, 0 },
! { "accg43", 43, {0, {0}}, 0, 0 },
! { "accg44", 44, {0, {0}}, 0, 0 },
! { "accg45", 45, {0, {0}}, 0, 0 },
! { "accg46", 46, {0, {0}}, 0, 0 },
! { "accg47", 47, {0, {0}}, 0, 0 },
! { "accg48", 48, {0, {0}}, 0, 0 },
! { "accg49", 49, {0, {0}}, 0, 0 },
! { "accg50", 50, {0, {0}}, 0, 0 },
! { "accg51", 51, {0, {0}}, 0, 0 },
! { "accg52", 52, {0, {0}}, 0, 0 },
! { "accg53", 53, {0, {0}}, 0, 0 },
! { "accg54", 54, {0, {0}}, 0, 0 },
! { "accg55", 55, {0, {0}}, 0, 0 },
! { "accg56", 56, {0, {0}}, 0, 0 },
! { "accg57", 57, {0, {0}}, 0, 0 },
! { "accg58", 58, {0, {0}}, 0, 0 },
! { "accg59", 59, {0, {0}}, 0, 0 },
! { "accg60", 60, {0, {0}}, 0, 0 },
! { "accg61", 61, {0, {0}}, 0, 0 },
! { "accg62", 62, {0, {0}}, 0, 0 },
! { "accg63", 63, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_accg_names =
--- 1556,1625 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_accg_names_entries[] =
{
! { "accg0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "accg1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "accg2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "accg3", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "accg4", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "accg5", 5, {0, {{{0, 0}}}}, 0, 0 },
! { "accg6", 6, {0, {{{0, 0}}}}, 0, 0 },
! { "accg7", 7, {0, {{{0, 0}}}}, 0, 0 },
! { "accg8", 8, {0, {{{0, 0}}}}, 0, 0 },
! { "accg9", 9, {0, {{{0, 0}}}}, 0, 0 },
! { "accg10", 10, {0, {{{0, 0}}}}, 0, 0 },
! { "accg11", 11, {0, {{{0, 0}}}}, 0, 0 },
! { "accg12", 12, {0, {{{0, 0}}}}, 0, 0 },
! { "accg13", 13, {0, {{{0, 0}}}}, 0, 0 },
! { "accg14", 14, {0, {{{0, 0}}}}, 0, 0 },
! { "accg15", 15, {0, {{{0, 0}}}}, 0, 0 },
! { "accg16", 16, {0, {{{0, 0}}}}, 0, 0 },
! { "accg17", 17, {0, {{{0, 0}}}}, 0, 0 },
! { "accg18", 18, {0, {{{0, 0}}}}, 0, 0 },
! { "accg19", 19, {0, {{{0, 0}}}}, 0, 0 },
! { "accg20", 20, {0, {{{0, 0}}}}, 0, 0 },
! { "accg21", 21, {0, {{{0, 0}}}}, 0, 0 },
! { "accg22", 22, {0, {{{0, 0}}}}, 0, 0 },
! { "accg23", 23, {0, {{{0, 0}}}}, 0, 0 },
! { "accg24", 24, {0, {{{0, 0}}}}, 0, 0 },
! { "accg25", 25, {0, {{{0, 0}}}}, 0, 0 },
! { "accg26", 26, {0, {{{0, 0}}}}, 0, 0 },
! { "accg27", 27, {0, {{{0, 0}}}}, 0, 0 },
! { "accg28", 28, {0, {{{0, 0}}}}, 0, 0 },
! { "accg29", 29, {0, {{{0, 0}}}}, 0, 0 },
! { "accg30", 30, {0, {{{0, 0}}}}, 0, 0 },
! { "accg31", 31, {0, {{{0, 0}}}}, 0, 0 },
! { "accg32", 32, {0, {{{0, 0}}}}, 0, 0 },
! { "accg33", 33, {0, {{{0, 0}}}}, 0, 0 },
! { "accg34", 34, {0, {{{0, 0}}}}, 0, 0 },
! { "accg35", 35, {0, {{{0, 0}}}}, 0, 0 },
! { "accg36", 36, {0, {{{0, 0}}}}, 0, 0 },
! { "accg37", 37, {0, {{{0, 0}}}}, 0, 0 },
! { "accg38", 38, {0, {{{0, 0}}}}, 0, 0 },
! { "accg39", 39, {0, {{{0, 0}}}}, 0, 0 },
! { "accg40", 40, {0, {{{0, 0}}}}, 0, 0 },
! { "accg41", 41, {0, {{{0, 0}}}}, 0, 0 },
! { "accg42", 42, {0, {{{0, 0}}}}, 0, 0 },
! { "accg43", 43, {0, {{{0, 0}}}}, 0, 0 },
! { "accg44", 44, {0, {{{0, 0}}}}, 0, 0 },
! { "accg45", 45, {0, {{{0, 0}}}}, 0, 0 },
! { "accg46", 46, {0, {{{0, 0}}}}, 0, 0 },
! { "accg47", 47, {0, {{{0, 0}}}}, 0, 0 },
! { "accg48", 48, {0, {{{0, 0}}}}, 0, 0 },
! { "accg49", 49, {0, {{{0, 0}}}}, 0, 0 },
! { "accg50", 50, {0, {{{0, 0}}}}, 0, 0 },
! { "accg51", 51, {0, {{{0, 0}}}}, 0, 0 },
! { "accg52", 52, {0, {{{0, 0}}}}, 0, 0 },
! { "accg53", 53, {0, {{{0, 0}}}}, 0, 0 },
! { "accg54", 54, {0, {{{0, 0}}}}, 0, 0 },
! { "accg55", 55, {0, {{{0, 0}}}}, 0, 0 },
! { "accg56", 56, {0, {{{0, 0}}}}, 0, 0 },
! { "accg57", 57, {0, {{{0, 0}}}}, 0, 0 },
! { "accg58", 58, {0, {{{0, 0}}}}, 0, 0 },
! { "accg59", 59, {0, {{{0, 0}}}}, 0, 0 },
! { "accg60", 60, {0, {{{0, 0}}}}, 0, 0 },
! { "accg61", 61, {0, {{{0, 0}}}}, 0, 0 },
! { "accg62", 62, {0, {{{0, 0}}}}, 0, 0 },
! { "accg63", 63, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_accg_names =
*************** CGEN_KEYWORD frv_cgen_opval_accg_names =
*** 1631,1700 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_acc_names_entries[] =
{
! { "acc0", 0, {0, {0}}, 0, 0 },
! { "acc1", 1, {0, {0}}, 0, 0 },
! { "acc2", 2, {0, {0}}, 0, 0 },
! { "acc3", 3, {0, {0}}, 0, 0 },
! { "acc4", 4, {0, {0}}, 0, 0 },
! { "acc5", 5, {0, {0}}, 0, 0 },
! { "acc6", 6, {0, {0}}, 0, 0 },
! { "acc7", 7, {0, {0}}, 0, 0 },
! { "acc8", 8, {0, {0}}, 0, 0 },
! { "acc9", 9, {0, {0}}, 0, 0 },
! { "acc10", 10, {0, {0}}, 0, 0 },
! { "acc11", 11, {0, {0}}, 0, 0 },
! { "acc12", 12, {0, {0}}, 0, 0 },
! { "acc13", 13, {0, {0}}, 0, 0 },
! { "acc14", 14, {0, {0}}, 0, 0 },
! { "acc15", 15, {0, {0}}, 0, 0 },
! { "acc16", 16, {0, {0}}, 0, 0 },
! { "acc17", 17, {0, {0}}, 0, 0 },
! { "acc18", 18, {0, {0}}, 0, 0 },
! { "acc19", 19, {0, {0}}, 0, 0 },
! { "acc20", 20, {0, {0}}, 0, 0 },
! { "acc21", 21, {0, {0}}, 0, 0 },
! { "acc22", 22, {0, {0}}, 0, 0 },
! { "acc23", 23, {0, {0}}, 0, 0 },
! { "acc24", 24, {0, {0}}, 0, 0 },
! { "acc25", 25, {0, {0}}, 0, 0 },
! { "acc26", 26, {0, {0}}, 0, 0 },
! { "acc27", 27, {0, {0}}, 0, 0 },
! { "acc28", 28, {0, {0}}, 0, 0 },
! { "acc29", 29, {0, {0}}, 0, 0 },
! { "acc30", 30, {0, {0}}, 0, 0 },
! { "acc31", 31, {0, {0}}, 0, 0 },
! { "acc32", 32, {0, {0}}, 0, 0 },
! { "acc33", 33, {0, {0}}, 0, 0 },
! { "acc34", 34, {0, {0}}, 0, 0 },
! { "acc35", 35, {0, {0}}, 0, 0 },
! { "acc36", 36, {0, {0}}, 0, 0 },
! { "acc37", 37, {0, {0}}, 0, 0 },
! { "acc38", 38, {0, {0}}, 0, 0 },
! { "acc39", 39, {0, {0}}, 0, 0 },
! { "acc40", 40, {0, {0}}, 0, 0 },
! { "acc41", 41, {0, {0}}, 0, 0 },
! { "acc42", 42, {0, {0}}, 0, 0 },
! { "acc43", 43, {0, {0}}, 0, 0 },
! { "acc44", 44, {0, {0}}, 0, 0 },
! { "acc45", 45, {0, {0}}, 0, 0 },
! { "acc46", 46, {0, {0}}, 0, 0 },
! { "acc47", 47, {0, {0}}, 0, 0 },
! { "acc48", 48, {0, {0}}, 0, 0 },
! { "acc49", 49, {0, {0}}, 0, 0 },
! { "acc50", 50, {0, {0}}, 0, 0 },
! { "acc51", 51, {0, {0}}, 0, 0 },
! { "acc52", 52, {0, {0}}, 0, 0 },
! { "acc53", 53, {0, {0}}, 0, 0 },
! { "acc54", 54, {0, {0}}, 0, 0 },
! { "acc55", 55, {0, {0}}, 0, 0 },
! { "acc56", 56, {0, {0}}, 0, 0 },
! { "acc57", 57, {0, {0}}, 0, 0 },
! { "acc58", 58, {0, {0}}, 0, 0 },
! { "acc59", 59, {0, {0}}, 0, 0 },
! { "acc60", 60, {0, {0}}, 0, 0 },
! { "acc61", 61, {0, {0}}, 0, 0 },
! { "acc62", 62, {0, {0}}, 0, 0 },
! { "acc63", 63, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_acc_names =
--- 1631,1700 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_acc_names_entries[] =
{
! { "acc0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "acc1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "acc2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "acc3", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "acc4", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "acc5", 5, {0, {{{0, 0}}}}, 0, 0 },
! { "acc6", 6, {0, {{{0, 0}}}}, 0, 0 },
! { "acc7", 7, {0, {{{0, 0}}}}, 0, 0 },
! { "acc8", 8, {0, {{{0, 0}}}}, 0, 0 },
! { "acc9", 9, {0, {{{0, 0}}}}, 0, 0 },
! { "acc10", 10, {0, {{{0, 0}}}}, 0, 0 },
! { "acc11", 11, {0, {{{0, 0}}}}, 0, 0 },
! { "acc12", 12, {0, {{{0, 0}}}}, 0, 0 },
! { "acc13", 13, {0, {{{0, 0}}}}, 0, 0 },
! { "acc14", 14, {0, {{{0, 0}}}}, 0, 0 },
! { "acc15", 15, {0, {{{0, 0}}}}, 0, 0 },
! { "acc16", 16, {0, {{{0, 0}}}}, 0, 0 },
! { "acc17", 17, {0, {{{0, 0}}}}, 0, 0 },
! { "acc18", 18, {0, {{{0, 0}}}}, 0, 0 },
! { "acc19", 19, {0, {{{0, 0}}}}, 0, 0 },
! { "acc20", 20, {0, {{{0, 0}}}}, 0, 0 },
! { "acc21", 21, {0, {{{0, 0}}}}, 0, 0 },
! { "acc22", 22, {0, {{{0, 0}}}}, 0, 0 },
! { "acc23", 23, {0, {{{0, 0}}}}, 0, 0 },
! { "acc24", 24, {0, {{{0, 0}}}}, 0, 0 },
! { "acc25", 25, {0, {{{0, 0}}}}, 0, 0 },
! { "acc26", 26, {0, {{{0, 0}}}}, 0, 0 },
! { "acc27", 27, {0, {{{0, 0}}}}, 0, 0 },
! { "acc28", 28, {0, {{{0, 0}}}}, 0, 0 },
! { "acc29", 29, {0, {{{0, 0}}}}, 0, 0 },
! { "acc30", 30, {0, {{{0, 0}}}}, 0, 0 },
! { "acc31", 31, {0, {{{0, 0}}}}, 0, 0 },
! { "acc32", 32, {0, {{{0, 0}}}}, 0, 0 },
! { "acc33", 33, {0, {{{0, 0}}}}, 0, 0 },
! { "acc34", 34, {0, {{{0, 0}}}}, 0, 0 },
! { "acc35", 35, {0, {{{0, 0}}}}, 0, 0 },
! { "acc36", 36, {0, {{{0, 0}}}}, 0, 0 },
! { "acc37", 37, {0, {{{0, 0}}}}, 0, 0 },
! { "acc38", 38, {0, {{{0, 0}}}}, 0, 0 },
! { "acc39", 39, {0, {{{0, 0}}}}, 0, 0 },
! { "acc40", 40, {0, {{{0, 0}}}}, 0, 0 },
! { "acc41", 41, {0, {{{0, 0}}}}, 0, 0 },
! { "acc42", 42, {0, {{{0, 0}}}}, 0, 0 },
! { "acc43", 43, {0, {{{0, 0}}}}, 0, 0 },
! { "acc44", 44, {0, {{{0, 0}}}}, 0, 0 },
! { "acc45", 45, {0, {{{0, 0}}}}, 0, 0 },
! { "acc46", 46, {0, {{{0, 0}}}}, 0, 0 },
! { "acc47", 47, {0, {{{0, 0}}}}, 0, 0 },
! { "acc48", 48, {0, {{{0, 0}}}}, 0, 0 },
! { "acc49", 49, {0, {{{0, 0}}}}, 0, 0 },
! { "acc50", 50, {0, {{{0, 0}}}}, 0, 0 },
! { "acc51", 51, {0, {{{0, 0}}}}, 0, 0 },
! { "acc52", 52, {0, {{{0, 0}}}}, 0, 0 },
! { "acc53", 53, {0, {{{0, 0}}}}, 0, 0 },
! { "acc54", 54, {0, {{{0, 0}}}}, 0, 0 },
! { "acc55", 55, {0, {{{0, 0}}}}, 0, 0 },
! { "acc56", 56, {0, {{{0, 0}}}}, 0, 0 },
! { "acc57", 57, {0, {{{0, 0}}}}, 0, 0 },
! { "acc58", 58, {0, {{{0, 0}}}}, 0, 0 },
! { "acc59", 59, {0, {{{0, 0}}}}, 0, 0 },
! { "acc60", 60, {0, {{{0, 0}}}}, 0, 0 },
! { "acc61", 61, {0, {{{0, 0}}}}, 0, 0 },
! { "acc62", 62, {0, {{{0, 0}}}}, 0, 0 },
! { "acc63", 63, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_acc_names =
*************** CGEN_KEYWORD frv_cgen_opval_acc_names =
*** 1706,1712 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_iacc0_names_entries[] =
{
! { "iacc0", 0, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_iacc0_names =
--- 1706,1712 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_iacc0_names_entries[] =
{
! { "iacc0", 0, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_iacc0_names =
*************** CGEN_KEYWORD frv_cgen_opval_iacc0_names
*** 1718,1727 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries[] =
{
! { "icc0", 0, {0, {0}}, 0, 0 },
! { "icc1", 1, {0, {0}}, 0, 0 },
! { "icc2", 2, {0, {0}}, 0, 0 },
! { "icc3", 3, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_iccr_names =
--- 1718,1727 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries[] =
{
! { "icc0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "icc1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "icc2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "icc3", 3, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_iccr_names =
*************** CGEN_KEYWORD frv_cgen_opval_iccr_names =
*** 1733,1742 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_fccr_names_entries[] =
{
! { "fcc0", 0, {0, {0}}, 0, 0 },
! { "fcc1", 1, {0, {0}}, 0, 0 },
! { "fcc2", 2, {0, {0}}, 0, 0 },
! { "fcc3", 3, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_fccr_names =
--- 1733,1742 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_fccr_names_entries[] =
{
! { "fcc0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "fcc1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "fcc2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "fcc3", 3, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_fccr_names =
*************** CGEN_KEYWORD frv_cgen_opval_fccr_names =
*** 1748,1761 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_cccr_names_entries[] =
{
! { "cc0", 0, {0, {0}}, 0, 0 },
! { "cc1", 1, {0, {0}}, 0, 0 },
! { "cc2", 2, {0, {0}}, 0, 0 },
! { "cc3", 3, {0, {0}}, 0, 0 },
! { "cc4", 4, {0, {0}}, 0, 0 },
! { "cc5", 5, {0, {0}}, 0, 0 },
! { "cc6", 6, {0, {0}}, 0, 0 },
! { "cc7", 7, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_cccr_names =
--- 1748,1761 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_cccr_names_entries[] =
{
! { "cc0", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "cc1", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "cc2", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "cc3", 3, {0, {{{0, 0}}}}, 0, 0 },
! { "cc4", 4, {0, {{{0, 0}}}}, 0, 0 },
! { "cc5", 5, {0, {{{0, 0}}}}, 0, 0 },
! { "cc6", 6, {0, {{{0, 0}}}}, 0, 0 },
! { "cc7", 7, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_cccr_names =
*************** CGEN_KEYWORD frv_cgen_opval_cccr_names =
*** 1767,1775 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_pack_entries[] =
{
! { "", 1, {0, {0}}, 0, 0 },
! { ".p", 0, {0, {0}}, 0, 0 },
! { ".P", 0, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_h_pack =
--- 1767,1775 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_pack_entries[] =
{
! { "", 1, {0, {{{0, 0}}}}, 0, 0 },
! { ".p", 0, {0, {{{0, 0}}}}, 0, 0 },
! { ".P", 0, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_h_pack =
*************** CGEN_KEYWORD frv_cgen_opval_h_pack =
*** 1781,1790 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_taken_entries[] =
{
! { "", 2, {0, {0}}, 0, 0 },
! { "", 0, {0, {0}}, 0, 0 },
! { "", 1, {0, {0}}, 0, 0 },
! { "", 3, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_h_hint_taken =
--- 1781,1790 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_taken_entries[] =
{
! { "", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "", 3, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_h_hint_taken =
*************** CGEN_KEYWORD frv_cgen_opval_h_hint_taken
*** 1796,1805 ****
static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_not_taken_entries[] =
{
! { "", 0, {0, {0}}, 0, 0 },
! { "", 1, {0, {0}}, 0, 0 },
! { "", 2, {0, {0}}, 0, 0 },
! { "", 3, {0, {0}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken =
--- 1796,1805 ----
static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_not_taken_entries[] =
{
! { "", 0, {0, {{{0, 0}}}}, 0, 0 },
! { "", 1, {0, {{{0, 0}}}}, 0, 0 },
! { "", 2, {0, {{{0, 0}}}}, 0, 0 },
! { "", 3, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken =
*************** CGEN_KEYWORD frv_cgen_opval_h_hint_not_t
*** 1820,1876 ****
const CGEN_HW_ENTRY frv_cgen_hw_table[] =
{
! { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-reloc-ann", HW_H_RELOC_ANN, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
! { "h-psr_imple", HW_H_PSR_IMPLE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_ver", HW_H_PSR_VER, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_ice", HW_H_PSR_ICE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_nem", HW_H_PSR_NEM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_cm", HW_H_PSR_CM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_be", HW_H_PSR_BE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_esr", HW_H_PSR_ESR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_ef", HW_H_PSR_EF, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_em", HW_H_PSR_EM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_pil", HW_H_PSR_PIL, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_ps", HW_H_PSR_PS, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_et", HW_H_PSR_ET, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-psr_s", HW_H_PSR_S, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-tbr_tba", HW_H_TBR_TBA, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-tbr_tt", HW_H_TBR_TT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-bpsr_bs", HW_H_BPSR_BS, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-bpsr_bet", HW_H_BPSR_BET, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
! { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-gr_double", HW_H_GR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-gr_hi", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-gr_lo", HW_H_GR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_double", HW_H_FR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_int", HW_H_FR_INT, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_hi", HW_H_FR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_lo", HW_H_FR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_0", HW_H_FR_0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_1", HW_H_FR_1, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_2", HW_H_FR_2, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fr_3", HW_H_FR_3, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-cpr", HW_H_CPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(PROFILE), { (1<<MACH_FRV) } } },
! { "h-cpr_double", HW_H_CPR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_FRV) } } },
! { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_spr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-acc40S", HW_H_ACC40S, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-acc40U", HW_H_ACC40U, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-iacc0", HW_H_IACC0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iacc0_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_FR400)|(1<<MACH_FR450) } } },
! { "h-iccr", HW_H_ICCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-fccr", HW_H_FCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-cccr", HW_H_CCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
! { "h-pack", HW_H_PACK, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_pack, { 0, { (1<<MACH_BASE) } } },
! { "h-hint-taken", HW_H_HINT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_taken, { 0, { (1<<MACH_BASE) } } },
! { "h-hint-not-taken", HW_H_HINT_NOT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_not_taken, { 0, { (1<<MACH_BASE) } } },
! { 0, 0, CGEN_ASM_NONE, 0, {0, {0}} }
};
#undef A
--- 1820,1876 ----
const CGEN_HW_ENTRY frv_cgen_hw_table[] =
{
! { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-reloc-ann", HW_H_RELOC_ANN, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_imple", HW_H_PSR_IMPLE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_ver", HW_H_PSR_VER, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_ice", HW_H_PSR_ICE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_nem", HW_H_PSR_NEM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_cm", HW_H_PSR_CM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_be", HW_H_PSR_BE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_esr", HW_H_PSR_ESR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_ef", HW_H_PSR_EF, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_em", HW_H_PSR_EM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_pil", HW_H_PSR_PIL, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_ps", HW_H_PSR_PS, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_et", HW_H_PSR_ET, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-psr_s", HW_H_PSR_S, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-tbr_tba", HW_H_TBR_TBA, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-tbr_tt", HW_H_TBR_TT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-bpsr_bs", HW_H_BPSR_BS, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-bpsr_bet", HW_H_BPSR_BET, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-gr_double", HW_H_GR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-gr_hi", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-gr_lo", HW_H_GR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_double", HW_H_FR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_int", HW_H_FR_INT, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_hi", HW_H_FR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_lo", HW_H_FR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_0", HW_H_FR_0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_1", HW_H_FR_1, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_2", HW_H_FR_2, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fr_3", HW_H_FR_3, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-cpr", HW_H_CPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(PROFILE), { { { (1<<MACH_FRV), 0 } } } } },
! { "h-cpr_double", HW_H_CPR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_FRV), 0 } } } } },
! { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_spr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-acc40S", HW_H_ACC40S, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-acc40U", HW_H_ACC40U, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-iacc0", HW_H_IACC0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iacc0_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } } } } },
! { "h-iccr", HW_H_ICCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iccr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-fccr", HW_H_FCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fccr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-cccr", HW_H_CCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cccr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
! { "h-pack", HW_H_PACK, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_pack, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-hint-taken", HW_H_HINT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_taken, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { "h-hint-not-taken", HW_H_HINT_NOT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_not_taken, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
};
#undef A
*************** const CGEN_HW_ENTRY frv_cgen_hw_table[]
*** 1886,1997 ****
const CGEN_IFLD frv_cgen_ifld_table[] =
{
! { FRV_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_PACK, "f-pack", 0, 32, 31, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_OP, "f-op", 0, 32, 24, 7, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_OPE1, "f-ope1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_OPE2, "f-ope2", 0, 32, 9, 4, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_OPE3, "f-ope3", 0, 32, 15, 3, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_OPE4, "f-ope4", 0, 32, 7, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_GRI, "f-GRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_GRJ, "f-GRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_GRK, "f-GRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FRI, "f-FRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FRJ, "f-FRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FRK, "f-FRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CPRI, "f-CPRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CPRJ, "f-CPRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CPRK, "f-CPRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ACCGI, "f-ACCGi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ACCGK, "f-ACCGk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ACC40SI, "f-ACC40Si", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ACC40UI, "f-ACC40Ui", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ACC40SK, "f-ACC40Sk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ACC40UK, "f-ACC40Uk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CRI, "f-CRi", 0, 32, 14, 3, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CRJ, "f-CRj", 0, 32, 2, 3, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CRK, "f-CRk", 0, 32, 27, 3, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CCI, "f-CCi", 0, 32, 11, 3, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CRJ_INT, "f-CRj_int", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CRJ_FLOAT, "f-CRj_float", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ICCI_1, "f-ICCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ICCI_2, "f-ICCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ICCI_3, "f-ICCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FCCI_1, "f-FCCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FCCI_2, "f-FCCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FCCI_3, "f-FCCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FCCK, "f-FCCk", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_EIR, "f-eir", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_S10, "f-s10", 0, 32, 9, 10, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_S12, "f-s12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_D12, "f-d12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_U16, "f-u16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_S16, "f-s16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_S6, "f-s6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_S6_1, "f-s6_1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_U6, "f-u6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_S5, "f-s5", 0, 32, 4, 5, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_U12_H, "f-u12-h", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_U12_L, "f-u12-l", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_U12, "f-u12", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
! { FRV_F_INT_CC, "f-int-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_FLT_CC, "f-flt-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_COND, "f-cond", 0, 32, 8, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_CCOND, "f-ccond", 0, 32, 12, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_HINT, "f-hint", 0, 32, 17, 2, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_LI, "f-LI", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_LOCK, "f-lock", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_DEBUG, "f-debug", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_A, "f-A", 0, 32, 17, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_AE, "f-ae", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_SPR_H, "f-spr-h", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_SPR_L, "f-spr-l", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_SPR, "f-spr", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
! { FRV_F_LABEL16, "f-label16", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
! { FRV_F_LABELH6, "f-labelH6", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_LABELL18, "f-labelL18", 0, 32, 17, 18, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_LABEL24, "f-label24", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } } },
! { FRV_F_LRAE, "f-LRAE", 0, 32, 5, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_LRAD, "f-LRAD", 0, 32, 4, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_LRAS, "f-LRAS", 0, 32, 3, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_TLBPROPX, "f-TLBPRopx", 0, 32, 28, 3, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_TLBPRL, "f-TLBPRL", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
! { FRV_F_ICCI_1_NULL, "f-ICCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_ICCI_2_NULL, "f-ICCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_ICCI_3_NULL, "f-ICCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_FCCI_1_NULL, "f-FCCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_FCCI_2_NULL, "f-FCCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_FCCI_3_NULL, "f-FCCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_RS_NULL, "f-rs-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_GRI_NULL, "f-GRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_GRJ_NULL, "f-GRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_GRK_NULL, "f-GRk-null", 0, 32, 30, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_FRI_NULL, "f-FRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_FRJ_NULL, "f-FRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_ACCJ_NULL, "f-ACCj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_RD_NULL, "f-rd-null", 0, 32, 30, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_COND_NULL, "f-cond-null", 0, 32, 30, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_CCOND_NULL, "f-ccond-null", 0, 32, 12, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_S12_NULL, "f-s12-null", 0, 32, 11, 12, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_LABEL16_NULL, "f-label16-null", 0, 32, 15, 16, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_1, "f-misc-null-1", 0, 32, 30, 5, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_2, "f-misc-null-2", 0, 32, 11, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_3, "f-misc-null-3", 0, 32, 11, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_4, "f-misc-null-4", 0, 32, 17, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_5, "f-misc-null-5", 0, 32, 17, 16, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_6, "f-misc-null-6", 0, 32, 30, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_7, "f-misc-null-7", 0, 32, 17, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_8, "f-misc-null-8", 0, 32, 5, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_9, "f-misc-null-9", 0, 32, 5, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_10, "f-misc-null-10", 0, 32, 16, 5, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_MISC_NULL_11, "f-misc-null-11", 0, 32, 5, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_LRA_NULL, "f-LRA-null", 0, 32, 2, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_TLBPR_NULL, "f-TLBPR-null", 0, 32, 30, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_LI_OFF, "f-LI-off", 0, 32, 25, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_LI_ON, "f-LI-on", 0, 32, 25, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
! { FRV_F_RELOC_ANN, "f-reloc-ann", 0, 32, 0, 0, { 0, { (1<<MACH_BASE) } } },
! { 0, 0, 0, 0, 0, 0, {0, {0}} }
};
#undef A
--- 1886,1997 ----
const CGEN_IFLD frv_cgen_ifld_table[] =
{
! { FRV_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_PACK, "f-pack", 0, 32, 31, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_OP, "f-op", 0, 32, 24, 7, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_OPE1, "f-ope1", 0, 32, 11, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_OPE2, "f-ope2", 0, 32, 9, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_OPE3, "f-ope3", 0, 32, 15, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_OPE4, "f-ope4", 0, 32, 7, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_GRI, "f-GRi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_GRJ, "f-GRj", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_GRK, "f-GRk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FRI, "f-FRi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FRJ, "f-FRj", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FRK, "f-FRk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CPRI, "f-CPRi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CPRJ, "f-CPRj", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CPRK, "f-CPRk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACCGI, "f-ACCGi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACCGK, "f-ACCGk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACC40SI, "f-ACC40Si", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACC40UI, "f-ACC40Ui", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACC40SK, "f-ACC40Sk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACC40UK, "f-ACC40Uk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CRI, "f-CRi", 0, 32, 14, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CRJ, "f-CRj", 0, 32, 2, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CRK, "f-CRk", 0, 32, 27, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CCI, "f-CCi", 0, 32, 11, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CRJ_INT, "f-CRj_int", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CRJ_FLOAT, "f-CRj_float", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ICCI_1, "f-ICCi_1", 0, 32, 11, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ICCI_2, "f-ICCi_2", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ICCI_3, "f-ICCi_3", 0, 32, 1, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCI_1, "f-FCCi_1", 0, 32, 11, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCI_2, "f-FCCi_2", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCI_3, "f-FCCi_3", 0, 32, 1, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCK, "f-FCCk", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_EIR, "f-eir", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S10, "f-s10", 0, 32, 9, 10, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S12, "f-s12", 0, 32, 11, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_D12, "f-d12", 0, 32, 11, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_U16, "f-u16", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S16, "f-s16", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S6, "f-s6", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S6_1, "f-s6_1", 0, 32, 11, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_U6, "f-u6", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S5, "f-s5", 0, 32, 4, 5, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_U12_H, "f-u12-h", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_U12_L, "f-u12-l", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_U12, "f-u12", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_INT_CC, "f-int-cc", 0, 32, 30, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FLT_CC, "f-flt-cc", 0, 32, 30, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_COND, "f-cond", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CCOND, "f-ccond", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_HINT, "f-hint", 0, 32, 17, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LI, "f-LI", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LOCK, "f-lock", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_DEBUG, "f-debug", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_A, "f-A", 0, 32, 17, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_AE, "f-ae", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_SPR_H, "f-spr-h", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_SPR_L, "f-spr-l", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_SPR, "f-spr", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LABEL16, "f-label16", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LABELH6, "f-labelH6", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LABELL18, "f-labelL18", 0, 32, 17, 18, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LABEL24, "f-label24", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LRAE, "f-LRAE", 0, 32, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LRAD, "f-LRAD", 0, 32, 4, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LRAS, "f-LRAS", 0, 32, 3, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_TLBPROPX, "f-TLBPRopx", 0, 32, 28, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_TLBPRL, "f-TLBPRL", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ICCI_1_NULL, "f-ICCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ICCI_2_NULL, "f-ICCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ICCI_3_NULL, "f-ICCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCI_1_NULL, "f-FCCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCI_2_NULL, "f-FCCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FCCI_3_NULL, "f-FCCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_RS_NULL, "f-rs-null", 0, 32, 17, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_GRI_NULL, "f-GRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_GRJ_NULL, "f-GRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_GRK_NULL, "f-GRk-null", 0, 32, 30, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FRI_NULL, "f-FRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_FRJ_NULL, "f-FRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_ACCJ_NULL, "f-ACCj-null", 0, 32, 5, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_RD_NULL, "f-rd-null", 0, 32, 30, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_COND_NULL, "f-cond-null", 0, 32, 30, 4, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_CCOND_NULL, "f-ccond-null", 0, 32, 12, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_S12_NULL, "f-s12-null", 0, 32, 11, 12, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LABEL16_NULL, "f-label16-null", 0, 32, 15, 16, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_1, "f-misc-null-1", 0, 32, 30, 5, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_2, "f-misc-null-2", 0, 32, 11, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_3, "f-misc-null-3", 0, 32, 11, 4, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_4, "f-misc-null-4", 0, 32, 17, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_5, "f-misc-null-5", 0, 32, 17, 16, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_6, "f-misc-null-6", 0, 32, 30, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_7, "f-misc-null-7", 0, 32, 17, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_8, "f-misc-null-8", 0, 32, 5, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_9, "f-misc-null-9", 0, 32, 5, 4, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_10, "f-misc-null-10", 0, 32, 16, 5, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_MISC_NULL_11, "f-misc-null-11", 0, 32, 5, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LRA_NULL, "f-LRA-null", 0, 32, 2, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_TLBPR_NULL, "f-TLBPR-null", 0, 32, 30, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LI_OFF, "f-LI-off", 0, 32, 25, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_LI_ON, "f-LI-on", 0, 32, 25, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
! { FRV_F_RELOC_ANN, "f-reloc-ann", 0, 32, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
! { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
};
#undef A
*************** const CGEN_OPERAND frv_cgen_operand_tabl
*** 2044,2406 ****
/* pc: program counter */
{ "pc", FRV_OPERAND_PC, HW_H_PC, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_NIL] } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* pack: packing bit */
{ "pack", FRV_OPERAND_PACK, HW_H_PACK, 31, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_PACK] } },
! { 0, { (1<<MACH_BASE) } } },
/* GRi: source register 1 */
{ "GRi", FRV_OPERAND_GRI, HW_H_GR, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRI] } },
! { 0, { (1<<MACH_BASE) } } },
/* GRj: source register 2 */
{ "GRj", FRV_OPERAND_GRJ, HW_H_GR, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRJ] } },
! { 0, { (1<<MACH_BASE) } } },
/* GRk: destination register */
{ "GRk", FRV_OPERAND_GRK, HW_H_GR, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* GRkhi: destination register */
{ "GRkhi", FRV_OPERAND_GRKHI, HW_H_GR_HI, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* GRklo: destination register */
{ "GRklo", FRV_OPERAND_GRKLO, HW_H_GR_LO, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* GRdoublek: destination register */
{ "GRdoublek", FRV_OPERAND_GRDOUBLEK, HW_H_GR_DOUBLE, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* ACC40Si: signed accumulator */
{ "ACC40Si", FRV_OPERAND_ACC40SI, HW_H_ACC40S, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SI] } },
! { 0, { (1<<MACH_BASE) } } },
/* ACC40Ui: unsigned accumulator */
{ "ACC40Ui", FRV_OPERAND_ACC40UI, HW_H_ACC40U, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UI] } },
! { 0, { (1<<MACH_BASE) } } },
/* ACC40Sk: target accumulator */
{ "ACC40Sk", FRV_OPERAND_ACC40SK, HW_H_ACC40S, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SK] } },
! { 0, { (1<<MACH_BASE) } } },
/* ACC40Uk: target accumulator */
{ "ACC40Uk", FRV_OPERAND_ACC40UK, HW_H_ACC40U, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UK] } },
! { 0, { (1<<MACH_BASE) } } },
/* ACCGi: source register */
{ "ACCGi", FRV_OPERAND_ACCGI, HW_H_ACCG, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGI] } },
! { 0, { (1<<MACH_BASE) } } },
/* ACCGk: target register */
{ "ACCGk", FRV_OPERAND_ACCGK, HW_H_ACCG, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGK] } },
! { 0, { (1<<MACH_BASE) } } },
/* CPRi: source register */
{ "CPRi", FRV_OPERAND_CPRI, HW_H_CPR, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRI] } },
! { 0, { (1<<MACH_FRV) } } },
/* CPRj: source register */
{ "CPRj", FRV_OPERAND_CPRJ, HW_H_CPR, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRJ] } },
! { 0, { (1<<MACH_FRV) } } },
/* CPRk: destination register */
{ "CPRk", FRV_OPERAND_CPRK, HW_H_CPR, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
! { 0, { (1<<MACH_FRV) } } },
/* CPRdoublek: destination register */
{ "CPRdoublek", FRV_OPERAND_CPRDOUBLEK, HW_H_CPR_DOUBLE, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
! { 0, { (1<<MACH_FRV) } } },
/* FRinti: source register 1 */
{ "FRinti", FRV_OPERAND_FRINTI, HW_H_FR_INT, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRintj: source register 2 */
{ "FRintj", FRV_OPERAND_FRINTJ, HW_H_FR_INT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRintk: target register */
{ "FRintk", FRV_OPERAND_FRINTK, HW_H_FR_INT, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRi: source register 1 */
{ "FRi", FRV_OPERAND_FRI, HW_H_FR, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRj: source register 2 */
{ "FRj", FRV_OPERAND_FRJ, HW_H_FR, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRk: destination register */
{ "FRk", FRV_OPERAND_FRK, HW_H_FR, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRkhi: destination register */
{ "FRkhi", FRV_OPERAND_FRKHI, HW_H_FR_HI, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRklo: destination register */
{ "FRklo", FRV_OPERAND_FRKLO, HW_H_FR_LO, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRdoublei: source register 1 */
{ "FRdoublei", FRV_OPERAND_FRDOUBLEI, HW_H_FR_DOUBLE, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRdoublej: source register 2 */
{ "FRdoublej", FRV_OPERAND_FRDOUBLEJ, HW_H_FR_DOUBLE, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRdoublek: target register */
{ "FRdoublek", FRV_OPERAND_FRDOUBLEK, HW_H_FR_DOUBLE, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* CRi: source register 1 */
{ "CRi", FRV_OPERAND_CRI, HW_H_CCCR, 14, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRI] } },
! { 0, { (1<<MACH_BASE) } } },
/* CRj: source register 2 */
{ "CRj", FRV_OPERAND_CRJ, HW_H_CCCR, 2, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ] } },
! { 0, { (1<<MACH_BASE) } } },
/* CRj_int: destination register */
{ "CRj_int", FRV_OPERAND_CRJ_INT, HW_H_CCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_INT] } },
! { 0, { (1<<MACH_BASE) } } },
/* CRj_float: destination register */
{ "CRj_float", FRV_OPERAND_CRJ_FLOAT, HW_H_CCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_FLOAT] } },
! { 0, { (1<<MACH_BASE) } } },
/* CRk: destination register */
{ "CRk", FRV_OPERAND_CRK, HW_H_CCCR, 27, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* CCi: condition register */
{ "CCi", FRV_OPERAND_CCI, HW_H_CCCR, 11, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCI] } },
! { 0, { (1<<MACH_BASE) } } },
/* ICCi_1: condition register */
{ "ICCi_1", FRV_OPERAND_ICCI_1, HW_H_ICCR, 11, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_1] } },
! { 0, { (1<<MACH_BASE) } } },
/* ICCi_2: condition register */
{ "ICCi_2", FRV_OPERAND_ICCI_2, HW_H_ICCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_2] } },
! { 0, { (1<<MACH_BASE) } } },
/* ICCi_3: condition register */
{ "ICCi_3", FRV_OPERAND_ICCI_3, HW_H_ICCR, 1, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_3] } },
! { 0, { (1<<MACH_BASE) } } },
/* FCCi_1: condition register */
{ "FCCi_1", FRV_OPERAND_FCCI_1, HW_H_FCCR, 11, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_1] } },
! { 0, { (1<<MACH_BASE) } } },
/* FCCi_2: condition register */
{ "FCCi_2", FRV_OPERAND_FCCI_2, HW_H_FCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_2] } },
! { 0, { (1<<MACH_BASE) } } },
/* FCCi_3: condition register */
{ "FCCi_3", FRV_OPERAND_FCCI_3, HW_H_FCCR, 1, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_3] } },
! { 0, { (1<<MACH_BASE) } } },
/* FCCk: condition register */
{ "FCCk", FRV_OPERAND_FCCK, HW_H_FCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCK] } },
! { 0, { (1<<MACH_BASE) } } },
/* eir: exception insn reg */
{ "eir", FRV_OPERAND_EIR, HW_H_UINT, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_EIR] } },
! { 0, { (1<<MACH_BASE) } } },
/* s10: 10 bit signed immediate */
{ "s10", FRV_OPERAND_S10, HW_H_SINT, 9, 10,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S10] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* u16: 16 bit unsigned immediate */
{ "u16", FRV_OPERAND_U16, HW_H_UINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* s16: 16 bit signed immediate */
{ "s16", FRV_OPERAND_S16, HW_H_SINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* s6: 6 bit signed immediate */
{ "s6", FRV_OPERAND_S6, HW_H_SINT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* s6_1: 6 bit signed immediate */
{ "s6_1", FRV_OPERAND_S6_1, HW_H_SINT, 11, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6_1] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* u6: 6 bit unsigned immediate */
{ "u6", FRV_OPERAND_U6, HW_H_UINT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U6] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* s5: 5 bit signed immediate */
{ "s5", FRV_OPERAND_S5, HW_H_SINT, 4, 5,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S5] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* cond: conditional arithmetic */
{ "cond", FRV_OPERAND_COND, HW_H_UINT, 8, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_COND] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* ccond: lr branch condition */
{ "ccond", FRV_OPERAND_CCOND, HW_H_UINT, 12, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCOND] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* hint: 2 bit branch predictor */
{ "hint", FRV_OPERAND_HINT, HW_H_UINT, 17, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* hint_taken: 2 bit branch predictor */
{ "hint_taken", FRV_OPERAND_HINT_TAKEN, HW_H_HINT_TAKEN, 17, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
! { 0, { (1<<MACH_BASE) } } },
/* hint_not_taken: 2 bit branch predictor */
{ "hint_not_taken", FRV_OPERAND_HINT_NOT_TAKEN, HW_H_HINT_NOT_TAKEN, 17, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
! { 0, { (1<<MACH_BASE) } } },
/* LI: link indicator */
{ "LI", FRV_OPERAND_LI, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LI] } },
! { 0, { (1<<MACH_BASE) } } },
/* lock: cache lock indicator */
{ "lock", FRV_OPERAND_LOCK, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LOCK] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* debug: debug mode indicator */
{ "debug", FRV_OPERAND_DEBUG, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_DEBUG] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* ae: all entries indicator */
{ "ae", FRV_OPERAND_AE, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_AE] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* label16: 18 bit pc relative address */
{ "label16", FRV_OPERAND_LABEL16, HW_H_IADDR, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABEL16] } },
! { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
/* LRAE: Load Real Address E flag */
{ "LRAE", FRV_OPERAND_LRAE, HW_H_UINT, 5, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAE] } },
! { 0, { (1<<MACH_BASE) } } },
/* LRAD: Load Real Address D flag */
{ "LRAD", FRV_OPERAND_LRAD, HW_H_UINT, 4, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAD] } },
! { 0, { (1<<MACH_BASE) } } },
/* LRAS: Load Real Address S flag */
{ "LRAS", FRV_OPERAND_LRAS, HW_H_UINT, 3, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAS] } },
! { 0, { (1<<MACH_BASE) } } },
/* TLBPRopx: TLB Probe operation number */
{ "TLBPRopx", FRV_OPERAND_TLBPROPX, HW_H_UINT, 28, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPROPX] } },
! { 0, { (1<<MACH_BASE) } } },
/* TLBPRL: TLB Probe L flag */
{ "TLBPRL", FRV_OPERAND_TLBPRL, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPRL] } },
! { 0, { (1<<MACH_BASE) } } },
/* A0: A==0 operand of mclracc */
{ "A0", FRV_OPERAND_A0, HW_H_UINT, 17, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
! { 0, { (1<<MACH_BASE) } } },
/* A1: A==1 operand of mclracc */
{ "A1", FRV_OPERAND_A1, HW_H_UINT, 17, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRintieven: (even) source register 1 */
{ "FRintieven", FRV_OPERAND_FRINTIEVEN, HW_H_FR_INT, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRintjeven: (even) source register 2 */
{ "FRintjeven", FRV_OPERAND_FRINTJEVEN, HW_H_FR_INT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { (1<<MACH_BASE) } } },
/* FRintkeven: (even) target register */
{ "FRintkeven", FRV_OPERAND_FRINTKEVEN, HW_H_FR_INT, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { (1<<MACH_BASE) } } },
/* d12: 12 bit signed immediate */
{ "d12", FRV_OPERAND_D12, HW_H_SINT, 11, 12,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
! { 0, { (1<<MACH_BASE) } } },
/* s12: 12 bit signed immediate */
{ "s12", FRV_OPERAND_S12, HW_H_SINT, 11, 12,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
! { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
/* u12: 12 bit signed immediate */
{ "u12", FRV_OPERAND_U12, HW_H_SINT, 5, 12,
{ 2, { (const PTR) &FRV_F_U12_MULTI_IFIELD[0] } },
! { 0|A(HASH_PREFIX)|A(VIRTUAL), { (1<<MACH_BASE) } } },
/* spr: special purpose register */
{ "spr", FRV_OPERAND_SPR, HW_H_SPR, 17, 12,
{ 2, { (const PTR) &FRV_F_SPR_MULTI_IFIELD[0] } },
! { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
/* ulo16: 16 bit unsigned immediate, for #lo() */
{ "ulo16", FRV_OPERAND_ULO16, HW_H_UINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
! { 0, { (1<<MACH_BASE) } } },
/* slo16: 16 bit unsigned immediate, for #lo() */
{ "slo16", FRV_OPERAND_SLO16, HW_H_SINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
! { 0, { (1<<MACH_BASE) } } },
/* uhi16: 16 bit unsigned immediate, for #hi() */
{ "uhi16", FRV_OPERAND_UHI16, HW_H_UINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
! { 0, { (1<<MACH_BASE) } } },
/* label24: 26 bit pc relative address */
{ "label24", FRV_OPERAND_LABEL24, HW_H_IADDR, 17, 24,
{ 2, { (const PTR) &FRV_F_LABEL24_MULTI_IFIELD[0] } },
! { 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } } },
/* psr_esr: PSR.ESR bit */
{ "psr_esr", FRV_OPERAND_PSR_ESR, HW_H_PSR_ESR, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* psr_s: PSR.S bit */
{ "psr_s", FRV_OPERAND_PSR_S, HW_H_PSR_S, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* psr_ps: PSR.PS bit */
{ "psr_ps", FRV_OPERAND_PSR_PS, HW_H_PSR_PS, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* psr_et: PSR.ET bit */
{ "psr_et", FRV_OPERAND_PSR_ET, HW_H_PSR_ET, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* bpsr_bs: BPSR.BS bit */
{ "bpsr_bs", FRV_OPERAND_BPSR_BS, HW_H_BPSR_BS, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* bpsr_bet: BPSR.BET bit */
{ "bpsr_bet", FRV_OPERAND_BPSR_BET, HW_H_BPSR_BET, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* tbr_tba: TBR.TBA */
{ "tbr_tba", FRV_OPERAND_TBR_TBA, HW_H_TBR_TBA, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* tbr_tt: TBR.TT */
{ "tbr_tt", FRV_OPERAND_TBR_TT, HW_H_TBR_TT, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* ldann: ld annotation */
{ "ldann", FRV_OPERAND_LDANN, HW_H_RELOC_ANN, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
! { 0, { (1<<MACH_BASE) } } },
/* lddann: ldd annotation */
{ "lddann", FRV_OPERAND_LDDANN, HW_H_RELOC_ANN, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
! { 0, { (1<<MACH_BASE) } } },
/* callann: call annotation */
{ "callann", FRV_OPERAND_CALLANN, HW_H_RELOC_ANN, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
! { 0, { (1<<MACH_BASE) } } },
/* sentinel */
{ 0, 0, 0, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0, { 0 } } }
};
#undef A
--- 2044,2406 ----
/* pc: program counter */
{ "pc", FRV_OPERAND_PC, HW_H_PC, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_NIL] } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* pack: packing bit */
{ "pack", FRV_OPERAND_PACK, HW_H_PACK, 31, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_PACK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* GRi: source register 1 */
{ "GRi", FRV_OPERAND_GRI, HW_H_GR, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* GRj: source register 2 */
{ "GRj", FRV_OPERAND_GRJ, HW_H_GR, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRJ] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* GRk: destination register */
{ "GRk", FRV_OPERAND_GRK, HW_H_GR, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* GRkhi: destination register */
{ "GRkhi", FRV_OPERAND_GRKHI, HW_H_GR_HI, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* GRklo: destination register */
{ "GRklo", FRV_OPERAND_GRKLO, HW_H_GR_LO, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* GRdoublek: destination register */
{ "GRdoublek", FRV_OPERAND_GRDOUBLEK, HW_H_GR_DOUBLE, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ACC40Si: signed accumulator */
{ "ACC40Si", FRV_OPERAND_ACC40SI, HW_H_ACC40S, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ACC40Ui: unsigned accumulator */
{ "ACC40Ui", FRV_OPERAND_ACC40UI, HW_H_ACC40U, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ACC40Sk: target accumulator */
{ "ACC40Sk", FRV_OPERAND_ACC40SK, HW_H_ACC40S, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ACC40Uk: target accumulator */
{ "ACC40Uk", FRV_OPERAND_ACC40UK, HW_H_ACC40U, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ACCGi: source register */
{ "ACCGi", FRV_OPERAND_ACCGI, HW_H_ACCG, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ACCGk: target register */
{ "ACCGk", FRV_OPERAND_ACCGK, HW_H_ACCG, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CPRi: source register */
{ "CPRi", FRV_OPERAND_CPRI, HW_H_CPR, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRI] } },
! { 0, { { { (1<<MACH_FRV), 0 } } } } },
/* CPRj: source register */
{ "CPRj", FRV_OPERAND_CPRJ, HW_H_CPR, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRJ] } },
! { 0, { { { (1<<MACH_FRV), 0 } } } } },
/* CPRk: destination register */
{ "CPRk", FRV_OPERAND_CPRK, HW_H_CPR, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
! { 0, { { { (1<<MACH_FRV), 0 } } } } },
/* CPRdoublek: destination register */
{ "CPRdoublek", FRV_OPERAND_CPRDOUBLEK, HW_H_CPR_DOUBLE, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
! { 0, { { { (1<<MACH_FRV), 0 } } } } },
/* FRinti: source register 1 */
{ "FRinti", FRV_OPERAND_FRINTI, HW_H_FR_INT, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRintj: source register 2 */
{ "FRintj", FRV_OPERAND_FRINTJ, HW_H_FR_INT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRintk: target register */
{ "FRintk", FRV_OPERAND_FRINTK, HW_H_FR_INT, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRi: source register 1 */
{ "FRi", FRV_OPERAND_FRI, HW_H_FR, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRj: source register 2 */
{ "FRj", FRV_OPERAND_FRJ, HW_H_FR, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRk: destination register */
{ "FRk", FRV_OPERAND_FRK, HW_H_FR, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRkhi: destination register */
{ "FRkhi", FRV_OPERAND_FRKHI, HW_H_FR_HI, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRklo: destination register */
{ "FRklo", FRV_OPERAND_FRKLO, HW_H_FR_LO, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRdoublei: source register 1 */
{ "FRdoublei", FRV_OPERAND_FRDOUBLEI, HW_H_FR_DOUBLE, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRdoublej: source register 2 */
{ "FRdoublej", FRV_OPERAND_FRDOUBLEJ, HW_H_FR_DOUBLE, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRdoublek: target register */
{ "FRdoublek", FRV_OPERAND_FRDOUBLEK, HW_H_FR_DOUBLE, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CRi: source register 1 */
{ "CRi", FRV_OPERAND_CRI, HW_H_CCCR, 14, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CRj: source register 2 */
{ "CRj", FRV_OPERAND_CRJ, HW_H_CCCR, 2, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CRj_int: destination register */
{ "CRj_int", FRV_OPERAND_CRJ_INT, HW_H_CCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_INT] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CRj_float: destination register */
{ "CRj_float", FRV_OPERAND_CRJ_FLOAT, HW_H_CCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_FLOAT] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CRk: destination register */
{ "CRk", FRV_OPERAND_CRK, HW_H_CCCR, 27, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* CCi: condition register */
{ "CCi", FRV_OPERAND_CCI, HW_H_CCCR, 11, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ICCi_1: condition register */
{ "ICCi_1", FRV_OPERAND_ICCI_1, HW_H_ICCR, 11, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_1] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ICCi_2: condition register */
{ "ICCi_2", FRV_OPERAND_ICCI_2, HW_H_ICCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_2] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* ICCi_3: condition register */
{ "ICCi_3", FRV_OPERAND_ICCI_3, HW_H_ICCR, 1, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_3] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FCCi_1: condition register */
{ "FCCi_1", FRV_OPERAND_FCCI_1, HW_H_FCCR, 11, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_1] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FCCi_2: condition register */
{ "FCCi_2", FRV_OPERAND_FCCI_2, HW_H_FCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_2] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FCCi_3: condition register */
{ "FCCi_3", FRV_OPERAND_FCCI_3, HW_H_FCCR, 1, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_3] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FCCk: condition register */
{ "FCCk", FRV_OPERAND_FCCK, HW_H_FCCR, 26, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* eir: exception insn reg */
{ "eir", FRV_OPERAND_EIR, HW_H_UINT, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_EIR] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* s10: 10 bit signed immediate */
{ "s10", FRV_OPERAND_S10, HW_H_SINT, 9, 10,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S10] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* u16: 16 bit unsigned immediate */
{ "u16", FRV_OPERAND_U16, HW_H_UINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* s16: 16 bit signed immediate */
{ "s16", FRV_OPERAND_S16, HW_H_SINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* s6: 6 bit signed immediate */
{ "s6", FRV_OPERAND_S6, HW_H_SINT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* s6_1: 6 bit signed immediate */
{ "s6_1", FRV_OPERAND_S6_1, HW_H_SINT, 11, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6_1] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* u6: 6 bit unsigned immediate */
{ "u6", FRV_OPERAND_U6, HW_H_UINT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U6] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* s5: 5 bit signed immediate */
{ "s5", FRV_OPERAND_S5, HW_H_SINT, 4, 5,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S5] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* cond: conditional arithmetic */
{ "cond", FRV_OPERAND_COND, HW_H_UINT, 8, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_COND] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* ccond: lr branch condition */
{ "ccond", FRV_OPERAND_CCOND, HW_H_UINT, 12, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCOND] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* hint: 2 bit branch predictor */
{ "hint", FRV_OPERAND_HINT, HW_H_UINT, 17, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* hint_taken: 2 bit branch predictor */
{ "hint_taken", FRV_OPERAND_HINT_TAKEN, HW_H_HINT_TAKEN, 17, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* hint_not_taken: 2 bit branch predictor */
{ "hint_not_taken", FRV_OPERAND_HINT_NOT_TAKEN, HW_H_HINT_NOT_TAKEN, 17, 2,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* LI: link indicator */
{ "LI", FRV_OPERAND_LI, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* lock: cache lock indicator */
{ "lock", FRV_OPERAND_LOCK, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LOCK] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* debug: debug mode indicator */
{ "debug", FRV_OPERAND_DEBUG, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_DEBUG] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* ae: all entries indicator */
{ "ae", FRV_OPERAND_AE, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_AE] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* label16: 18 bit pc relative address */
{ "label16", FRV_OPERAND_LABEL16, HW_H_IADDR, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABEL16] } },
! { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
/* LRAE: Load Real Address E flag */
{ "LRAE", FRV_OPERAND_LRAE, HW_H_UINT, 5, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAE] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* LRAD: Load Real Address D flag */
{ "LRAD", FRV_OPERAND_LRAD, HW_H_UINT, 4, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAD] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* LRAS: Load Real Address S flag */
{ "LRAS", FRV_OPERAND_LRAS, HW_H_UINT, 3, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAS] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* TLBPRopx: TLB Probe operation number */
{ "TLBPRopx", FRV_OPERAND_TLBPROPX, HW_H_UINT, 28, 3,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPROPX] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* TLBPRL: TLB Probe L flag */
{ "TLBPRL", FRV_OPERAND_TLBPRL, HW_H_UINT, 25, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPRL] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* A0: A==0 operand of mclracc */
{ "A0", FRV_OPERAND_A0, HW_H_UINT, 17, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* A1: A==1 operand of mclracc */
{ "A1", FRV_OPERAND_A1, HW_H_UINT, 17, 1,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRintieven: (even) source register 1 */
{ "FRintieven", FRV_OPERAND_FRINTIEVEN, HW_H_FR_INT, 17, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRintjeven: (even) source register 2 */
{ "FRintjeven", FRV_OPERAND_FRINTJEVEN, HW_H_FR_INT, 5, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* FRintkeven: (even) target register */
{ "FRintkeven", FRV_OPERAND_FRINTKEVEN, HW_H_FR_INT, 30, 6,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* d12: 12 bit signed immediate */
{ "d12", FRV_OPERAND_D12, HW_H_SINT, 11, 12,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* s12: 12 bit signed immediate */
{ "s12", FRV_OPERAND_S12, HW_H_SINT, 11, 12,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
! { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
/* u12: 12 bit signed immediate */
{ "u12", FRV_OPERAND_U12, HW_H_SINT, 5, 12,
{ 2, { (const PTR) &FRV_F_U12_MULTI_IFIELD[0] } },
! { 0|A(HASH_PREFIX)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
/* spr: special purpose register */
{ "spr", FRV_OPERAND_SPR, HW_H_SPR, 17, 12,
{ 2, { (const PTR) &FRV_F_SPR_MULTI_IFIELD[0] } },
! { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
/* ulo16: 16 bit unsigned immediate, for #lo() */
{ "ulo16", FRV_OPERAND_ULO16, HW_H_UINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* slo16: 16 bit unsigned immediate, for #lo() */
{ "slo16", FRV_OPERAND_SLO16, HW_H_SINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* uhi16: 16 bit unsigned immediate, for #hi() */
{ "uhi16", FRV_OPERAND_UHI16, HW_H_UINT, 15, 16,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* label24: 26 bit pc relative address */
{ "label24", FRV_OPERAND_LABEL24, HW_H_IADDR, 17, 24,
{ 2, { (const PTR) &FRV_F_LABEL24_MULTI_IFIELD[0] } },
! { 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
/* psr_esr: PSR.ESR bit */
{ "psr_esr", FRV_OPERAND_PSR_ESR, HW_H_PSR_ESR, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* psr_s: PSR.S bit */
{ "psr_s", FRV_OPERAND_PSR_S, HW_H_PSR_S, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* psr_ps: PSR.PS bit */
{ "psr_ps", FRV_OPERAND_PSR_PS, HW_H_PSR_PS, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* psr_et: PSR.ET bit */
{ "psr_et", FRV_OPERAND_PSR_ET, HW_H_PSR_ET, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* bpsr_bs: BPSR.BS bit */
{ "bpsr_bs", FRV_OPERAND_BPSR_BS, HW_H_BPSR_BS, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* bpsr_bet: BPSR.BET bit */
{ "bpsr_bet", FRV_OPERAND_BPSR_BET, HW_H_BPSR_BET, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* tbr_tba: TBR.TBA */
{ "tbr_tba", FRV_OPERAND_TBR_TBA, HW_H_TBR_TBA, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* tbr_tt: TBR.TT */
{ "tbr_tt", FRV_OPERAND_TBR_TT, HW_H_TBR_TT, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
/* ldann: ld annotation */
{ "ldann", FRV_OPERAND_LDANN, HW_H_RELOC_ANN, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* lddann: ldd annotation */
{ "lddann", FRV_OPERAND_LDDANN, HW_H_RELOC_ANN, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* callann: call annotation */
{ "callann", FRV_OPERAND_CALLANN, HW_H_RELOC_ANN, 0, 0,
{ 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } },
/* sentinel */
{ 0, 0, 0, 0, 0,
{ 0, { (const PTR) 0 } },
! { 0, { { { (1<<MACH_BASE), 0 } } } } }
};
#undef A
*************** static const CGEN_IBASE frv_cgen_insn_ta
*** 2420,6140 ****
/* Special null first entry.
A `num' value of zero is thus invalid.
Also, the special `invalid' insn resides here. */
! { 0, 0, 0, 0, {0, {0}} },
/* add$pack $GRi,$GRj,$GRk */
{
FRV_INSN_ADD, "add", "add", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sub$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SUB, "sub", "sub", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* and$pack $GRi,$GRj,$GRk */
{
FRV_INSN_AND, "and", "and", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* or$pack $GRi,$GRj,$GRk */
{
FRV_INSN_OR, "or", "or", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xor$pack $GRi,$GRj,$GRk */
{
FRV_INSN_XOR, "xor", "xor", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* not$pack $GRj,$GRk */
{
FRV_INSN_NOT, "not", "not", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sdiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SDIV, "sdiv", "sdiv", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nsdiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_NSDIV, "nsdiv", "nsdiv", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* udiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_UDIV, "udiv", "udiv", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nudiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_NUDIV, "nudiv", "nudiv", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* smul$pack $GRi,$GRj,$GRdoublek */
{
FRV_INSN_SMUL, "smul", "smul", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umul$pack $GRi,$GRj,$GRdoublek */
{
FRV_INSN_UMUL, "umul", "umul", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* smu$pack $GRi,$GRj */
{
FRV_INSN_SMU, "smu", "smu", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IACC, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* smass$pack $GRi,$GRj */
{
FRV_INSN_SMASS, "smass", "smass", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IACC, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* smsss$pack $GRi,$GRj */
{
FRV_INSN_SMSSS, "smsss", "smsss", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IACC, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* sll$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SLL, "sll", "sll", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srl$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SRL, "srl", "srl", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sra$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SRA, "sra", "sra", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* slass$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SLASS, "slass", "slass", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* scutss$pack $GRj,$GRk */
{
FRV_INSN_SCUTSS, "scutss", "scutss", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_I0, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* scan$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SCAN, "scan", "scan", 32,
! { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CADD, "cadd", "cadd", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSUB, "csub", "csub", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CAND, "cand", "cand", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_COR, "cor", "cor", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CXOR, "cxor", "cxor", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cnot$pack $GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CNOT, "cnot", "cnot", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
{
FRV_INSN_CSMUL, "csmul", "csmul", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSDIV, "csdiv", "csdiv", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CUDIV, "cudiv", "cudiv", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSLL, "csll", "csll", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRL, "csrl", "csrl", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRA, "csra", "csra", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSCAN, "cscan", "cscan", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDCC, "addcc", "addcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBCC, "subcc", "subcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ANDCC, "andcc", "andcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ORCC, "orcc", "orcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_XORCC, "xorcc", "xorcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SLLCC, "sllcc", "sllcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SRLCC, "srlcc", "srlcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SRACC, "sracc", "sracc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
{
FRV_INSN_SMULCC, "smulcc", "smulcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
{
FRV_INSN_UMULCC, "umulcc", "umulcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CADDCC, "caddcc", "caddcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSUBCC, "csubcc", "csubcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
{
FRV_INSN_CSMULCC, "csmulcc", "csmulcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CANDCC, "candcc", "candcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CORCC, "corcc", "corcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CXORCC, "cxorcc", "cxorcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSLLCC, "csllcc", "csllcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRLCC, "csrlcc", "csrlcc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRACC, "csracc", "csracc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDX, "addx", "addx", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBX, "subx", "subx", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXCC, "addxcc", "addxcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXCC, "subxcc", "subxcc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addss$pack $GRi,$GRj,$GRk */
{
FRV_INSN_ADDSS, "addss", "addss", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* subss$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SUBSS, "subss", "subss", 32,
! { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* addi$pack $GRi,$s12,$GRk */
{
FRV_INSN_ADDI, "addi", "addi", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subi$pack $GRi,$s12,$GRk */
{
FRV_INSN_SUBI, "subi", "subi", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* andi$pack $GRi,$s12,$GRk */
{
FRV_INSN_ANDI, "andi", "andi", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* ori$pack $GRi,$s12,$GRk */
{
FRV_INSN_ORI, "ori", "ori", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xori$pack $GRi,$s12,$GRk */
{
FRV_INSN_XORI, "xori", "xori", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sdivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_SDIVI, "sdivi", "sdivi", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nsdivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_NSDIVI, "nsdivi", "nsdivi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* udivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_UDIVI, "udivi", "udivi", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nudivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_NUDIVI, "nudivi", "nudivi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* smuli$pack $GRi,$s12,$GRdoublek */
{
FRV_INSN_SMULI, "smuli", "smuli", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umuli$pack $GRi,$s12,$GRdoublek */
{
FRV_INSN_UMULI, "umuli", "umuli", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* slli$pack $GRi,$s12,$GRk */
{
FRV_INSN_SLLI, "slli", "slli", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srli$pack $GRi,$s12,$GRk */
{
FRV_INSN_SRLI, "srli", "srli", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srai$pack $GRi,$s12,$GRk */
{
FRV_INSN_SRAI, "srai", "srai", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* scani$pack $GRi,$s12,$GRk */
{
FRV_INSN_SCANI, "scani", "scani", 32,
! { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDICC, "addicc", "addicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBICC, "subicc", "subicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ANDICC, "andicc", "andicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ORICC, "oricc", "oricc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_XORICC, "xoricc", "xoricc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
{
FRV_INSN_SMULICC, "smulicc", "smulicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
{
FRV_INSN_UMULICC, "umulicc", "umulicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SLLICC, "sllicc", "sllicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SRLICC, "srlicc", "srlicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SRAICC, "sraicc", "sraicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXI, "addxi", "addxi", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXI, "subxi", "subxi", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXICC, "addxicc", "addxicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXICC, "subxicc", "subxicc", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cmpb$pack $GRi,$GRj,$ICCi_1 */
{
FRV_INSN_CMPB, "cmpb", "cmpb", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_I_1 } }
},
/* cmpba$pack $GRi,$GRj,$ICCi_1 */
{
FRV_INSN_CMPBA, "cmpba", "cmpba", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_I_1 } }
},
/* setlo$pack $ulo16,$GRklo */
{
FRV_INSN_SETLO, "setlo", "setlo", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sethi$pack $uhi16,$GRkhi */
{
FRV_INSN_SETHI, "sethi", "sethi", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* setlos$pack $slo16,$GRk */
{
FRV_INSN_SETLOS, "setlos", "setlos", 32,
! { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* ldsb$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSB, "ldsb", "ldsb", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldub$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUB, "ldub", "ldub", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldsh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSH, "ldsh", "ldsh", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lduh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUH, "lduh", "lduh", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ld$pack $ldann($GRi,$GRj),$GRk */
{
FRV_INSN_LD, "ld", "ld", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldbf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDBF, "ldbf", "ldbf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldhf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDHF, "ldhf", "ldhf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDF, "ldf", "ldf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldc$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDC, "ldc", "ldc", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldsb$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSB, "nldsb", "nldsb", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldub$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUB, "nldub", "nldub", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldsh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSH, "nldsh", "nldsh", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlduh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUH, "nlduh", "nlduh", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nld$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLD, "nld", "nld", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldbf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDBF, "nldbf", "nldbf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldhf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDHF, "nldhf", "nldhf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDF, "nldf", "nldf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldd$pack $lddann($GRi,$GRj),$GRdoublek */
{
FRV_INSN_LDD, "ldd", "ldd", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddf$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_LDDF, "lddf", "lddf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddc$pack @($GRi,$GRj),$CPRdoublek */
{
FRV_INSN_LDDC, "lddc", "lddc", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldd$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_NLDD, "nldd", "nldd", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddf$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_NLDDF, "nlddf", "nlddf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldq$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDQ, "ldq", "ldq", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDQF, "ldqf", "ldqf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqc$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDQC, "ldqc", "ldqc", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldq$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDQ, "nldq", "nldq", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDQF, "nldqf", "nldqf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldsbu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSBU, "ldsbu", "ldsbu", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldubu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUBU, "ldubu", "ldubu", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldshu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSHU, "ldshu", "ldshu", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lduhu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUHU, "lduhu", "lduhu", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDU, "ldu", "ldu", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldsbu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSBU, "nldsbu", "nldsbu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldubu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUBU, "nldubu", "nldubu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldshu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSHU, "nldshu", "nldshu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlduhu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUHU, "nlduhu", "nlduhu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDU, "nldu", "nldu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldbfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDBFU, "ldbfu", "ldbfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldhfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDHFU, "ldhfu", "ldhfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDFU, "ldfu", "ldfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldcu$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDCU, "ldcu", "ldcu", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldbfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDBFU, "nldbfu", "nldbfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldhfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDHFU, "nldhfu", "nldhfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDFU, "nldfu", "nldfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddu$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_LDDU, "lddu", "lddu", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddu$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_NLDDU, "nlddu", "nlddu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddfu$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_LDDFU, "lddfu", "lddfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddcu$pack @($GRi,$GRj),$CPRdoublek */
{
FRV_INSN_LDDCU, "lddcu", "lddcu", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddfu$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_NLDDFU, "nlddfu", "nlddfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldqu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDQU, "ldqu", "ldqu", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDQU, "nldqu", "nldqu", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDQFU, "ldqfu", "ldqfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqcu$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDQCU, "ldqcu", "ldqcu", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDQFU, "nldqfu", "nldqfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldsbi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDSBI, "ldsbi", "ldsbi", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldshi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDSHI, "ldshi", "ldshi", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDI, "ldi", "ldi", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldubi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDUBI, "ldubi", "ldubi", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lduhi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDUHI, "lduhi", "lduhi", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldbfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDBFI, "ldbfi", "ldbfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldhfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDHFI, "ldhfi", "ldhfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDFI, "ldfi", "ldfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldsbi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDSBI, "nldsbi", "nldsbi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldubi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDUBI, "nldubi", "nldubi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldshi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDSHI, "nldshi", "nldshi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlduhi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDUHI, "nlduhi", "nlduhi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDI, "nldi", "nldi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldbfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDBFI, "nldbfi", "nldbfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldhfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDHFI, "nldhfi", "nldhfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDFI, "nldfi", "nldfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddi$pack @($GRi,$d12),$GRdoublek */
{
FRV_INSN_LDDI, "lddi", "lddi", 32,
! { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddfi$pack @($GRi,$d12),$FRdoublek */
{
FRV_INSN_LDDFI, "lddfi", "lddfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddi$pack @($GRi,$d12),$GRdoublek */
{
FRV_INSN_NLDDI, "nlddi", "nlddi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddfi$pack @($GRi,$d12),$FRdoublek */
{
FRV_INSN_NLDDFI, "nlddfi", "nlddfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldqi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDQI, "ldqi", "ldqi", 32,
! { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDQFI, "ldqfi", "ldqfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDQFI, "nldqfi", "nldqfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* stb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STB, "stb", "stb", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sth$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STH, "sth", "sth", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* st$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_ST, "st", "st", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STBF, "stbf", "stbf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STHF, "sthf", "sthf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STF, "stf", "stf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stc$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STC, "stc", "stc", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* std$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STD, "std", "std", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdf$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDF, "stdf", "stdf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdc$pack $CPRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDC, "stdc", "stdc", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stq$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STQ, "stq", "stq", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STQF, "stqf", "stqf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqc$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STQC, "stqc", "stqc", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stbu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STBU, "stbu", "stbu", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STHU, "sthu", "sthu", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STU, "stu", "stu", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STBFU, "stbfu", "stbfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STHFU, "sthfu", "sthfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STFU, "stfu", "stfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stcu$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STCU, "stcu", "stcu", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdu$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDU, "stdu", "stdu", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdfu$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDFU, "stdfu", "stdfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDCU, "stdcu", "stdcu", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stqu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STQU, "stqu", "stqu", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STQFU, "stqfu", "stqfu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqcu$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STQCU, "stqcu", "stqcu", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSB, "cldsb", "cldsb", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUB, "cldub", "cldub", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSH, "cldsh", "cldsh", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUH, "clduh", "clduh", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLD, "cld", "cld", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDBF, "cldbf", "cldbf", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDHF, "cldhf", "cldhf", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDF, "cldf", "cldf", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
{
FRV_INSN_CLDD, "cldd", "cldd", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDF, "clddf", "clddf", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDQ, "cldq", "cldq", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSBU, "cldsbu", "cldsbu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUBU, "cldubu", "cldubu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSHU, "cldshu", "cldshu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUHU, "clduhu", "clduhu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDU, "cldu", "cldu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDBFU, "cldbfu", "cldbfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDHFU, "cldhfu", "cldhfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDFU, "cldfu", "cldfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDU, "clddu", "clddu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDFU, "clddfu", "clddfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDQU, "cldqu", "cldqu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTB, "cstb", "cstb", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTH, "csth", "csth", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CST, "cst", "cst", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBF, "cstbf", "cstbf", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHF, "csthf", "csthf", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTF, "cstf", "cstf", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTD, "cstd", "cstd", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDF, "cstdf", "cstdf", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTQ, "cstq", "cstq", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBU, "cstbu", "cstbu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHU, "csthu", "csthu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTU, "cstu", "cstu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBFU, "cstbfu", "cstbfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHFU, "csthfu", "csthfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTFU, "cstfu", "cstfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDU, "cstdu", "cstdu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDFU, "cstdfu", "cstdfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STBI, "stbi", "stbi", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STHI, "sthi", "sthi", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sti$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STI, "sti", "sti", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STBFI, "stbfi", "stbfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STHFI, "sthfi", "sthfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STFI, "stfi", "stfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdi$pack $GRdoublek,@($GRi,$d12) */
{
FRV_INSN_STDI, "stdi", "stdi", 32,
! { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stdfi$pack $FRdoublek,@($GRi,$d12) */
{
FRV_INSN_STDFI, "stdfi", "stdfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stqi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STQI, "stqi", "stqi", 32,
! { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STQFI, "stqfi", "stqfi", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* swap$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_SWAP, "swap", "swap", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* swapi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_SWAPI, "swapi", "swapi", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CSWAP, "cswap", "cswap", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* movgf$pack $GRj,$FRintk */
{
FRV_INSN_MOVGF, "movgf", "movgf", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movfg$pack $FRintk,$GRj */
{
FRV_INSN_MOVFG, "movfg", "movfg", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movgfd$pack $GRj,$FRintk */
{
FRV_INSN_MOVGFD, "movgfd", "movgfd", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movfgd$pack $FRintk,$GRj */
{
FRV_INSN_MOVFGD, "movfgd", "movfgd", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movgfq$pack $GRj,$FRintk */
{
FRV_INSN_MOVGFQ, "movgfq", "movgfq", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_4, FR550_MAJOR_NONE } }
},
/* movfgq$pack $FRintk,$GRj */
{
FRV_INSN_MOVFGQ, "movfgq", "movfgq", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_4, FR550_MAJOR_NONE } }
},
/* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOVGF, "cmovgf", "cmovgf", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
{
FRV_INSN_CMOVFG, "cmovfg", "cmovfg", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOVGFD, "cmovgfd", "cmovgfd", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
{
FRV_INSN_CMOVFGD, "cmovfgd", "cmovfgd", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movgs$pack $GRj,$spr */
{
FRV_INSN_MOVGS, "movgs", "movgs", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* movsg$pack $spr,$GRj */
{
FRV_INSN_MOVSG, "movsg", "movsg", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* bra$pack $hint_taken$label16 */
{
FRV_INSN_BRA, "bra", "bra", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bno$pack$hint_not_taken */
{
FRV_INSN_BNO, "bno", "bno", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* beq$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BEQ, "beq", "beq", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bne$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNE, "bne", "bne", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* ble$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLE, "ble", "ble", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bgt$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BGT, "bgt", "bgt", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* blt$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLT, "blt", "blt", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bge$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BGE, "bge", "bge", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bls$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLS, "bls", "bls", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bhi$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BHI, "bhi", "bhi", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bc$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BC, "bc", "bc", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bnc$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNC, "bnc", "bnc", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bn$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BN, "bn", "bn", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bp$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BP, "bp", "bp", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bv$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BV, "bv", "bv", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bnv$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNV, "bnv", "bnv", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbra$pack $hint_taken$label16 */
{
FRV_INSN_FBRA, "fbra", "fbra", 32,
! { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbno$pack$hint_not_taken */
{
FRV_INSN_FBNO, "fbno", "fbno", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbne$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBNE, "fbne", "fbne", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbeq$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBEQ, "fbeq", "fbeq", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fblg$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLG, "fblg", "fblg", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbue$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUE, "fbue", "fbue", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbul$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUL, "fbul", "fbul", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbge$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBGE, "fbge", "fbge", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fblt$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLT, "fblt", "fblt", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbuge$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUGE, "fbuge", "fbuge", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbug$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUG, "fbug", "fbug", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fble$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLE, "fble", "fble", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbgt$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBGT, "fbgt", "fbgt", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbule$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBULE, "fbule", "fbule", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbu$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBU, "fbu", "fbu", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbo$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBO, "fbo", "fbo", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bctrlr$pack $ccond,$hint */
{
FRV_INSN_BCTRLR, "bctrlr", "bctrlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bralr$pack$hint_taken */
{
FRV_INSN_BRALR, "bralr", "bralr", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnolr$pack$hint_not_taken */
{
FRV_INSN_BNOLR, "bnolr", "bnolr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* beqlr$pack $ICCi_2,$hint */
{
FRV_INSN_BEQLR, "beqlr", "beqlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnelr$pack $ICCi_2,$hint */
{
FRV_INSN_BNELR, "bnelr", "bnelr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* blelr$pack $ICCi_2,$hint */
{
FRV_INSN_BLELR, "blelr", "blelr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bgtlr$pack $ICCi_2,$hint */
{
FRV_INSN_BGTLR, "bgtlr", "bgtlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bltlr$pack $ICCi_2,$hint */
{
FRV_INSN_BLTLR, "bltlr", "bltlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bgelr$pack $ICCi_2,$hint */
{
FRV_INSN_BGELR, "bgelr", "bgelr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* blslr$pack $ICCi_2,$hint */
{
FRV_INSN_BLSLR, "blslr", "blslr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bhilr$pack $ICCi_2,$hint */
{
FRV_INSN_BHILR, "bhilr", "bhilr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bclr$pack $ICCi_2,$hint */
{
FRV_INSN_BCLR, "bclr", "bclr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnclr$pack $ICCi_2,$hint */
{
FRV_INSN_BNCLR, "bnclr", "bnclr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnlr$pack $ICCi_2,$hint */
{
FRV_INSN_BNLR, "bnlr", "bnlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bplr$pack $ICCi_2,$hint */
{
FRV_INSN_BPLR, "bplr", "bplr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bvlr$pack $ICCi_2,$hint */
{
FRV_INSN_BVLR, "bvlr", "bvlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnvlr$pack $ICCi_2,$hint */
{
FRV_INSN_BNVLR, "bnvlr", "bnvlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbralr$pack$hint_taken */
{
FRV_INSN_FBRALR, "fbralr", "fbralr", 32,
! { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbnolr$pack$hint_not_taken */
{
FRV_INSN_FBNOLR, "fbnolr", "fbnolr", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbeqlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBEQLR, "fbeqlr", "fbeqlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbnelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBNELR, "fbnelr", "fbnelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fblglr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLGLR, "fblglr", "fblglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbuelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUELR, "fbuelr", "fbuelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbullr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULLR, "fbullr", "fbullr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbgelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBGELR, "fbgelr", "fbgelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbltlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLTLR, "fbltlr", "fbltlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbugelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUGELR, "fbugelr", "fbugelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbuglr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUGLR, "fbuglr", "fbuglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fblelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLELR, "fblelr", "fblelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbgtlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBGTLR, "fbgtlr", "fbgtlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbulelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULELR, "fbulelr", "fbulelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbulr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULR, "fbulr", "fbulr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbolr$pack $FCCi_2,$hint */
{
FRV_INSN_FBOLR, "fbolr", "fbolr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bcralr$pack $ccond$hint_taken */
{
FRV_INSN_BCRALR, "bcralr", "bcralr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnolr$pack$hint_not_taken */
{
FRV_INSN_BCNOLR, "bcnolr", "bcnolr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bceqlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCEQLR, "bceqlr", "bceqlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNELR, "bcnelr", "bcnelr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bclelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLELR, "bclelr", "bclelr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcgtlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCGTLR, "bcgtlr", "bcgtlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcltlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLTLR, "bcltlr", "bcltlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcgelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCGELR, "bcgelr", "bcgelr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bclslr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLSLR, "bclslr", "bclslr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bchilr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCHILR, "bchilr", "bchilr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcclr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCCLR, "bcclr", "bcclr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnclr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNCLR, "bcnclr", "bcnclr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNLR, "bcnlr", "bcnlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcplr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCPLR, "bcplr", "bcplr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcvlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCVLR, "bcvlr", "bcvlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnvlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNVLR, "bcnvlr", "bcnvlr", 32,
! { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbralr$pack $ccond$hint_taken */
{
FRV_INSN_FCBRALR, "fcbralr", "fcbralr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbnolr$pack$hint_not_taken */
{
FRV_INSN_FCBNOLR, "fcbnolr", "fcbnolr", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbeqlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBEQLR, "fcbeqlr", "fcbeqlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbnelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBNELR, "fcbnelr", "fcbnelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcblglr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLGLR, "fcblglr", "fcblglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbuelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUELR, "fcbuelr", "fcbuelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbullr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULLR, "fcbullr", "fcbullr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbgelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBGELR, "fcbgelr", "fcbgelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbltlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLTLR, "fcbltlr", "fcbltlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbugelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUGELR, "fcbugelr", "fcbugelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbuglr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUGLR, "fcbuglr", "fcbuglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcblelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLELR, "fcblelr", "fcblelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbgtlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBGTLR, "fcbgtlr", "fcbgtlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbulelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULELR, "fcbulelr", "fcbulelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbulr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULR, "fcbulr", "fcbulr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbolr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBOLR, "fcbolr", "fcbolr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* jmpl$pack @($GRi,$GRj) */
{
FRV_INSN_JMPL, "jmpl", "jmpl", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* calll$pack $callann($GRi,$GRj) */
{
FRV_INSN_CALLL, "calll", "calll", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* jmpil$pack @($GRi,$s12) */
{
FRV_INSN_JMPIL, "jmpil", "jmpil", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* callil$pack @($GRi,$s12) */
{
FRV_INSN_CALLIL, "callil", "callil", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* call$pack $label24 */
{
FRV_INSN_CALL, "call", "call", 32,
! { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_4, FR450_MAJOR_B_4, FR500_MAJOR_B_4, FR550_MAJOR_B_4 } }
},
/* rett$pack $debug */
{
FRV_INSN_RETT, "rett", "rett", 32,
! { 0|A(PRIVILEGED)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* rei$pack $eir */
{
FRV_INSN_REI, "rei", "rei", 32,
! { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_1, FR550_MAJOR_NONE } }
},
/* tra$pack $GRi,$GRj */
{
FRV_INSN_TRA, "tra", "tra", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tno$pack */
{
FRV_INSN_TNO, "tno", "tno", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* teq$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TEQ, "teq", "teq", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tne$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNE, "tne", "tne", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tle$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLE, "tle", "tle", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tgt$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TGT, "tgt", "tgt", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tlt$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLT, "tlt", "tlt", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tge$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TGE, "tge", "tge", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tls$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLS, "tls", "tls", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* thi$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_THI, "thi", "thi", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tc$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TC, "tc", "tc", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tnc$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNC, "tnc", "tnc", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tn$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TN, "tn", "tn", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tp$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TP, "tp", "tp", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tv$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TV, "tv", "tv", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tnv$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNV, "tnv", "tnv", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftra$pack $GRi,$GRj */
{
FRV_INSN_FTRA, "ftra", "ftra", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftno$pack */
{
FRV_INSN_FTNO, "ftno", "ftno", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftne$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTNE, "ftne", "ftne", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* fteq$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTEQ, "fteq", "fteq", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftlg$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLG, "ftlg", "ftlg", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftue$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUE, "ftue", "ftue", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftul$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUL, "ftul", "ftul", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftge$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTGE, "ftge", "ftge", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftlt$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLT, "ftlt", "ftlt", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftuge$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUGE, "ftuge", "ftuge", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftug$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUG, "ftug", "ftug", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftle$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLE, "ftle", "ftle", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftgt$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTGT, "ftgt", "ftgt", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftule$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTULE, "ftule", "ftule", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftu$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTU, "ftu", "ftu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* fto$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTO, "fto", "fto", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tira$pack $GRi,$s12 */
{
FRV_INSN_TIRA, "tira", "tira", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tino$pack */
{
FRV_INSN_TINO, "tino", "tino", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tieq$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIEQ, "tieq", "tieq", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tine$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINE, "tine", "tine", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tile$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILE, "tile", "tile", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tigt$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIGT, "tigt", "tigt", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tilt$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILT, "tilt", "tilt", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tige$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIGE, "tige", "tige", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tils$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILS, "tils", "tils", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tihi$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIHI, "tihi", "tihi", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tic$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIC, "tic", "tic", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tinc$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINC, "tinc", "tinc", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tin$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIN, "tin", "tin", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tip$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIP, "tip", "tip", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tiv$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIV, "tiv", "tiv", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tinv$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINV, "tinv", "tinv", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftira$pack $GRi,$s12 */
{
FRV_INSN_FTIRA, "ftira", "ftira", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftino$pack */
{
FRV_INSN_FTINO, "ftino", "ftino", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftine$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTINE, "ftine", "ftine", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftieq$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIEQ, "ftieq", "ftieq", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftilg$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILG, "ftilg", "ftilg", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiue$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUE, "ftiue", "ftiue", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiul$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUL, "ftiul", "ftiul", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftige$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIGE, "ftige", "ftige", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftilt$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILT, "ftilt", "ftilt", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiuge$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUGE, "ftiuge", "ftiuge", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiug$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUG, "ftiug", "ftiug", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftile$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILE, "ftile", "ftile", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftigt$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIGT, "ftigt", "ftigt", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiule$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIULE, "ftiule", "ftiule", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiu$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIU, "ftiu", "ftiu", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftio$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIO, "ftio", "ftio", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* break$pack */
{
FRV_INSN_BREAK, "break", "break", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* mtrap$pack */
{
FRV_INSN_MTRAP, "mtrap", "mtrap", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* andcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ANDCR, "andcr", "andcr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* orcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ORCR, "orcr", "orcr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* xorcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_XORCR, "xorcr", "xorcr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* nandcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NANDCR, "nandcr", "nandcr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* norcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NORCR, "norcr", "norcr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* andncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ANDNCR, "andncr", "andncr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* orncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ORNCR, "orncr", "orncr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* nandncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NANDNCR, "nandncr", "nandncr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* norncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NORNCR, "norncr", "norncr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* notcr$pack $CRj,$CRk */
{
FRV_INSN_NOTCR, "notcr", "notcr", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* ckra$pack $CRj_int */
{
FRV_INSN_CKRA, "ckra", "ckra", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckno$pack $CRj_int */
{
FRV_INSN_CKNO, "ckno", "ckno", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckeq$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKEQ, "ckeq", "ckeq", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckne$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNE, "ckne", "ckne", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckle$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLE, "ckle", "ckle", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckgt$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKGT, "ckgt", "ckgt", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cklt$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLT, "cklt", "cklt", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckge$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKGE, "ckge", "ckge", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckls$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLS, "ckls", "ckls", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckhi$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKHI, "ckhi", "ckhi", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckc$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKC, "ckc", "ckc", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cknc$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNC, "cknc", "cknc", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckn$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKN, "ckn", "ckn", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckp$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKP, "ckp", "ckp", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckv$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKV, "ckv", "ckv", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cknv$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNV, "cknv", "cknv", 32,
! { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckra$pack $CRj_float */
{
FRV_INSN_FCKRA, "fckra", "fckra", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckno$pack $CRj_float */
{
FRV_INSN_FCKNO, "fckno", "fckno", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckne$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKNE, "fckne", "fckne", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckeq$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKEQ, "fckeq", "fckeq", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcklg$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLG, "fcklg", "fcklg", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckue$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUE, "fckue", "fckue", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckul$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUL, "fckul", "fckul", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckge$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKGE, "fckge", "fckge", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcklt$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLT, "fcklt", "fcklt", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckuge$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUGE, "fckuge", "fckuge", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckug$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUG, "fckug", "fckug", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckle$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLE, "fckle", "fckle", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckgt$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKGT, "fckgt", "fckgt", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckule$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKULE, "fckule", "fckule", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcku$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKU, "fcku", "fcku", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcko$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKO, "fcko", "fcko", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckra$pack $CRj_int,$CCi,$cond */
{
FRV_INSN_CCKRA, "cckra", "cckra", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckno$pack $CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNO, "cckno", "cckno", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKEQ, "cckeq", "cckeq", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNE, "cckne", "cckne", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLE, "cckle", "cckle", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKGT, "cckgt", "cckgt", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLT, "ccklt", "ccklt", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKGE, "cckge", "cckge", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLS, "cckls", "cckls", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKHI, "cckhi", "cckhi", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKC, "cckc", "cckc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNC, "ccknc", "ccknc", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKN, "cckn", "cckn", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKP, "cckp", "cckp", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKV, "cckv", "cckv", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNV, "ccknv", "ccknv", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckra$pack $CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKRA, "cfckra", "cfckra", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckno$pack $CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKNO, "cfckno", "cfckno", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKNE, "cfckne", "cfckne", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKEQ, "cfckeq", "cfckeq", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLG, "cfcklg", "cfcklg", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUE, "cfckue", "cfckue", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUL, "cfckul", "cfckul", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKGE, "cfckge", "cfckge", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLT, "cfcklt", "cfcklt", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUGE, "cfckuge", "cfckuge", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUG, "cfckug", "cfckug", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLE, "cfckle", "cfckle", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKGT, "cfckgt", "cfckgt", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKULE, "cfckule", "cfckule", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKU, "cfcku", "cfcku", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKO, "cfcko", "cfcko", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CJMPL, "cjmpl", "cjmpl", 32,
! { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* ccalll$pack @($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CCALLL, "ccalll", "ccalll", 32,
! { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* ici$pack @($GRi,$GRj) */
{
FRV_INSN_ICI, "ici", "ici", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dci$pack @($GRi,$GRj) */
{
FRV_INSN_DCI, "dci", "dci", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* icei$pack @($GRi,$GRj),$ae */
{
FRV_INSN_ICEI, "icei", "icei", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
},
/* dcei$pack @($GRi,$GRj),$ae */
{
FRV_INSN_DCEI, "dcei", "dcei", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
},
/* dcf$pack @($GRi,$GRj) */
{
FRV_INSN_DCF, "dcf", "dcf", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dcef$pack @($GRi,$GRj),$ae */
{
FRV_INSN_DCEF, "dcef", "dcef", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
},
/* witlb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_WITLB, "witlb", "witlb", 32,
! { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* wdtlb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_WDTLB, "wdtlb", "wdtlb", 32,
! { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* itlbi$pack @($GRi,$GRj) */
{
FRV_INSN_ITLBI, "itlbi", "itlbi", 32,
! { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* dtlbi$pack @($GRi,$GRj) */
{
FRV_INSN_DTLBI, "dtlbi", "dtlbi", 32,
! { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* icpl$pack $GRi,$GRj,$lock */
{
FRV_INSN_ICPL, "icpl", "icpl", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dcpl$pack $GRi,$GRj,$lock */
{
FRV_INSN_DCPL, "dcpl", "dcpl", 32,
! { 0, { (1<<MACH_BASE), UNIT_DCPL, FR400_MAJOR_C_2, FR450_MAJOR_I_2, FR500_MAJOR_C_2, FR550_MAJOR_I_8 } }
},
/* icul$pack $GRi */
{
FRV_INSN_ICUL, "icul", "icul", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dcul$pack $GRi */
{
FRV_INSN_DCUL, "dcul", "dcul", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* bar$pack */
{
FRV_INSN_BAR, "bar", "bar", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* membar$pack */
{
FRV_INSN_MEMBAR, "membar", "membar", 32,
! { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* lrai$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
{
FRV_INSN_LRAI, "lrai", "lrai", 32,
! { 0, { (1<<MACH_FR450), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* lrad$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
{
FRV_INSN_LRAD, "lrad", "lrad", 32,
! { 0, { (1<<MACH_FR450), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL */
{
FRV_INSN_TLBPR, "tlbpr", "tlbpr", 32,
! { 0, { (1<<MACH_FR450), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
{
FRV_INSN_COP1, "cop1", "cop1", 32,
! { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
{
FRV_INSN_COP2, "cop2", "cop2", 32,
! { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* clrgr$pack $GRk */
{
FRV_INSN_CLRGR, "clrgr", "clrgr", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* clrfr$pack $FRk */
{
FRV_INSN_CLRFR, "clrfr", "clrfr", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* clrga$pack */
{
FRV_INSN_CLRGA, "clrga", "clrga", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* clrfa$pack */
{
FRV_INSN_CLRFA, "clrfa", "clrfa", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitgr$pack $GRk */
{
FRV_INSN_COMMITGR, "commitgr", "commitgr", 32,
! { 0, { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitfr$pack $FRk */
{
FRV_INSN_COMMITFR, "commitfr", "commitfr", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitga$pack */
{
FRV_INSN_COMMITGA, "commitga", "commitga", 32,
! { 0, { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitfa$pack */
{
FRV_INSN_COMMITFA, "commitfa", "commitfa", 32,
! { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* fitos$pack $FRintj,$FRk */
{
FRV_INSN_FITOS, "fitos", "fitos", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fstoi$pack $FRj,$FRintk */
{
FRV_INSN_FSTOI, "fstoi", "fstoi", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fitod$pack $FRintj,$FRdoublek */
{
FRV_INSN_FITOD, "fitod", "fitod", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdtoi$pack $FRdoublej,$FRintk */
{
FRV_INSN_FDTOI, "fdtoi", "fdtoi", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fditos$pack $FRintj,$FRk */
{
FRV_INSN_FDITOS, "fditos", "fditos", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdstoi$pack $FRj,$FRintk */
{
FRV_INSN_FDSTOI, "fdstoi", "fdstoi", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* nfditos$pack $FRintj,$FRk */
{
FRV_INSN_NFDITOS, "nfditos", "nfditos", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* nfdstoi$pack $FRj,$FRintk */
{
FRV_INSN_NFDSTOI, "nfdstoi", "nfdstoi", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfitos$pack $FRintj,$FRk,$CCi,$cond */
{
FRV_INSN_CFITOS, "cfitos", "cfitos", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CFSTOI, "cfstoi", "cfstoi", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* nfitos$pack $FRintj,$FRk */
{
FRV_INSN_NFITOS, "nfitos", "nfitos", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* nfstoi$pack $FRj,$FRintk */
{
FRV_INSN_NFSTOI, "nfstoi", "nfstoi", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fmovs$pack $FRj,$FRk */
{
FRV_INSN_FMOVS, "fmovs", "fmovs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fmovd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FMOVD, "fmovd", "fmovd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdmovs$pack $FRj,$FRk */
{
FRV_INSN_FDMOVS, "fdmovs", "fdmovs", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfmovs$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMOVS, "cfmovs", "cfmovs", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fnegs$pack $FRj,$FRk */
{
FRV_INSN_FNEGS, "fnegs", "fnegs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fnegd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FNEGD, "fnegd", "fnegd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdnegs$pack $FRj,$FRk */
{
FRV_INSN_FDNEGS, "fdnegs", "fdnegs", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfnegs$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFNEGS, "cfnegs", "cfnegs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fabss$pack $FRj,$FRk */
{
FRV_INSN_FABSS, "fabss", "fabss", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fabsd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FABSD, "fabsd", "fabsd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdabss$pack $FRj,$FRk */
{
FRV_INSN_FDABSS, "fdabss", "fdabss", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfabss$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFABSS, "cfabss", "cfabss", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fsqrts$pack $FRj,$FRk */
{
FRV_INSN_FSQRTS, "fsqrts", "fsqrts", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* fdsqrts$pack $FRj,$FRk */
{
FRV_INSN_FDSQRTS, "fdsqrts", "fdsqrts", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* nfdsqrts$pack $FRj,$FRk */
{
FRV_INSN_NFDSQRTS, "nfdsqrts", "nfdsqrts", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* fsqrtd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FSQRTD, "fsqrtd", "fsqrtd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFSQRTS, "cfsqrts", "cfsqrts", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* nfsqrts$pack $FRj,$FRk */
{
FRV_INSN_NFSQRTS, "nfsqrts", "nfsqrts", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* fadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FADDS, "fadds", "fadds", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FSUBS, "fsubs", "fsubs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMULS, "fmuls", "fmuls", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
},
/* fdivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDIVS, "fdivs", "fdivs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FADDD, "faddd", "faddd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
},
/* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FSUBD, "fsubd", "fsubd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
},
/* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMULD, "fmuld", "fmuld", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_NONE } }
},
/* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FDIVD, "fdivd", "fdivd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFADDS, "cfadds", "cfadds", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFSUBS, "cfsubs", "cfsubs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMULS, "cfmuls", "cfmuls", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
},
/* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFDIVS, "cfdivs", "cfdivs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* nfadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFADDS, "nfadds", "nfadds", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* nfsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFSUBS, "nfsubs", "nfsubs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* nfmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMULS, "nfmuls", "nfmuls", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
},
/* nfdivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDIVS, "nfdivs", "nfdivs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* fcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_FCMPS, "fcmps", "fcmps", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
{
FRV_INSN_FCMPD, "fcmpd", "fcmpd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
},
/* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
{
FRV_INSN_CFCMPS, "cfcmps", "cfcmps", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fdcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_FDCMPS, "fdcmps", "fdcmps", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMADDS, "fmadds", "fmadds", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSUBS, "fmsubs", "fmsubs", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMADDD, "fmaddd", "fmaddd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMSUBD, "fmsubd", "fmsubd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fdmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMADDS, "fdmadds", "fdmadds", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfdmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMADDS, "nfdmadds", "nfdmadds", 32,
! { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMADDS, "cfmadds", "cfmadds", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMSUBS, "cfmsubs", "cfmsubs", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMADDS, "nfmadds", "nfmadds", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfmsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMSUBS, "nfmsubs", "nfmsubs", 32,
! { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMAS, "fmas", "fmas", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSS, "fmss", "fmss", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fdmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMAS, "fdmas", "fdmas", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fdmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMSS, "fdmss", "fdmss", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfdmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMAS, "nfdmas", "nfdmas", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfdmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMSS, "nfdmss", "nfdmss", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMAS, "cfmas", "cfmas", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMSS, "cfmss", "cfmss", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fmad$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMAD, "fmad", "fmad", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmsd$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSD, "fmsd", "fmsd", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMAS, "nfmas", "nfmas", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* nfmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMSS, "nfmss", "nfmss", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fdadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDADDS, "fdadds", "fdadds", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fdsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDSUBS, "fdsubs", "fdsubs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fdmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMULS, "fdmuls", "fdmuls", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* fddivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDDIVS, "fddivs", "fddivs", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_NONE } }
},
/* fdsads$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDSADS, "fdsads", "fdsads", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fdmulcs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMULCS, "fdmulcs", "fdmulcs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* nfdmulcs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMULCS, "nfdmulcs", "nfdmulcs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* nfdadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDADDS, "nfdadds", "nfdadds", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* nfdsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDSUBS, "nfdsubs", "nfdsubs", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* nfdmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMULS, "nfdmuls", "nfdmuls", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* nfddivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDDIVS, "nfddivs", "nfddivs", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_NONE } }
},
/* nfdsads$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDSADS, "nfdsads", "nfdsads", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_NFDCMPS, "nfdcmps", "nfdcmps", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_NONE } }
},
/* mhsetlos$pack $u12,$FRklo */
{
FRV_INSN_MHSETLOS, "mhsetlos", "mhsetlos", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhsethis$pack $u12,$FRkhi */
{
FRV_INSN_MHSETHIS, "mhsethis", "mhsethis", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhdsets$pack $u12,$FRintk */
{
FRV_INSN_MHDSETS, "mhdsets", "mhdsets", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhsetloh$pack $s5,$FRklo */
{
FRV_INSN_MHSETLOH, "mhsetloh", "mhsetloh", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhsethih$pack $s5,$FRkhi */
{
FRV_INSN_MHSETHIH, "mhsethih", "mhsethih", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhdseth$pack $s5,$FRintk */
{
FRV_INSN_MHDSETH, "mhdseth", "mhdseth", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mand$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MAND, "mand", "mand", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mor$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MOR, "mor", "mor", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mxor$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MXOR, "mxor", "mxor", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMAND, "cmand", "cmand", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOR, "cmor", "cmor", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMXOR, "cmxor", "cmxor", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mnot$pack $FRintj,$FRintk */
{
FRV_INSN_MNOT, "mnot", "mnot", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMNOT, "cmnot", "cmnot", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mrotli$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MROTLI, "mrotli", "mrotli", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mrotri$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MROTRI, "mrotri", "mrotri", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mwcut$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MWCUT, "mwcut", "mwcut", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mwcuti$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MWCUTI, "mwcuti", "mwcuti", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcut$pack $ACC40Si,$FRintj,$FRintk */
{
FRV_INSN_MCUT, "mcut", "mcut", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcuti$pack $ACC40Si,$s6,$FRintk */
{
FRV_INSN_MCUTI, "mcuti", "mcuti", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcutss$pack $ACC40Si,$FRintj,$FRintk */
{
FRV_INSN_MCUTSS, "mcutss", "mcutss", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcutssi$pack $ACC40Si,$s6,$FRintk */
{
FRV_INSN_MCUTSSI, "mcutssi", "mcutssi", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdcutssi$pack $ACC40Si,$s6,$FRintkeven */
{
FRV_INSN_MDCUTSSI, "mdcutssi", "mdcutssi", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDCUTSSI, FR400_MAJOR_M_2, FR450_MAJOR_M_6, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* maveh$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MAVEH, "maveh", "maveh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* msllhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSLLHI, "msllhi", "msllhi", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* msrlhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSRLHI, "msrlhi", "msrlhi", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* msrahi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdrotli$pack $FRintieven,$s6,$FRintkeven */
{
FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* mcplhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MCPLHI, "mcplhi", "mcplhi", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* mcpli$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MCPLI, "mcpli", "mcpli", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* msaths$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSATHS, "msaths", "msaths", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSATHS, "mqsaths", "mqsaths", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_2 } }
},
/* msathu$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSATHU, "msathu", "msathu", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mcmpsh$pack $FRinti,$FRintj,$FCCk */
{
FRV_INSN_MCMPSH, "mcmpsh", "mcmpsh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mcmpuh$pack $FRinti,$FRintj,$FCCk */
{
FRV_INSN_MCMPUH, "mcmpuh", "mcmpuh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mabshs$pack $FRintj,$FRintk */
{
FRV_INSN_MABSHS, "mabshs", "mabshs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_2 } }
},
/* maddhss$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MADDHSS, "maddhss", "maddhss", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* maddhus$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MADDHUS, "maddhus", "maddhus", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* msubhss$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSUBHSS, "msubhss", "msubhss", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* msubhus$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSUBHUS, "msubhus", "msubhus", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMADDHSS, "cmaddhss", "cmaddhss", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMADDHUS, "cmaddhus", "cmaddhus", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMSUBHSS, "cmsubhss", "cmsubhss", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMSUBHUS, "cmsubhus", "cmsubhus", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQADDHSS, "mqaddhss", "mqaddhss", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQADDHUS, "mqaddhus", "mqaddhus", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSUBHSS, "mqsubhss", "mqsubhss", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSUBHUS, "mqsubhus", "mqsubhus", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQADDHSS, "cmqaddhss", "cmqaddhss", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQADDHUS, "cmqaddhus", "cmqaddhus", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQSUBHSS, "cmqsubhss", "cmqsubhss", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQSUBHUS, "cmqsubhus", "cmqsubhus", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqlclrhs$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQLCLRHS, "mqlclrhs", "mqlclrhs", 32,
! { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* mqlmths$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQLMTHS, "mqlmths", "mqlmths", 32,
! { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* mqsllhi$pack $FRintieven,$u6,$FRintkeven */
{
FRV_INSN_MQSLLHI, "mqsllhi", "mqsllhi", 32,
! { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* mqsrahi$pack $FRintieven,$u6,$FRintkeven */
{
FRV_INSN_MQSRAHI, "mqsrahi", "mqsrahi", 32,
! { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* maddaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MADDACCS, "maddaccs", "maddaccs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* msubaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MSUBACCS, "msubaccs", "msubaccs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mdaddaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDADDACCS, "mdaddaccs", "mdaddaccs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mdsubaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDSUBACCS, "mdsubaccs", "mdsubaccs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* masaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MASACCS, "masaccs", "masaccs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mdasaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDASACCS, "mdasaccs", "mdasaccs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULHS, "mmulhs", "mmulhs", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULHU, "mmulhu", "mmulhu", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULXHS, "mmulxhs", "mmulxhs", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULXHU, "mmulxhu", "mmulxhu", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMULHS, "cmmulhs", "cmmulhs", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMULHU, "cmmulhu", "cmmulhu", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULHS, "mqmulhs", "mqmulhs", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULHU, "mqmulhu", "mqmulhu", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULXHS, "mqmulxhs", "mqmulxhs", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulxhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULXHU, "mqmulxhu", "mqmulxhu", 32,
! { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMULHS, "cmqmulhs", "cmqmulhs", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMULHU, "cmqmulhu", "cmqmulhu", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMACHS, "mmachs", "mmachs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
{
FRV_INSN_MMACHU, "mmachu", "mmachu", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMRDHS, "mmrdhs", "mmrdhs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
{
FRV_INSN_MMRDHU, "mmrdhu", "mmrdhu", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMACHS, "cmmachs", "cmmachs", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
{
FRV_INSN_CMMACHU, "cmmachu", "cmmachu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMACHS, "mqmachs", "mqmachs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk */
{
FRV_INSN_MQMACHU, "mqmachu", "mqmachu", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMACHS, "cmqmachs", "cmqmachs", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk,$CCi,$cond */
{
FRV_INSN_CMQMACHU, "cmqmachu", "cmqmachu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqxmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQXMACHS, "mqxmachs", "mqxmachs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mqxmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQXMACXHS, "mqxmacxhs", "mqxmacxhs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mqmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMACXHS, "mqmacxhs", "mqmacxhs", 32,
! { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXIS, "mcpxis", "mcpxis", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXIU, "mcpxiu", "mcpxiu", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXIS, "cmcpxis", "cmcpxis", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXIU, "cmcpxiu", "cmcpxiu", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXIS, "mqcpxis", "mqcpxis", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxiu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXIU, "mqcpxiu", "mqcpxiu", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mexpdhw$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MEXPDHW, "mexpdhw", "mexpdhw", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
{
FRV_INSN_CMEXPDHW, "cmexpdhw", "cmexpdhw", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mexpdhd$pack $FRinti,$u6,$FRintkeven */
{
FRV_INSN_MEXPDHD, "mexpdhd", "mexpdhd", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMEXPDHD, "cmexpdhd", "cmexpdhd", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mpackh$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MPACKH, "mpackh", "mpackh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MDPACKH, "mdpackh", "mdpackh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_5, FR550_MAJOR_M_3 } }
},
/* munpackh$pack $FRinti,$FRintkeven */
{
FRV_INSN_MUNPACKH, "munpackh", "munpackh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdunpackh$pack $FRintieven,$FRintk */
{
FRV_INSN_MDUNPACKH, "mdunpackh", "mdunpackh", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
},
/* mbtoh$pack $FRintj,$FRintkeven */
{
FRV_INSN_MBTOH, "mbtoh", "mbtoh", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMBTOH, "cmbtoh", "cmbtoh", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mhtob$pack $FRintjeven,$FRintk */
{
FRV_INSN_MHTOB, "mhtob", "mhtob", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond */
{
FRV_INSN_CMHTOB, "cmhtob", "cmhtob", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mbtohe$pack $FRintj,$FRintk */
{
FRV_INSN_MBTOHE, "mbtohe", "mbtohe", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
},
/* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMBTOHE, "cmbtohe", "cmbtohe", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
},
/* mnop$pack */
{
FRV_INSN_MNOP, "mnop", "mnop", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_1 } }
},
/* mclracc$pack $ACC40Sk,$A0 */
{
FRV_INSN_MCLRACC_0, "mclracc-0", "mclracc", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
},
/* mclracc$pack $ACC40Sk,$A1 */
{
FRV_INSN_MCLRACC_1, "mclracc-1", "mclracc", 32,
! { 0, { (1<<MACH_BASE), UNIT_MCLRACC_1, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_6, FR550_MAJOR_M_3 } }
},
/* mrdacc$pack $ACC40Si,$FRintk */
{
FRV_INSN_MRDACC, "mrdacc", "mrdacc", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mrdaccg$pack $ACCGi,$FRintk */
{
FRV_INSN_MRDACCG, "mrdaccg", "mrdaccg", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mwtacc$pack $FRinti,$ACC40Sk */
{
FRV_INSN_MWTACC, "mwtacc", "mwtacc", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
},
/* mwtaccg$pack $FRinti,$ACCGk */
{
FRV_INSN_MWTACCG, "mwtaccg", "mwtaccg", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
},
/* mcop1$pack $FRi,$FRj,$FRk */
{
FRV_INSN_MCOP1, "mcop1", "mcop1", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_1, FR550_MAJOR_NONE } }
},
/* mcop2$pack $FRi,$FRj,$FRk */
{
FRV_INSN_MCOP2, "mcop2", "mcop2", 32,
! { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_1, FR550_MAJOR_NONE } }
},
/* fnop$pack */
{
FRV_INSN_FNOP, "fnop", "fnop", 32,
! { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_8, FR550_MAJOR_F_1 } }
},
};
--- 2420,6140 ----
/* Special null first entry.
A `num' value of zero is thus invalid.
Also, the special `invalid' insn resides here. */
! { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_NIL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } } },
/* add$pack $GRi,$GRj,$GRk */
{
FRV_INSN_ADD, "add", "add", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sub$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SUB, "sub", "sub", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* and$pack $GRi,$GRj,$GRk */
{
FRV_INSN_AND, "and", "and", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* or$pack $GRi,$GRj,$GRk */
{
FRV_INSN_OR, "or", "or", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* xor$pack $GRi,$GRj,$GRk */
{
FRV_INSN_XOR, "xor", "xor", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* not$pack $GRj,$GRk */
{
FRV_INSN_NOT, "not", "not", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sdiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SDIV, "sdiv", "sdiv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* nsdiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_NSDIV, "nsdiv", "nsdiv", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* udiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_UDIV, "udiv", "udiv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* nudiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_NUDIV, "nudiv", "nudiv", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* smul$pack $GRi,$GRj,$GRdoublek */
{
FRV_INSN_SMUL, "smul", "smul", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* umul$pack $GRi,$GRj,$GRdoublek */
{
FRV_INSN_UMUL, "umul", "umul", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* smu$pack $GRi,$GRj */
{
FRV_INSN_SMU, "smu", "smu", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IACC, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* smass$pack $GRi,$GRj */
{
FRV_INSN_SMASS, "smass", "smass", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IACC, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* smsss$pack $GRi,$GRj */
{
FRV_INSN_SMSSS, "smsss", "smsss", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IACC, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* sll$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SLL, "sll", "sll", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* srl$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SRL, "srl", "srl", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sra$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SRA, "sra", "sra", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* slass$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SLASS, "slass", "slass", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* scutss$pack $GRj,$GRk */
{
FRV_INSN_SCUTSS, "scutss", "scutss", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* scan$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SCAN, "scan", "scan", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_SCAN, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CADD, "cadd", "cadd", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSUB, "csub", "csub", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CAND, "cand", "cand", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_COR, "cor", "cor", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CXOR, "cxor", "cxor", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cnot$pack $GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CNOT, "cnot", "cnot", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
{
FRV_INSN_CSMUL, "csmul", "csmul", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSDIV, "csdiv", "csdiv", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CUDIV, "cudiv", "cudiv", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSLL, "csll", "csll", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRL, "csrl", "csrl", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRA, "csra", "csra", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSCAN, "cscan", "cscan", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_SCAN, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDCC, "addcc", "addcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBCC, "subcc", "subcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ANDCC, "andcc", "andcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ORCC, "orcc", "orcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_XORCC, "xorcc", "xorcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SLLCC, "sllcc", "sllcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SRLCC, "srlcc", "srlcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SRACC, "sracc", "sracc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
{
FRV_INSN_SMULCC, "smulcc", "smulcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
{
FRV_INSN_UMULCC, "umulcc", "umulcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CADDCC, "caddcc", "caddcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSUBCC, "csubcc", "csubcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
{
FRV_INSN_CSMULCC, "csmulcc", "csmulcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CANDCC, "candcc", "candcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CORCC, "corcc", "corcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CXORCC, "cxorcc", "cxorcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSLLCC, "csllcc", "csllcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRLCC, "csrlcc", "csrlcc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRACC, "csracc", "csracc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDX, "addx", "addx", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBX, "subx", "subx", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXCC, "addxcc", "addxcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXCC, "subxcc", "subxcc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addss$pack $GRi,$GRj,$GRk */
{
FRV_INSN_ADDSS, "addss", "addss", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* subss$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SUBSS, "subss", "subss", 32,
! { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* addi$pack $GRi,$s12,$GRk */
{
FRV_INSN_ADDI, "addi", "addi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subi$pack $GRi,$s12,$GRk */
{
FRV_INSN_SUBI, "subi", "subi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* andi$pack $GRi,$s12,$GRk */
{
FRV_INSN_ANDI, "andi", "andi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* ori$pack $GRi,$s12,$GRk */
{
FRV_INSN_ORI, "ori", "ori", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* xori$pack $GRi,$s12,$GRk */
{
FRV_INSN_XORI, "xori", "xori", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sdivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_SDIVI, "sdivi", "sdivi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* nsdivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_NSDIVI, "nsdivi", "nsdivi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* udivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_UDIVI, "udivi", "udivi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* nudivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_NUDIVI, "nudivi", "nudivi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* smuli$pack $GRi,$s12,$GRdoublek */
{
FRV_INSN_SMULI, "smuli", "smuli", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* umuli$pack $GRi,$s12,$GRdoublek */
{
FRV_INSN_UMULI, "umuli", "umuli", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* slli$pack $GRi,$s12,$GRk */
{
FRV_INSN_SLLI, "slli", "slli", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* srli$pack $GRi,$s12,$GRk */
{
FRV_INSN_SRLI, "srli", "srli", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* srai$pack $GRi,$s12,$GRk */
{
FRV_INSN_SRAI, "srai", "srai", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* scani$pack $GRi,$s12,$GRk */
{
FRV_INSN_SCANI, "scani", "scani", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_SCAN, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDICC, "addicc", "addicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBICC, "subicc", "subicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ANDICC, "andicc", "andicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ORICC, "oricc", "oricc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_XORICC, "xoricc", "xoricc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
{
FRV_INSN_SMULICC, "smulicc", "smulicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
{
FRV_INSN_UMULICC, "umulicc", "umulicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
},
/* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SLLICC, "sllicc", "sllicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SRLICC, "srlicc", "srlicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SRAICC, "sraicc", "sraicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXI, "addxi", "addxi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXI, "subxi", "subxi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXICC, "addxicc", "addxicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXICC, "subxicc", "subxicc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cmpb$pack $GRi,$GRj,$ICCi_1 */
{
FRV_INSN_CMPB, "cmpb", "cmpb", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* cmpba$pack $GRi,$GRj,$ICCi_1 */
{
FRV_INSN_CMPBA, "cmpba", "cmpba", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* setlo$pack $ulo16,$GRklo */
{
FRV_INSN_SETLO, "setlo", "setlo", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* sethi$pack $uhi16,$GRkhi */
{
FRV_INSN_SETHI, "sethi", "sethi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* setlos$pack $slo16,$GRk */
{
FRV_INSN_SETLOS, "setlos", "setlos", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
},
/* ldsb$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSB, "ldsb", "ldsb", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldub$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUB, "ldub", "ldub", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldsh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSH, "ldsh", "ldsh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lduh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUH, "lduh", "lduh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ld$pack $ldann($GRi,$GRj),$GRk */
{
FRV_INSN_LD, "ld", "ld", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldbf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDBF, "ldbf", "ldbf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldhf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDHF, "ldhf", "ldhf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDF, "ldf", "ldf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldc$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDC, "ldc", "ldc", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldsb$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSB, "nldsb", "nldsb", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldub$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUB, "nldub", "nldub", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldsh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSH, "nldsh", "nldsh", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlduh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUH, "nlduh", "nlduh", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nld$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLD, "nld", "nld", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldbf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDBF, "nldbf", "nldbf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldhf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDHF, "nldhf", "nldhf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDF, "nldf", "nldf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldd$pack $lddann($GRi,$GRj),$GRdoublek */
{
FRV_INSN_LDD, "ldd", "ldd", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddf$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_LDDF, "lddf", "lddf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddc$pack @($GRi,$GRj),$CPRdoublek */
{
FRV_INSN_LDDC, "lddc", "lddc", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldd$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_NLDD, "nldd", "nldd", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlddf$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_NLDDF, "nlddf", "nlddf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldq$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDQ, "ldq", "ldq", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldqf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDQF, "ldqf", "ldqf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldqc$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDQC, "ldqc", "ldqc", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldq$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDQ, "nldq", "nldq", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldqf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDQF, "nldqf", "nldqf", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldsbu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSBU, "ldsbu", "ldsbu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldubu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUBU, "ldubu", "ldubu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldshu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSHU, "ldshu", "ldshu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lduhu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUHU, "lduhu", "lduhu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDU, "ldu", "ldu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldsbu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSBU, "nldsbu", "nldsbu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldubu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUBU, "nldubu", "nldubu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldshu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSHU, "nldshu", "nldshu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlduhu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUHU, "nlduhu", "nlduhu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDU, "nldu", "nldu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldbfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDBFU, "ldbfu", "ldbfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldhfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDHFU, "ldhfu", "ldhfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDFU, "ldfu", "ldfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldcu$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDCU, "ldcu", "ldcu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldbfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDBFU, "nldbfu", "nldbfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldhfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDHFU, "nldhfu", "nldhfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDFU, "nldfu", "nldfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddu$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_LDDU, "lddu", "lddu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlddu$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_NLDDU, "nlddu", "nlddu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddfu$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_LDDFU, "lddfu", "lddfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddcu$pack @($GRi,$GRj),$CPRdoublek */
{
FRV_INSN_LDDCU, "lddcu", "lddcu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlddfu$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_NLDDFU, "nlddfu", "nlddfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldqu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDQU, "ldqu", "ldqu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldqu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDQU, "nldqu", "nldqu", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldqfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDQFU, "ldqfu", "ldqfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldqcu$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDQCU, "ldqcu", "ldqcu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldqfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDQFU, "nldqfu", "nldqfu", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldsbi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDSBI, "ldsbi", "ldsbi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldshi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDSHI, "ldshi", "ldshi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDI, "ldi", "ldi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldubi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDUBI, "ldubi", "ldubi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lduhi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDUHI, "lduhi", "lduhi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldbfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDBFI, "ldbfi", "ldbfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldhfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDHFI, "ldhfi", "ldhfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDFI, "ldfi", "ldfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldsbi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDSBI, "nldsbi", "nldsbi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldubi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDUBI, "nldubi", "nldubi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldshi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDSHI, "nldshi", "nldshi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlduhi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDUHI, "nlduhi", "nlduhi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDI, "nldi", "nldi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldbfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDBFI, "nldbfi", "nldbfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldhfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDHFI, "nldhfi", "nldhfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nldfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDFI, "nldfi", "nldfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddi$pack @($GRi,$d12),$GRdoublek */
{
FRV_INSN_LDDI, "lddi", "lddi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* lddfi$pack @($GRi,$d12),$FRdoublek */
{
FRV_INSN_LDDFI, "lddfi", "lddfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlddi$pack @($GRi,$d12),$GRdoublek */
{
FRV_INSN_NLDDI, "nlddi", "nlddi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* nlddfi$pack @($GRi,$d12),$FRdoublek */
{
FRV_INSN_NLDDFI, "nlddfi", "nlddfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* ldqi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDQI, "ldqi", "ldqi", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ldqfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDQFI, "ldqfi", "ldqfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nldqfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDQFI, "nldqfi", "nldqfi", 32,
! { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STB, "stb", "stb", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sth$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STH, "sth", "sth", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* st$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_ST, "st", "st", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stbf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STBF, "stbf", "stbf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sthf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STHF, "sthf", "sthf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STF, "stf", "stf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stc$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STC, "stc", "stc", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* std$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STD, "std", "std", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdf$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDF, "stdf", "stdf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdc$pack $CPRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDC, "stdc", "stdc", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stq$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STQ, "stq", "stq", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stqf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STQF, "stqf", "stqf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stqc$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STQC, "stqc", "stqc", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stbu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STBU, "stbu", "stbu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sthu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STHU, "sthu", "sthu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STU, "stu", "stu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stbfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STBFU, "stbfu", "stbfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sthfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STHFU, "sthfu", "sthfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STFU, "stfu", "stfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stcu$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STCU, "stcu", "stcu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdu$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDU, "stdu", "stdu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdfu$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDFU, "stdfu", "stdfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDCU, "stdcu", "stdcu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stqu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STQU, "stqu", "stqu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stqfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STQFU, "stqfu", "stqfu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stqcu$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STQCU, "stqcu", "stqcu", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSB, "cldsb", "cldsb", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUB, "cldub", "cldub", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSH, "cldsh", "cldsh", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUH, "clduh", "clduh", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLD, "cld", "cld", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDBF, "cldbf", "cldbf", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDHF, "cldhf", "cldhf", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDF, "cldf", "cldf", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
{
FRV_INSN_CLDD, "cldd", "cldd", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDF, "clddf", "clddf", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDQ, "cldq", "cldq", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSBU, "cldsbu", "cldsbu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUBU, "cldubu", "cldubu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSHU, "cldshu", "cldshu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUHU, "clduhu", "clduhu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDU, "cldu", "cldu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDBFU, "cldbfu", "cldbfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDHFU, "cldhfu", "cldhfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDFU, "cldfu", "cldfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDU, "clddu", "clddu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDFU, "clddfu", "clddfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
},
/* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDQU, "cldqu", "cldqu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTB, "cstb", "cstb", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTH, "csth", "csth", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CST, "cst", "cst", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBF, "cstbf", "cstbf", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHF, "csthf", "csthf", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTF, "cstf", "cstf", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTD, "cstd", "cstd", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDF, "cstdf", "cstdf", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTQ, "cstq", "cstq", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBU, "cstbu", "cstbu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHU, "csthu", "csthu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTU, "cstu", "cstu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBFU, "cstbfu", "cstbfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHFU, "csthfu", "csthfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTFU, "cstfu", "cstfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDU, "cstdu", "cstdu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDFU, "cstdfu", "cstdfu", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stbi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STBI, "stbi", "stbi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sthi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STHI, "sthi", "sthi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sti$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STI, "sti", "sti", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stbfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STBFI, "stbfi", "stbfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* sthfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STHFI, "sthfi", "sthfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STFI, "stfi", "stfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdi$pack $GRdoublek,@($GRi,$d12) */
{
FRV_INSN_STDI, "stdi", "stdi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stdfi$pack $FRdoublek,@($GRi,$d12) */
{
FRV_INSN_STDFI, "stdfi", "stdfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
},
/* stqi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STQI, "stqi", "stqi", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* stqfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STQFI, "stqfi", "stqfi", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* swap$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_SWAP, "swap", "swap", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* swapi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_SWAPI, "swapi", "swapi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CSWAP, "cswap", "cswap", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* movgf$pack $GRj,$FRintk */
{
FRV_INSN_MOVGF, "movgf", "movgf", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* movfg$pack $FRintk,$GRj */
{
FRV_INSN_MOVFG, "movfg", "movfg", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* movgfd$pack $GRj,$FRintk */
{
FRV_INSN_MOVGFD, "movgfd", "movgfd", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* movfgd$pack $FRintk,$GRj */
{
FRV_INSN_MOVFGD, "movfgd", "movfgd", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* movgfq$pack $GRj,$FRintk */
{
FRV_INSN_MOVGFQ, "movgfq", "movgfq", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* movfgq$pack $FRintk,$GRj */
{
FRV_INSN_MOVFGQ, "movfgq", "movfgq", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOVGF, "cmovgf", "cmovgf", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
{
FRV_INSN_CMOVFG, "cmovfg", "cmovfg", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOVGFD, "cmovgfd", "cmovgfd", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
{
FRV_INSN_CMOVFGD, "cmovfgd", "cmovfgd", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
},
/* movgs$pack $GRj,$spr */
{
FRV_INSN_MOVGS, "movgs", "movgs", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* movsg$pack $spr,$GRj */
{
FRV_INSN_MOVSG, "movsg", "movsg", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* bra$pack $hint_taken$label16 */
{
FRV_INSN_BRA, "bra", "bra", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bno$pack$hint_not_taken */
{
FRV_INSN_BNO, "bno", "bno", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* beq$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BEQ, "beq", "beq", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bne$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNE, "bne", "bne", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* ble$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLE, "ble", "ble", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bgt$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BGT, "bgt", "bgt", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* blt$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLT, "blt", "blt", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bge$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BGE, "bge", "bge", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bls$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLS, "bls", "bls", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bhi$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BHI, "bhi", "bhi", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bc$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BC, "bc", "bc", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bnc$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNC, "bnc", "bnc", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bn$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BN, "bn", "bn", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bp$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BP, "bp", "bp", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bv$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BV, "bv", "bv", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bnv$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNV, "bnv", "bnv", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbra$pack $hint_taken$label16 */
{
FRV_INSN_FBRA, "fbra", "fbra", 32,
! { 0|A(FR_ACCESS)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbno$pack$hint_not_taken */
{
FRV_INSN_FBNO, "fbno", "fbno", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbne$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBNE, "fbne", "fbne", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbeq$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBEQ, "fbeq", "fbeq", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fblg$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLG, "fblg", "fblg", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbue$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUE, "fbue", "fbue", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbul$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUL, "fbul", "fbul", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbge$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBGE, "fbge", "fbge", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fblt$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLT, "fblt", "fblt", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbuge$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUGE, "fbuge", "fbuge", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbug$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUG, "fbug", "fbug", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fble$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLE, "fble", "fble", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbgt$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBGT, "fbgt", "fbgt", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbule$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBULE, "fbule", "fbule", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbu$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBU, "fbu", "fbu", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* fbo$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBO, "fbo", "fbo", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
},
/* bctrlr$pack $ccond,$hint */
{
FRV_INSN_BCTRLR, "bctrlr", "bctrlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bralr$pack$hint_taken */
{
FRV_INSN_BRALR, "bralr", "bralr", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bnolr$pack$hint_not_taken */
{
FRV_INSN_BNOLR, "bnolr", "bnolr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* beqlr$pack $ICCi_2,$hint */
{
FRV_INSN_BEQLR, "beqlr", "beqlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bnelr$pack $ICCi_2,$hint */
{
FRV_INSN_BNELR, "bnelr", "bnelr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* blelr$pack $ICCi_2,$hint */
{
FRV_INSN_BLELR, "blelr", "blelr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bgtlr$pack $ICCi_2,$hint */
{
FRV_INSN_BGTLR, "bgtlr", "bgtlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bltlr$pack $ICCi_2,$hint */
{
FRV_INSN_BLTLR, "bltlr", "bltlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bgelr$pack $ICCi_2,$hint */
{
FRV_INSN_BGELR, "bgelr", "bgelr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* blslr$pack $ICCi_2,$hint */
{
FRV_INSN_BLSLR, "blslr", "blslr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bhilr$pack $ICCi_2,$hint */
{
FRV_INSN_BHILR, "bhilr", "bhilr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bclr$pack $ICCi_2,$hint */
{
FRV_INSN_BCLR, "bclr", "bclr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bnclr$pack $ICCi_2,$hint */
{
FRV_INSN_BNCLR, "bnclr", "bnclr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bnlr$pack $ICCi_2,$hint */
{
FRV_INSN_BNLR, "bnlr", "bnlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bplr$pack $ICCi_2,$hint */
{
FRV_INSN_BPLR, "bplr", "bplr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bvlr$pack $ICCi_2,$hint */
{
FRV_INSN_BVLR, "bvlr", "bvlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bnvlr$pack $ICCi_2,$hint */
{
FRV_INSN_BNVLR, "bnvlr", "bnvlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbralr$pack$hint_taken */
{
FRV_INSN_FBRALR, "fbralr", "fbralr", 32,
! { 0|A(FR_ACCESS)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbnolr$pack$hint_not_taken */
{
FRV_INSN_FBNOLR, "fbnolr", "fbnolr", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbeqlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBEQLR, "fbeqlr", "fbeqlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbnelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBNELR, "fbnelr", "fbnelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fblglr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLGLR, "fblglr", "fblglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbuelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUELR, "fbuelr", "fbuelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbullr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULLR, "fbullr", "fbullr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbgelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBGELR, "fbgelr", "fbgelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbltlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLTLR, "fbltlr", "fbltlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbugelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUGELR, "fbugelr", "fbugelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbuglr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUGLR, "fbuglr", "fbuglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fblelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLELR, "fblelr", "fblelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbgtlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBGTLR, "fbgtlr", "fbgtlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbulelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULELR, "fbulelr", "fbulelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbulr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULR, "fbulr", "fbulr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* fbolr$pack $FCCi_2,$hint */
{
FRV_INSN_FBOLR, "fbolr", "fbolr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
},
/* bcralr$pack $ccond$hint_taken */
{
FRV_INSN_BCRALR, "bcralr", "bcralr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcnolr$pack$hint_not_taken */
{
FRV_INSN_BCNOLR, "bcnolr", "bcnolr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bceqlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCEQLR, "bceqlr", "bceqlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcnelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNELR, "bcnelr", "bcnelr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bclelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLELR, "bclelr", "bclelr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcgtlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCGTLR, "bcgtlr", "bcgtlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcltlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLTLR, "bcltlr", "bcltlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcgelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCGELR, "bcgelr", "bcgelr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bclslr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLSLR, "bclslr", "bclslr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bchilr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCHILR, "bchilr", "bchilr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcclr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCCLR, "bcclr", "bcclr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcnclr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNCLR, "bcnclr", "bcnclr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcnlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNLR, "bcnlr", "bcnlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcplr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCPLR, "bcplr", "bcplr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcvlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCVLR, "bcvlr", "bcvlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* bcnvlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNVLR, "bcnvlr", "bcnvlr", 32,
! { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbralr$pack $ccond$hint_taken */
{
FRV_INSN_FCBRALR, "fcbralr", "fcbralr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbnolr$pack$hint_not_taken */
{
FRV_INSN_FCBNOLR, "fcbnolr", "fcbnolr", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbeqlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBEQLR, "fcbeqlr", "fcbeqlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbnelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBNELR, "fcbnelr", "fcbnelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcblglr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLGLR, "fcblglr", "fcblglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbuelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUELR, "fcbuelr", "fcbuelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbullr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULLR, "fcbullr", "fcbullr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbgelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBGELR, "fcbgelr", "fcbgelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbltlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLTLR, "fcbltlr", "fcbltlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbugelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUGELR, "fcbugelr", "fcbugelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbuglr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUGLR, "fcbuglr", "fcbuglr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcblelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLELR, "fcblelr", "fcblelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbgtlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBGTLR, "fcbgtlr", "fcbgtlr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbulelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULELR, "fcbulelr", "fcbulelr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbulr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULR, "fcbulr", "fcbulr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* fcbolr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBOLR, "fcbolr", "fcbolr", 32,
! { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
},
/* jmpl$pack @($GRi,$GRj) */
{
FRV_INSN_JMPL, "jmpl", "jmpl", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
},
/* calll$pack $callann($GRi,$GRj) */
{
FRV_INSN_CALLL, "calll", "calll", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
},
/* jmpil$pack @($GRi,$s12) */
{
FRV_INSN_JMPIL, "jmpil", "jmpil", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
},
/* callil$pack @($GRi,$s12) */
{
FRV_INSN_CALLIL, "callil", "callil", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
},
/* call$pack $label24 */
{
FRV_INSN_CALL, "call", "call", 32,
! { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_4, 0 } }, { { FR450_MAJOR_B_4, 0 } }, { { FR500_MAJOR_B_4, 0 } }, { { FR550_MAJOR_B_4, 0 } } } }
},
/* rett$pack $debug */
{
FRV_INSN_RETT, "rett", "rett", 32,
! { 0|A(PRIVILEGED)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* rei$pack $eir */
{
FRV_INSN_REI, "rei", "rei", 32,
! { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* tra$pack $GRi,$GRj */
{
FRV_INSN_TRA, "tra", "tra", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tno$pack */
{
FRV_INSN_TNO, "tno", "tno", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* teq$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TEQ, "teq", "teq", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tne$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNE, "tne", "tne", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tle$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLE, "tle", "tle", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tgt$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TGT, "tgt", "tgt", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tlt$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLT, "tlt", "tlt", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tge$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TGE, "tge", "tge", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tls$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLS, "tls", "tls", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* thi$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_THI, "thi", "thi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tc$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TC, "tc", "tc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tnc$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNC, "tnc", "tnc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tn$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TN, "tn", "tn", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tp$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TP, "tp", "tp", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tv$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TV, "tv", "tv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tnv$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNV, "tnv", "tnv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftra$pack $GRi,$GRj */
{
FRV_INSN_FTRA, "ftra", "ftra", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftno$pack */
{
FRV_INSN_FTNO, "ftno", "ftno", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftne$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTNE, "ftne", "ftne", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* fteq$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTEQ, "fteq", "fteq", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftlg$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLG, "ftlg", "ftlg", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftue$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUE, "ftue", "ftue", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftul$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUL, "ftul", "ftul", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftge$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTGE, "ftge", "ftge", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftlt$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLT, "ftlt", "ftlt", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftuge$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUGE, "ftuge", "ftuge", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftug$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUG, "ftug", "ftug", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftle$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLE, "ftle", "ftle", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftgt$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTGT, "ftgt", "ftgt", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftule$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTULE, "ftule", "ftule", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftu$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTU, "ftu", "ftu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* fto$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTO, "fto", "fto", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tira$pack $GRi,$s12 */
{
FRV_INSN_TIRA, "tira", "tira", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tino$pack */
{
FRV_INSN_TINO, "tino", "tino", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tieq$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIEQ, "tieq", "tieq", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tine$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINE, "tine", "tine", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tile$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILE, "tile", "tile", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tigt$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIGT, "tigt", "tigt", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tilt$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILT, "tilt", "tilt", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tige$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIGE, "tige", "tige", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tils$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILS, "tils", "tils", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tihi$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIHI, "tihi", "tihi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tic$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIC, "tic", "tic", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tinc$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINC, "tinc", "tinc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tin$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIN, "tin", "tin", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tip$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIP, "tip", "tip", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tiv$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIV, "tiv", "tiv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* tinv$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINV, "tinv", "tinv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftira$pack $GRi,$s12 */
{
FRV_INSN_FTIRA, "ftira", "ftira", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftino$pack */
{
FRV_INSN_FTINO, "ftino", "ftino", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftine$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTINE, "ftine", "ftine", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftieq$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIEQ, "ftieq", "ftieq", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftilg$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILG, "ftilg", "ftilg", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftiue$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUE, "ftiue", "ftiue", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftiul$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUL, "ftiul", "ftiul", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftige$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIGE, "ftige", "ftige", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftilt$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILT, "ftilt", "ftilt", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftiuge$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUGE, "ftiuge", "ftiuge", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftiug$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUG, "ftiug", "ftiug", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftile$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILE, "ftile", "ftile", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftigt$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIGT, "ftigt", "ftigt", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftiule$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIULE, "ftiule", "ftiule", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftiu$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIU, "ftiu", "ftiu", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* ftio$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIO, "ftio", "ftio", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* break$pack */
{
FRV_INSN_BREAK, "break", "break", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* mtrap$pack */
{
FRV_INSN_MTRAP, "mtrap", "mtrap", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
},
/* andcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ANDCR, "andcr", "andcr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* orcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ORCR, "orcr", "orcr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* xorcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_XORCR, "xorcr", "xorcr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* nandcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NANDCR, "nandcr", "nandcr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* norcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NORCR, "norcr", "norcr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* andncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ANDNCR, "andncr", "andncr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* orncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ORNCR, "orncr", "orncr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* nandncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NANDNCR, "nandncr", "nandncr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* norncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NORNCR, "norncr", "norncr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* notcr$pack $CRj,$CRk */
{
FRV_INSN_NOTCR, "notcr", "notcr", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
},
/* ckra$pack $CRj_int */
{
FRV_INSN_CKRA, "ckra", "ckra", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckno$pack $CRj_int */
{
FRV_INSN_CKNO, "ckno", "ckno", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckeq$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKEQ, "ckeq", "ckeq", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckne$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNE, "ckne", "ckne", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckle$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLE, "ckle", "ckle", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckgt$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKGT, "ckgt", "ckgt", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cklt$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLT, "cklt", "cklt", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckge$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKGE, "ckge", "ckge", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckls$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLS, "ckls", "ckls", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckhi$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKHI, "ckhi", "ckhi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckc$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKC, "ckc", "ckc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cknc$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNC, "cknc", "cknc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckn$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKN, "ckn", "ckn", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckp$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKP, "ckp", "ckp", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ckv$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKV, "ckv", "ckv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cknv$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNV, "cknv", "cknv", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckra$pack $CRj_float */
{
FRV_INSN_FCKRA, "fckra", "fckra", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckno$pack $CRj_float */
{
FRV_INSN_FCKNO, "fckno", "fckno", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckne$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKNE, "fckne", "fckne", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckeq$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKEQ, "fckeq", "fckeq", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fcklg$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLG, "fcklg", "fcklg", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckue$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUE, "fckue", "fckue", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckul$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUL, "fckul", "fckul", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckge$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKGE, "fckge", "fckge", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fcklt$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLT, "fcklt", "fcklt", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckuge$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUGE, "fckuge", "fckuge", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckug$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUG, "fckug", "fckug", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckle$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLE, "fckle", "fckle", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckgt$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKGT, "fckgt", "fckgt", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fckule$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKULE, "fckule", "fckule", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fcku$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKU, "fcku", "fcku", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* fcko$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKO, "fcko", "fcko", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckra$pack $CRj_int,$CCi,$cond */
{
FRV_INSN_CCKRA, "cckra", "cckra", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckno$pack $CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNO, "cckno", "cckno", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKEQ, "cckeq", "cckeq", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNE, "cckne", "cckne", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLE, "cckle", "cckle", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKGT, "cckgt", "cckgt", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLT, "ccklt", "ccklt", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKGE, "cckge", "cckge", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLS, "cckls", "cckls", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKHI, "cckhi", "cckhi", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKC, "cckc", "cckc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNC, "ccknc", "ccknc", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKN, "cckn", "cckn", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKP, "cckp", "cckp", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKV, "cckv", "cckv", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNV, "ccknv", "ccknv", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckra$pack $CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKRA, "cfckra", "cfckra", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckno$pack $CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKNO, "cfckno", "cfckno", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKNE, "cfckne", "cfckne", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKEQ, "cfckeq", "cfckeq", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLG, "cfcklg", "cfcklg", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUE, "cfckue", "cfckue", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUL, "cfckul", "cfckul", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKGE, "cfckge", "cfckge", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLT, "cfcklt", "cfcklt", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUGE, "cfckuge", "cfckuge", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUG, "cfckug", "cfckug", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLE, "cfckle", "cfckle", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKGT, "cfckgt", "cfckgt", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKULE, "cfckule", "cfckule", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKU, "cfcku", "cfcku", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKO, "cfcko", "cfcko", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
},
/* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CJMPL, "cjmpl", "cjmpl", 32,
! { 0|A(CONDITIONAL)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
},
/* ccalll$pack @($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CCALLL, "ccalll", "ccalll", 32,
! { 0|A(CONDITIONAL)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
},
/* ici$pack @($GRi,$GRj) */
{
FRV_INSN_ICI, "ici", "ici", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* dci$pack @($GRi,$GRj) */
{
FRV_INSN_DCI, "dci", "dci", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* icei$pack @($GRi,$GRj),$ae */
{
FRV_INSN_ICEI, "icei", "icei", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* dcei$pack @($GRi,$GRj),$ae */
{
FRV_INSN_DCEI, "dcei", "dcei", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* dcf$pack @($GRi,$GRj) */
{
FRV_INSN_DCF, "dcf", "dcf", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* dcef$pack @($GRi,$GRj),$ae */
{
FRV_INSN_DCEF, "dcef", "dcef", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* witlb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_WITLB, "witlb", "witlb", 32,
! { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* wdtlb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_WDTLB, "wdtlb", "wdtlb", 32,
! { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* itlbi$pack @($GRi,$GRj) */
{
FRV_INSN_ITLBI, "itlbi", "itlbi", 32,
! { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* dtlbi$pack @($GRi,$GRj) */
{
FRV_INSN_DTLBI, "dtlbi", "dtlbi", 32,
! { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* icpl$pack $GRi,$GRj,$lock */
{
FRV_INSN_ICPL, "icpl", "icpl", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* dcpl$pack $GRi,$GRj,$lock */
{
FRV_INSN_DCPL, "dcpl", "dcpl", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_DCPL, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_I_8, 0 } } } }
},
/* icul$pack $GRi */
{
FRV_INSN_ICUL, "icul", "icul", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* dcul$pack $GRi */
{
FRV_INSN_DCUL, "dcul", "dcul", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* bar$pack */
{
FRV_INSN_BAR, "bar", "bar", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* membar$pack */
{
FRV_INSN_MEMBAR, "membar", "membar", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
},
/* lrai$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
{
FRV_INSN_LRAI, "lrai", "lrai", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* lrad$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
{
FRV_INSN_LRAD, "lrad", "lrad", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL */
{
FRV_INSN_TLBPR, "tlbpr", "tlbpr", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
{
FRV_INSN_COP1, "cop1", "cop1", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
{
FRV_INSN_COP2, "cop2", "cop2", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* clrgr$pack $GRk */
{
FRV_INSN_CLRGR, "clrgr", "clrgr", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* clrfr$pack $FRk */
{
FRV_INSN_CLRFR, "clrfr", "clrfr", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* clrga$pack */
{
FRV_INSN_CLRGA, "clrga", "clrga", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* clrfa$pack */
{
FRV_INSN_CLRFA, "clrfa", "clrfa", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* commitgr$pack $GRk */
{
FRV_INSN_COMMITGR, "commitgr", "commitgr", 32,
! { 0, { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* commitfr$pack $FRk */
{
FRV_INSN_COMMITFR, "commitfr", "commitfr", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* commitga$pack */
{
FRV_INSN_COMMITGA, "commitga", "commitga", 32,
! { 0, { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* commitfa$pack */
{
FRV_INSN_COMMITFA, "commitfa", "commitfa", 32,
! { 0|A(FR_ACCESS), { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
},
/* fitos$pack $FRintj,$FRk */
{
FRV_INSN_FITOS, "fitos", "fitos", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fstoi$pack $FRj,$FRintk */
{
FRV_INSN_FSTOI, "fstoi", "fstoi", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fitod$pack $FRintj,$FRdoublek */
{
FRV_INSN_FITOD, "fitod", "fitod", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdtoi$pack $FRdoublej,$FRintk */
{
FRV_INSN_FDTOI, "fdtoi", "fdtoi", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fditos$pack $FRintj,$FRk */
{
FRV_INSN_FDITOS, "fditos", "fditos", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdstoi$pack $FRj,$FRintk */
{
FRV_INSN_FDSTOI, "fdstoi", "fdstoi", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfditos$pack $FRintj,$FRk */
{
FRV_INSN_NFDITOS, "nfditos", "nfditos", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfdstoi$pack $FRj,$FRintk */
{
FRV_INSN_NFDSTOI, "nfdstoi", "nfdstoi", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfitos$pack $FRintj,$FRk,$CCi,$cond */
{
FRV_INSN_CFITOS, "cfitos", "cfitos", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CFSTOI, "cfstoi", "cfstoi", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* nfitos$pack $FRintj,$FRk */
{
FRV_INSN_NFITOS, "nfitos", "nfitos", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* nfstoi$pack $FRj,$FRintk */
{
FRV_INSN_NFSTOI, "nfstoi", "nfstoi", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fmovs$pack $FRj,$FRk */
{
FRV_INSN_FMOVS, "fmovs", "fmovs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fmovd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FMOVD, "fmovd", "fmovd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdmovs$pack $FRj,$FRk */
{
FRV_INSN_FDMOVS, "fdmovs", "fdmovs", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfmovs$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMOVS, "cfmovs", "cfmovs", 32,
! { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fnegs$pack $FRj,$FRk */
{
FRV_INSN_FNEGS, "fnegs", "fnegs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fnegd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FNEGD, "fnegd", "fnegd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdnegs$pack $FRj,$FRk */
{
FRV_INSN_FDNEGS, "fdnegs", "fdnegs", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfnegs$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFNEGS, "cfnegs", "cfnegs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fabss$pack $FRj,$FRk */
{
FRV_INSN_FABSS, "fabss", "fabss", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fabsd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FABSD, "fabsd", "fabsd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdabss$pack $FRj,$FRk */
{
FRV_INSN_FDABSS, "fdabss", "fdabss", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfabss$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFABSS, "cfabss", "cfabss", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fsqrts$pack $FRj,$FRk */
{
FRV_INSN_FSQRTS, "fsqrts", "fsqrts", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* fdsqrts$pack $FRj,$FRk */
{
FRV_INSN_FDSQRTS, "fdsqrts", "fdsqrts", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfdsqrts$pack $FRj,$FRk */
{
FRV_INSN_NFDSQRTS, "nfdsqrts", "nfdsqrts", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fsqrtd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FSQRTD, "fsqrtd", "fsqrtd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFSQRTS, "cfsqrts", "cfsqrts", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* nfsqrts$pack $FRj,$FRk */
{
FRV_INSN_NFSQRTS, "nfsqrts", "nfsqrts", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* fadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FADDS, "fadds", "fadds", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FSUBS, "fsubs", "fsubs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMULS, "fmuls", "fmuls", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* fdivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDIVS, "fdivs", "fdivs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FADDD, "faddd", "faddd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FSUBD, "fsubd", "fsubd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMULD, "fmuld", "fmuld", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FDIVD, "fdivd", "fdivd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFADDS, "cfadds", "cfadds", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFSUBS, "cfsubs", "cfsubs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMULS, "cfmuls", "cfmuls", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFDIVS, "cfdivs", "cfdivs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* nfadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFADDS, "nfadds", "nfadds", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* nfsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFSUBS, "nfsubs", "nfsubs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* nfmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMULS, "nfmuls", "nfmuls", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* nfdivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDIVS, "nfdivs", "nfdivs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
},
/* fcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_FCMPS, "fcmps", "fcmps", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
{
FRV_INSN_FCMPD, "fcmpd", "fcmpd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
{
FRV_INSN_CFCMPS, "cfcmps", "cfcmps", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
},
/* fdcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_FDCMPS, "fdcmps", "fdcmps", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMADDS, "fmadds", "fmadds", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fmsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSUBS, "fmsubs", "fmsubs", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMADDD, "fmaddd", "fmaddd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMSUBD, "fmsubd", "fmsubd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMADDS, "fdmadds", "fdmadds", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfdmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMADDS, "nfdmadds", "nfdmadds", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMADDS, "cfmadds", "cfmadds", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMSUBS, "cfmsubs", "cfmsubs", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMADDS, "nfmadds", "nfmadds", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfmsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMSUBS, "nfmsubs", "nfmsubs", 32,
! { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMAS, "fmas", "fmas", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSS, "fmss", "fmss", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fdmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMAS, "fdmas", "fdmas", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMSS, "fdmss", "fdmss", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfdmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMAS, "nfdmas", "nfdmas", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfdmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMSS, "nfdmss", "nfdmss", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMAS, "cfmas", "cfmas", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMSS, "cfmss", "cfmss", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fmad$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMAD, "fmad", "fmad", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fmsd$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSD, "fmsd", "fmsd", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMAS, "nfmas", "nfmas", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMSS, "nfmss", "nfmss", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fdadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDADDS, "fdadds", "fdadds", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fdsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDSUBS, "fdsubs", "fdsubs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fdmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMULS, "fdmuls", "fdmuls", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fddivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDDIVS, "fddivs", "fddivs", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fdsads$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDSADS, "fdsads", "fdsads", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* fdmulcs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMULCS, "fdmulcs", "fdmulcs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfdmulcs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMULCS, "nfdmulcs", "nfdmulcs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfdadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDADDS, "nfdadds", "nfdadds", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfdsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDSUBS, "nfdsubs", "nfdsubs", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfdmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMULS, "nfdmuls", "nfdmuls", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfddivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDDIVS, "nfddivs", "nfddivs", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* nfdsads$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDSADS, "nfdsads", "nfdsads", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
},
/* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_NFDCMPS, "nfdcmps", "nfdcmps", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mhsetlos$pack $u12,$FRklo */
{
FRV_INSN_MHSETLOS, "mhsetlos", "mhsetlos", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
},
/* mhsethis$pack $u12,$FRkhi */
{
FRV_INSN_MHSETHIS, "mhsethis", "mhsethis", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
},
/* mhdsets$pack $u12,$FRintk */
{
FRV_INSN_MHDSETS, "mhdsets", "mhdsets", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
},
/* mhsetloh$pack $s5,$FRklo */
{
FRV_INSN_MHSETLOH, "mhsetloh", "mhsetloh", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
},
/* mhsethih$pack $s5,$FRkhi */
{
FRV_INSN_MHSETHIH, "mhsethih", "mhsethih", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
},
/* mhdseth$pack $s5,$FRintk */
{
FRV_INSN_MHDSETH, "mhdseth", "mhdseth", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
},
/* mand$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MAND, "mand", "mand", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mor$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MOR, "mor", "mor", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mxor$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MXOR, "mxor", "mxor", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMAND, "cmand", "cmand", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOR, "cmor", "cmor", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMXOR, "cmxor", "cmxor", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mnot$pack $FRintj,$FRintk */
{
FRV_INSN_MNOT, "mnot", "mnot", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMNOT, "cmnot", "cmnot", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mrotli$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MROTLI, "mrotli", "mrotli", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mrotri$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MROTRI, "mrotri", "mrotri", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mwcut$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MWCUT, "mwcut", "mwcut", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mwcuti$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MWCUTI, "mwcuti", "mwcuti", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcut$pack $ACC40Si,$FRintj,$FRintk */
{
FRV_INSN_MCUT, "mcut", "mcut", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcuti$pack $ACC40Si,$s6,$FRintk */
{
FRV_INSN_MCUTI, "mcuti", "mcuti", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcutss$pack $ACC40Si,$FRintj,$FRintk */
{
FRV_INSN_MCUTSS, "mcutss", "mcutss", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcutssi$pack $ACC40Si,$s6,$FRintk */
{
FRV_INSN_MCUTSSI, "mcutssi", "mcutssi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mdcutssi$pack $ACC40Si,$s6,$FRintkeven */
{
FRV_INSN_MDCUTSSI, "mdcutssi", "mdcutssi", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDCUTSSI, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_6, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* maveh$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MAVEH, "maveh", "maveh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* msllhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSLLHI, "msllhi", "msllhi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* msrlhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSRLHI, "msrlhi", "msrlhi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* msrahi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mdrotli$pack $FRintieven,$s6,$FRintkeven */
{
FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMLOW, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcplhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MCPLHI, "mcplhi", "mcplhi", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMLOW, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcpli$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MCPLI, "mcpli", "mcpli", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMLOW, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* msaths$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSATHS, "msaths", "msaths", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSATHS, "mqsaths", "mqsaths", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* msathu$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSATHU, "msathu", "msathu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mcmpsh$pack $FRinti,$FRintj,$FCCk */
{
FRV_INSN_MCMPSH, "mcmpsh", "mcmpsh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mcmpuh$pack $FRinti,$FRintj,$FCCk */
{
FRV_INSN_MCMPUH, "mcmpuh", "mcmpuh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mabshs$pack $FRintj,$FRintk */
{
FRV_INSN_MABSHS, "mabshs", "mabshs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* maddhss$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MADDHSS, "maddhss", "maddhss", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* maddhus$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MADDHUS, "maddhus", "maddhus", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* msubhss$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSUBHSS, "msubhss", "msubhss", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* msubhus$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSUBHUS, "msubhus", "msubhus", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMADDHSS, "cmaddhss", "cmaddhss", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMADDHUS, "cmaddhus", "cmaddhus", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMSUBHSS, "cmsubhss", "cmsubhss", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMSUBHUS, "cmsubhus", "cmsubhus", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQADDHSS, "mqaddhss", "mqaddhss", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQADDHUS, "mqaddhus", "mqaddhus", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSUBHSS, "mqsubhss", "mqsubhss", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSUBHUS, "mqsubhus", "mqsubhus", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQADDHSS, "cmqaddhss", "cmqaddhss", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQADDHUS, "cmqaddhus", "cmqaddhus", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQSUBHSS, "cmqsubhss", "cmqsubhss", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* cmqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQSUBHUS, "cmqsubhus", "cmqsubhus", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
},
/* mqlclrhs$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQLCLRHS, "mqlclrhs", "mqlclrhs", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mqlmths$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQLMTHS, "mqlmths", "mqlmths", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mqsllhi$pack $FRintieven,$u6,$FRintkeven */
{
FRV_INSN_MQSLLHI, "mqsllhi", "mqsllhi", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mqsrahi$pack $FRintieven,$u6,$FRintkeven */
{
FRV_INSN_MQSRAHI, "mqsrahi", "mqsrahi", 32,
! { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* maddaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MADDACCS, "maddaccs", "maddaccs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* msubaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MSUBACCS, "msubaccs", "msubaccs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mdaddaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDADDACCS, "mdaddaccs", "mdaddaccs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDUALACC, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mdsubaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDSUBACCS, "mdsubaccs", "mdsubaccs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDUALACC, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* masaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MASACCS, "masaccs", "masaccs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mdasaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDASACCS, "mdasaccs", "mdasaccs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDUALACC, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULHS, "mmulhs", "mmulhs", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULHU, "mmulhu", "mmulhu", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULXHS, "mmulxhs", "mmulxhs", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULXHU, "mmulxhu", "mmulxhu", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMULHS, "cmmulhs", "cmmulhs", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMULHU, "cmmulhu", "cmmulhu", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULHS, "mqmulhs", "mqmulhs", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULHU, "mqmulhu", "mqmulhu", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmulxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULXHS, "mqmulxhs", "mqmulxhs", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmulxhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULXHU, "mqmulxhu", "mqmulxhu", 32,
! { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMULHS, "cmqmulhs", "cmqmulhs", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMULHU, "cmqmulhu", "cmqmulhu", 32,
! { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMACHS, "mmachs", "mmachs", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
{
FRV_INSN_MMACHU, "mmachu", "mmachu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMRDHS, "mmrdhs", "mmrdhs", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
{
FRV_INSN_MMRDHU, "mmrdhu", "mmrdhu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMACHS, "cmmachs", "cmmachs", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
{
FRV_INSN_CMMACHU, "cmmachu", "cmmachu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMACHS, "mqmachs", "mqmachs", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk */
{
FRV_INSN_MQMACHU, "mqmachu", "mqmachu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMACHS, "cmqmachs", "cmqmachs", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk,$CCi,$cond */
{
FRV_INSN_CMQMACHU, "cmqmachu", "cmqmachu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqxmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQXMACHS, "mqxmachs", "mqxmachs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqxmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQXMACXHS, "mqxmacxhs", "mqxmacxhs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMACXHS, "mqmacxhs", "mqmacxhs", 32,
! { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXIS, "mcpxis", "mcpxis", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXIU, "mcpxiu", "mcpxiu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXIS, "cmcpxis", "cmcpxis", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXIU, "cmcpxiu", "cmcpxiu", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXIS, "mqcpxis", "mqcpxis", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mqcpxiu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXIU, "mqcpxiu", "mqcpxiu", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
},
/* mexpdhw$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MEXPDHW, "mexpdhw", "mexpdhw", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
{
FRV_INSN_CMEXPDHW, "cmexpdhw", "cmexpdhw", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mexpdhd$pack $FRinti,$u6,$FRintkeven */
{
FRV_INSN_MEXPDHD, "mexpdhd", "mexpdhd", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMEXPDHD, "cmexpdhd", "cmexpdhd", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mpackh$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MPACKH, "mpackh", "mpackh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MDPACKH, "mdpackh", "mdpackh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_5, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* munpackh$pack $FRinti,$FRintkeven */
{
FRV_INSN_MUNPACKH, "munpackh", "munpackh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mdunpackh$pack $FRintieven,$FRintk */
{
FRV_INSN_MDUNPACKH, "mdunpackh", "mdunpackh", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mbtoh$pack $FRintj,$FRintkeven */
{
FRV_INSN_MBTOH, "mbtoh", "mbtoh", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMBTOH, "cmbtoh", "cmbtoh", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mhtob$pack $FRintjeven,$FRintk */
{
FRV_INSN_MHTOB, "mhtob", "mhtob", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond */
{
FRV_INSN_CMHTOB, "cmhtob", "cmhtob", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mbtohe$pack $FRintj,$FRintk */
{
FRV_INSN_MBTOHE, "mbtohe", "mbtohe", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMBTOHE, "cmbtohe", "cmbtohe", 32,
! { 0|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mnop$pack */
{
FRV_INSN_MNOP, "mnop", "mnop", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_1, 0 } } } }
},
/* mclracc$pack $ACC40Sk,$A0 */
{
FRV_INSN_MCLRACC_0, "mclracc-0", "mclracc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_3, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mclracc$pack $ACC40Sk,$A1 */
{
FRV_INSN_MCLRACC_1, "mclracc-1", "mclracc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MCLRACC_1, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_6, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mrdacc$pack $ACC40Si,$FRintk */
{
FRV_INSN_MRDACC, "mrdacc", "mrdacc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mrdaccg$pack $ACCGi,$FRintk */
{
FRV_INSN_MRDACCG, "mrdaccg", "mrdaccg", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mwtacc$pack $FRinti,$ACC40Sk */
{
FRV_INSN_MWTACC, "mwtacc", "mwtacc", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_3, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mwtaccg$pack $FRinti,$ACCGk */
{
FRV_INSN_MWTACCG, "mwtaccg", "mwtaccg", 32,
! { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_3, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
},
/* mcop1$pack $FRi,$FRj,$FRk */
{
FRV_INSN_MCOP1, "mcop1", "mcop1", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mcop2$pack $FRi,$FRj,$FRk */
{
FRV_INSN_MCOP2, "mcop2", "mcop2", 32,
! { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* fnop$pack */
{
FRV_INSN_FNOP, "fnop", "fnop", 32,
! { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_8, 0 } }, { { FR550_MAJOR_F_1, 0 } } } }
},
};
*************** static void
*** 6257,6263 ****
frv_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
{
int i;
! unsigned int isas = cd->isas;
unsigned int machs = cd->machs;
cd->int_insn_p = CGEN_INT_INSN_P;
--- 6257,6263 ----
frv_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
{
int i;
! CGEN_BITSET *isas = cd->isas;
unsigned int machs = cd->machs;
cd->int_insn_p = CGEN_INT_INSN_P;
*************** frv_cgen_rebuild_tables (CGEN_CPU_TABLE
*** 6269,6275 ****
cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cd->max_insn_bitsize = 0;
for (i = 0; i < MAX_ISAS; ++i)
! if (((1 << i) & isas) != 0)
{
const CGEN_ISA *isa = & frv_cgen_isa_table[i];
--- 6269,6275 ----
cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cd->max_insn_bitsize = 0;
for (i = 0; i < MAX_ISAS; ++i)
! if (cgen_bitset_contains (isas, i))
{
const CGEN_ISA *isa = & frv_cgen_isa_table[i];
*************** frv_cgen_cpu_open (enum cgen_cpu_open_ar
*** 6354,6360 ****
{
CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
static int init_p;
! unsigned int isas = 0; /* 0 = "unspecified" */
unsigned int machs = 0; /* 0 = "unspecified" */
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
va_list ap;
--- 6354,6360 ----
{
CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
static int init_p;
! CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
unsigned int machs = 0; /* 0 = "unspecified" */
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
va_list ap;
*************** frv_cgen_cpu_open (enum cgen_cpu_open_ar
*** 6373,6379 ****
switch (arg_type)
{
case CGEN_CPU_OPEN_ISAS :
! isas = va_arg (ap, unsigned int);
break;
case CGEN_CPU_OPEN_MACHS :
machs = va_arg (ap, unsigned int);
--- 6373,6379 ----
switch (arg_type)
{
case CGEN_CPU_OPEN_ISAS :
! isas = va_arg (ap, CGEN_BITSET *);
break;
case CGEN_CPU_OPEN_MACHS :
machs = va_arg (ap, unsigned int);
*************** frv_cgen_cpu_open (enum cgen_cpu_open_ar
*** 6404,6412 ****
machs = (1 << MAX_MACHS) - 1;
/* Base mach is always selected. */
machs |= 1;
- /* ISA unspecified means "all". */
- if (isas == 0)
- isas = (1 << MAX_ISAS) - 1;
if (endian == CGEN_ENDIAN_UNKNOWN)
{
/* ??? If target has only one, could have a default. */
--- 6404,6409 ----
*************** frv_cgen_cpu_open (enum cgen_cpu_open_ar
*** 6414,6420 ****
abort ();
}
! cd->isas = isas;
cd->machs = machs;
cd->endian = endian;
/* FIXME: for the sparc case we can determine insn-endianness statically.
--- 6411,6417 ----
abort ();
}
! cd->isas = cgen_bitset_copy (isas);
cd->machs = machs;
cd->endian = endian;
/* FIXME: for the sparc case we can determine insn-endianness statically.
Index: opcodes/frv-desc.h
===================================================================
RCS file: /cvs/src/src/opcodes/frv-desc.h,v
retrieving revision 1.13
diff -c -p -r1.13 frv-desc.h
*** opcodes/frv-desc.h 7 May 2005 07:34:27 -0000 1.13
--- opcodes/frv-desc.h 19 Sep 2005 19:48:55 -0000
*************** with this program; if not, write to the
*** 25,30 ****
--- 25,32 ----
#ifndef FRV_CPU_H
#define FRV_CPU_H
+ #include "opcode/cgen-bitset.h"
+
#define CGEN_ARCH frv
/* Given symbol S, return frv_cgen_<S>. */
*************** typedef enum cgen_ifld_attr {
*** 617,622 ****
--- 619,633 ----
/* Number of non-boolean elements in cgen_ifld_attr. */
#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
+ /* cgen_ifld attribute accessor macros. */
+ #define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0)
+ #define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
+ #define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
+ #define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0)
+ #define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
+ #define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0)
+
/* Enum declaration for frv ifield types. */
typedef enum ifield_type {
FRV_F_NIL, FRV_F_ANYOF, FRV_F_PACK, FRV_F_OP
*************** typedef enum cgen_hw_attr {
*** 661,666 ****
--- 672,684 ----
/* Number of non-boolean elements in cgen_hw_attr. */
#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
+ /* cgen_hw attribute accessor macros. */
+ #define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0)
+ #define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0)
+ #define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0)
+ #define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0)
+
/* Enum declaration for frv hardware types. */
typedef enum cgen_hw_type {
HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
*************** typedef enum cgen_operand_attr {
*** 693,698 ****
--- 711,728 ----
/* Number of non-boolean elements in cgen_operand_attr. */
#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
+ /* cgen_operand attribute accessor macros. */
+ #define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
+ #define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0)
+
/* Enum declaration for frv operand types. */
typedef enum cgen_operand_type {
FRV_OPERAND_PC, FRV_OPERAND_PACK, FRV_OPERAND_GRI, FRV_OPERAND_GRJ
*************** typedef enum cgen_insn_attr {
*** 742,747 ****
--- 772,801 ----
/* Number of non-boolean elements in cgen_insn_attr. */
#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
+ /* cgen_insn attribute accessor macros. */
+ #define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_INSN_UNIT_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_UNIT-CGEN_INSN_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_INSN_FR400_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR400_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_INSN_FR450_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR450_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_INSN_FR500_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR500_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_INSN_FR550_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR550_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset)
+ #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_PRIVILEGED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PRIVILEGED)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_NON_EXCEPTING_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NON_EXCEPTING)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_CONDITIONAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_CONDITIONAL)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_FR_ACCESS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_FR_ACCESS)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_PRESERVE_OVF_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PRESERVE_OVF)) != 0)
+ #define CGEN_ATTR_CGEN_INSN_AUDIO_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_AUDIO)) != 0)
+
/* cgen.h uses things we just defined. */
#include "opcode/cgen.h"
Index: opcodes/frv-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/frv-dis.c,v
retrieving revision 1.12
diff -c -p -r1.12 frv-dis.c
*** opcodes/frv-dis.c 1 Jul 2005 11:16:32 -0000 1.12
--- opcodes/frv-dis.c 19 Sep 2005 19:48:55 -0000
*************** default_print_insn (CGEN_CPU_DESC cd, bf
*** 704,710 ****
typedef struct cpu_desc_list
{
struct cpu_desc_list *next;
! int isa;
int mach;
int endian;
CGEN_CPU_DESC cd;
--- 704,710 ----
typedef struct cpu_desc_list
{
struct cpu_desc_list *next;
! CGEN_BITSET *isa;
int mach;
int endian;
CGEN_CPU_DESC cd;
*************** print_insn_frv (bfd_vma pc, disassemble_
*** 716,726 ****
static cpu_desc_list *cd_list = 0;
cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
! static int prev_isa;
static int prev_mach;
static int prev_endian;
int length;
! int isa,mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
--- 716,727 ----
static cpu_desc_list *cd_list = 0;
cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
! static CGEN_BITSET *prev_isa;
static int prev_mach;
static int prev_endian;
int length;
! CGEN_BITSET *isa;
! int mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
*************** print_insn_frv (bfd_vma pc, disassemble_
*** 743,767 ****
#endif
#ifdef CGEN_COMPUTE_ISA
! isa = CGEN_COMPUTE_ISA (info);
#else
isa = info->insn_sets;
#endif
/* If we've switched cpu's, try to find a handle we've used before */
if (cd
! && (isa != prev_isa
|| mach != prev_mach
|| endian != prev_endian))
{
cd = 0;
for (cl = cd_list; cl; cl = cl->next)
{
! if (cl->isa == isa &&
cl->mach == mach &&
cl->endian == endian)
{
cd = cl->cd;
break;
}
}
--- 744,777 ----
#endif
#ifdef CGEN_COMPUTE_ISA
! {
! static CGEN_BITSET *permanent_isa;
!
! if (!permanent_isa)
! permanent_isa = cgen_bitset_create (MAX_ISAS);
! isa = permanent_isa;
! cgen_bitset_clear (isa);
! cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
! }
#else
isa = info->insn_sets;
#endif
/* If we've switched cpu's, try to find a handle we've used before */
if (cd
! && (cgen_bitset_compare (isa, prev_isa) != 0
|| mach != prev_mach
|| endian != prev_endian))
{
cd = 0;
for (cl = cd_list; cl; cl = cl->next)
{
! if (cgen_bitset_compare (cl->isa, isa) == 0 &&
cl->mach == mach &&
cl->endian == endian)
{
cd = cl->cd;
+ prev_isa = cd->isas;
break;
}
}
*************** print_insn_frv (bfd_vma pc, disassemble_
*** 777,783 ****
abort ();
mach_name = arch_type->printable_name;
! prev_isa = isa;
prev_mach = mach;
prev_endian = endian;
cd = frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
--- 787,793 ----
abort ();
mach_name = arch_type->printable_name;
! prev_isa = cgen_bitset_copy (isa);
prev_mach = mach;
prev_endian = endian;
cd = frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
*************** print_insn_frv (bfd_vma pc, disassemble_
*** 790,796 ****
/* Save this away for future reference. */
cl = xmalloc (sizeof (struct cpu_desc_list));
cl->cd = cd;
! cl->isa = isa;
cl->mach = mach;
cl->endian = endian;
cl->next = cd_list;
--- 800,806 ----
/* Save this away for future reference. */
cl = xmalloc (sizeof (struct cpu_desc_list));
cl->cd = cd;
! cl->isa = prev_isa;
cl->mach = mach;
cl->endian = endian;
cl->next = cd_list;
Index: opcodes/frv-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/frv-opc.c,v
retrieving revision 1.18
diff -c -p -r1.18 frv-opc.c
*** opcodes/frv-opc.c 1 Jul 2005 11:16:32 -0000 1.18
--- opcodes/frv-opc.c 19 Sep 2005 19:48:55 -0000
*************** with this program; if not, write to the
*** 38,44 ****
development tree. */
bfd_boolean
! frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
switch (mach)
{
--- 38,44 ----
development tree. */
bfd_boolean
! frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
{
switch (mach)
{
*************** frv_is_branch_major (CGEN_ATTR_VALUE_TYP
*** 62,68 ****
/* Returns TRUE if {MAJOR,MACH} supports floating point insns. */
bfd_boolean
! frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
switch (mach)
{
--- 62,68 ----
/* Returns TRUE if {MAJOR,MACH} supports floating point insns. */
bfd_boolean
! frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
{
switch (mach)
{
*************** frv_is_float_major (CGEN_ATTR_VALUE_TYPE
*** 81,87 ****
/* Returns TRUE if {MAJOR,MACH} supports media insns. */
bfd_boolean
! frv_is_media_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
switch (mach)
{
--- 81,87 ----
/* Returns TRUE if {MAJOR,MACH} supports media insns. */
bfd_boolean
! frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
{
switch (mach)
{
*************** static VLIW_COMBO fr550_allowed_vliw[] =
*** 225,231 ****
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 225,231 ----
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** static CGEN_ATTR_VALUE_TYPE fr400_unit_m
*** 260,266 ****
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 260,266 ----
/* Some insns are assigned specialized implementation units which map to
different actual implementation units on different machines. These
tables perform that mapping. */
! static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** static CGEN_ATTR_VALUE_TYPE fr450_unit_m
*** 292,298 ****
/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */
};
! static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 292,298 ----
/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */
};
! static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** static CGEN_ATTR_VALUE_TYPE fr500_unit_m
*** 324,330 ****
/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
};
! static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
--- 324,330 ----
/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
};
! static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] =
{
/* unit in insn actual unit */
/* NIL */ UNIT_NIL,
*************** frv_vliw_reset (FRV_VLIW *vliw, unsigned
*** 390,396 ****
*_allowed_vliw tables above. */
static bfd_boolean
match_unit (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE unit1, CGEN_ATTR_VALUE_TYPE unit2)
{
/* Map any specialized implementation units to actual ones. */
unit1 = vliw->unit_mapping[unit1];
--- 390,396 ----
*_allowed_vliw tables above. */
static bfd_boolean
match_unit (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE unit1, CGEN_ATTR_VALUE_ENUM_TYPE unit2)
{
/* Map any specialized implementation units to actual ones. */
unit1 = vliw->unit_mapping[unit1];
*************** match_vliw (VLIW_COMBO *vliw1, VLIW_COMB
*** 442,448 ****
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
! add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
{
int next = vliw->next_slot;
VLIW_COMBO *current = vliw->current_vliw;
--- 442,448 ----
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
! add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit)
{
int next = vliw->next_slot;
VLIW_COMBO *current = vliw->current_vliw;
*************** add_next_to_vliw (FRV_VLIW *vliw, CGEN_A
*** 473,479 ****
Returns TRUE if found, FALSE otherwise. */
static bfd_boolean
! find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
int i;
--- 473,479 ----
Returns TRUE if found, FALSE otherwise. */
static bfd_boolean
! find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
int i;
*************** find_major_in_vliw (FRV_VLIW *vliw, CGEN
*** 488,494 ****
types. */
static bfd_boolean
! fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
/* In the cpu file, all media insns are represented as being allowed in
both media units. This makes it easier since this is the case for fr500.
--- 488,494 ----
types. */
static bfd_boolean
! fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
/* In the cpu file, all media insns are represented as being allowed in
both media units. This makes it easier since this is the case for fr500.
*************** fr400_check_insn_major_constraints (FRV_
*** 508,516 ****
}
static bfd_boolean
! fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
! CGEN_ATTR_VALUE_TYPE other_major;
/* Our caller guarantees there's at least one other instruction. */
other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR);
--- 508,516 ----
}
static bfd_boolean
! fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
! CGEN_ATTR_VALUE_ENUM_TYPE other_major;
/* Our caller guarantees there's at least one other instruction. */
other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR);
*************** fr450_check_insn_major_constraints (FRV_
*** 543,549 ****
}
static bfd_boolean
! find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
{
int i;
--- 543,549 ----
}
static bfd_boolean
! find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit)
{
int i;
*************** find_unit_in_vliw (FRV_VLIW *vliw, CGEN_
*** 556,563 ****
static bfd_boolean
find_major_in_slot (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE major,
! CGEN_ATTR_VALUE_TYPE slot)
{
int i;
--- 556,563 ----
static bfd_boolean
find_major_in_slot (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE major,
! CGEN_ATTR_VALUE_ENUM_TYPE slot)
{
int i;
*************** fr550_find_float_in_vliw (FRV_VLIW *vliw
*** 612,622 ****
static bfd_boolean
fr550_check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE major,
const CGEN_INSN *insn)
{
! CGEN_ATTR_VALUE_TYPE unit;
! CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
switch (slot)
{
case UNIT_I2:
--- 612,622 ----
static bfd_boolean
fr550_check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE major,
const CGEN_INSN *insn)
{
! CGEN_ATTR_VALUE_ENUM_TYPE unit;
! CGEN_ATTR_VALUE_ENUM_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
switch (slot)
{
case UNIT_I2:
*************** fr550_check_insn_major_constraints (FRV_
*** 662,668 ****
}
static bfd_boolean
! fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
/* TODO: A table might be faster for some of the more complex instances
here. */
--- 662,668 ----
}
static bfd_boolean
! fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
{
/* TODO: A table might be faster for some of the more complex instances
here. */
*************** fr500_check_insn_major_constraints (FRV_
*** 770,776 ****
static bfd_boolean
check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_TYPE major,
const CGEN_INSN *insn)
{
switch (vliw->mach)
--- 770,776 ----
static bfd_boolean
check_insn_major_constraints (FRV_VLIW *vliw,
! CGEN_ATTR_VALUE_ENUM_TYPE major,
const CGEN_INSN *insn)
{
switch (vliw->mach)
*************** int
*** 796,803 ****
frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
{
int index;
! CGEN_ATTR_VALUE_TYPE major;
! CGEN_ATTR_VALUE_TYPE unit;
VLIW_COMBO *new_vliw;
if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn))
--- 796,803 ----
frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
{
int index;
! CGEN_ATTR_VALUE_ENUM_TYPE major;
! CGEN_ATTR_VALUE_ENUM_TYPE unit;
VLIW_COMBO *new_vliw;
if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn))
*************** static const CGEN_IBASE frv_cgen_macro_i
*** 6046,6082 ****
/* nop$pack */
{
-1, "nop", "nop", 32,
! { 0|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* ret$pack */
{
-1, "ret", "ret", 32,
! { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_NONE } }
},
/* cmp$pack $GRi,$GRj,$ICCi_1 */
{
-1, "cmp", "cmp", 32,
! { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* cmpi$pack $GRi,$s10,$ICCi_1 */
{
-1, "cmpi", "cmpi", 32,
! { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* ccmp$pack $GRi,$GRj,$CCi,$cond */
{
-1, "ccmp", "ccmp", 32,
! { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* mov$pack $GRi,$GRk */
{
-1, "mov", "mov", 32,
! { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* cmov$pack $GRi,$GRk,$CCi,$cond */
{
-1, "cmov", "cmov", 32,
! { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
};
--- 6046,6082 ----
/* nop$pack */
{
-1, "nop", "nop", 32,
! { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ret$pack */
{
-1, "ret", "ret", 32,
! { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cmp$pack $GRi,$GRj,$ICCi_1 */
{
-1, "cmp", "cmp", 32,
! { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cmpi$pack $GRi,$s10,$ICCi_1 */
{
-1, "cmpi", "cmpi", 32,
! { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* ccmp$pack $GRi,$GRj,$CCi,$cond */
{
-1, "ccmp", "ccmp", 32,
! { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* mov$pack $GRi,$GRk */
{
-1, "mov", "mov", 32,
! { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
/* cmov$pack $GRi,$GRk,$CCi,$cond */
{
-1, "cmov", "cmov", 32,
! { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
},
};
Index: opcodes/frv-opc.h
===================================================================
RCS file: /cvs/src/src/opcodes/frv-opc.h,v
retrieving revision 1.13
diff -c -p -r1.13 frv-opc.h
*** opcodes/frv-opc.h 1 Jul 2005 11:16:32 -0000 1.13
--- opcodes/frv-opc.h 19 Sep 2005 19:48:55 -0000
*************** with this program; if not, write to the
*** 39,45 ****
#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
! typedef CGEN_ATTR_VALUE_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
typedef struct
{
--- 39,45 ----
#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
! typedef CGEN_ATTR_VALUE_ENUM_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
typedef struct
{
*************** typedef struct
*** 47,61 ****
int constraint_violation;
unsigned long mach;
unsigned long elf_flags;
! CGEN_ATTR_VALUE_TYPE * unit_mapping;
VLIW_COMBO * current_vliw;
! CGEN_ATTR_VALUE_TYPE major[FRV_VLIW_SIZE];
const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW;
! int frv_is_branch_major (CGEN_ATTR_VALUE_TYPE, unsigned long);
! int frv_is_float_major (CGEN_ATTR_VALUE_TYPE, unsigned long);
! int frv_is_media_major (CGEN_ATTR_VALUE_TYPE, unsigned long);
int frv_is_branch_insn (const CGEN_INSN *);
int frv_is_float_insn (const CGEN_INSN *);
int frv_is_media_insn (const CGEN_INSN *);
--- 47,61 ----
int constraint_violation;
unsigned long mach;
unsigned long elf_flags;
! CGEN_ATTR_VALUE_ENUM_TYPE * unit_mapping;
VLIW_COMBO * current_vliw;
! CGEN_ATTR_VALUE_ENUM_TYPE major[FRV_VLIW_SIZE];
const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW;
! int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
! int frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
! int frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_branch_insn (const CGEN_INSN *);
int frv_is_float_insn (const CGEN_INSN *);
int frv_is_media_insn (const CGEN_INSN *);
Index: sid/component/cgen-cpu/cgen-cpu.h
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/cgen-cpu.h,v
retrieving revision 1.15
diff -c -p -r1.15 cgen-cpu.h
*** sid/component/cgen-cpu/cgen-cpu.h 19 Aug 2005 19:42:25 -0000 1.15
--- sid/component/cgen-cpu/cgen-cpu.h 19 Sep 2005 19:49:01 -0000
***************
*** 25,30 ****
--- 25,31 ----
#include "bfd.h"
#include "dis-asm.h"
+ #include "opcode/cgen-bitset.h"
// ansidecl.h interferes with this perfectly ordinary word
#undef AND
*************** public:
*** 68,74 ****
// Disassembly tracing support
void disassemble (PCADDR pc, disassembler_ftype printfn,
enum bfd_flavour flavour, enum bfd_architecture arch,
! enum bfd_endian endian, const char *name, unsigned long isa_mask = 0, int machine = 0);
struct disassemble_info info;
protected:
static int cgen_read_memory (bfd_vma memaddr, bfd_byte *myaddr,
--- 69,75 ----
// Disassembly tracing support
void disassemble (PCADDR pc, disassembler_ftype printfn,
enum bfd_flavour flavour, enum bfd_architecture arch,
! enum bfd_endian endian, const char *name, CGEN_BITSET *isas = 0, int machine = 0);
struct disassemble_info info;
protected:
static int cgen_read_memory (bfd_vma memaddr, bfd_byte *myaddr,
Index: sid/component/cgen-cpu/compCGEN.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/compCGEN.cxx,v
retrieving revision 1.14
diff -c -p -r1.14 compCGEN.cxx
*** sid/component/cgen-cpu/compCGEN.cxx 15 Jun 2005 21:26:02 -0000 1.14
--- sid/component/cgen-cpu/compCGEN.cxx 19 Sep 2005 19:49:01 -0000
*************** cgen::cgen_bi_endian_cpu::disassemble (P
*** 158,164 ****
enum bfd_architecture arch,
enum bfd_endian endian,
const char *name,
! unsigned long isa_mask,
int machine)
{
cgen_disassemble((bfd_vma)pc, &this->info, this,
--- 158,164 ----
enum bfd_architecture arch,
enum bfd_endian endian,
const char *name,
! CGEN_BITSET *isas,
int machine)
{
cgen_disassemble((bfd_vma)pc, &this->info, this,
*************** cgen::cgen_bi_endian_cpu::disassemble (P
*** 172,178 ****
machine,
endian,
name,
! isa_mask);
}
int
--- 172,178 ----
machine,
endian,
name,
! isas);
}
int
Index: sid/component/cgen-cpu/tracedis.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/tracedis.cxx,v
retrieving revision 1.4
diff -c -p -r1.4 tracedis.cxx
*** sid/component/cgen-cpu/tracedis.cxx 25 Jun 2004 17:44:35 -0000 1.4
--- sid/component/cgen-cpu/tracedis.cxx 19 Sep 2005 19:49:01 -0000
*************** cgen_disassemble(bfd_vma pc,
*** 44,56 ****
int machine,
enum bfd_endian endian,
const char *name,
! unsigned long isa_mask)
{
register_name(arch, name, machine);
INIT_DISASSEMBLE_INFO(*info, this_ptr, trace_printf);
info->application_data = this_ptr;
info->flavour = flavour;
! info->insn_sets = isa_mask; /* may be 0 */
info->arch = arch;
info->mach = machine;
info->endian = endian;
--- 44,56 ----
int machine,
enum bfd_endian endian,
const char *name,
! CGEN_BITSET *isas)
{
register_name(arch, name, machine);
INIT_DISASSEMBLE_INFO(*info, this_ptr, trace_printf);
info->application_data = this_ptr;
info->flavour = flavour;
! info->insn_sets = isas; /* may be NULL */
info->arch = arch;
info->mach = machine;
info->endian = endian;
Index: sid/component/cgen-cpu/tracedis.h
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/tracedis.h,v
retrieving revision 1.3
diff -c -p -r1.3 tracedis.h
*** sid/component/cgen-cpu/tracedis.h 25 Jun 2004 17:44:36 -0000 1.3
--- sid/component/cgen-cpu/tracedis.h 19 Sep 2005 19:49:01 -0000
***************
*** 1,5 ****
--- 1,6 ----
#include "bfd.h"
#include "dis-asm.h"
+ #include "opcode/cgen-bitset.h"
// ansidecl.h interferes with this perfectly ordinary word
#undef AND
*************** typedef void (*MEMERR)(int status, bfd_v
*** 9,12 ****
typedef void (*PRINTADDR)(bfd_vma addr, struct disassemble_info *info);
typedef int (*SYMATADDR)(bfd_vma addr, struct disassemble_info * info);
! void cgen_disassemble(bfd_vma, disassemble_info *, void *, READMEM, MEMERR, PRINTADDR, SYMATADDR, disassembler_ftype, enum bfd_flavour, enum bfd_architecture, int machine, enum bfd_endian, const char *, unsigned long isa_mask);
--- 10,13 ----
typedef void (*PRINTADDR)(bfd_vma addr, struct disassemble_info *info);
typedef int (*SYMATADDR)(bfd_vma addr, struct disassemble_info * info);
! void cgen_disassemble(bfd_vma, disassemble_info *, void *, READMEM, MEMERR, PRINTADDR, SYMATADDR, disassembler_ftype, enum bfd_flavour, enum bfd_architecture, int machine, enum bfd_endian, const char *, CGEN_BITSET *isas);
Index: sim/frv/frv-sim.h
===================================================================
RCS file: /cvs/src/src/sim/frv/frv-sim.h,v
retrieving revision 1.6
diff -c -p -r1.6 frv-sim.h
*** sim/frv/frv-sim.h 1 Mar 2004 10:11:43 -0000 1.6
--- sim/frv/frv-sim.h 19 Sep 2005 19:49:01 -0000
*************** struct _device { int foo; };
*** 143,149 ****
/* maintain the address of the start of the previous VLIW insn sequence. */
extern IADDR previous_vliw_pc;
! extern CGEN_ATTR_VALUE_TYPE frv_current_fm_slot;
/* Hardware status. */
#define GET_HSR0() GET_H_SPR (H_SPR_HSR0)
--- 143,149 ----
/* maintain the address of the start of the previous VLIW insn sequence. */
extern IADDR previous_vliw_pc;
! extern CGEN_ATTR_VALUE_ENUM_TYPE frv_current_fm_slot;
/* Hardware status. */
#define GET_HSR0() GET_H_SPR (H_SPR_HSR0)
Index: sim/frv/mloop.in
===================================================================
RCS file: /cvs/src/src/sim/frv/mloop.in,v
retrieving revision 1.3
diff -c -p -r1.3 mloop.in
*** sim/frv/mloop.in 1 Mar 2004 10:11:43 -0000 1.3
--- sim/frv/mloop.in 19 Sep 2005 19:49:01 -0000
*************** cat <<EOF
*** 456,462 ****
int first_insn_p = 1;
int last_insn_p = 0;
int ninsns;
! CGEN_ATTR_VALUE_TYPE slot;
/* If the timer is enabled, then enable model profiling. This is because
the timer needs accurate cycles counts to work properly. */
--- 456,462 ----
int first_insn_p = 1;
int last_insn_p = 0;
int ninsns;
! CGEN_ATTR_VALUE_ENUM_TYPE slot;
/* If the timer is enabled, then enable model profiling. This is because
the timer needs accurate cycles counts to work properly. */
Index: sim/frv/pipeline.c
===================================================================
RCS file: /cvs/src/src/sim/frv/pipeline.c,v
retrieving revision 1.2
diff -c -p -r1.2 pipeline.c
*** sim/frv/pipeline.c 8 Oct 2003 18:19:33 -0000 1.2
--- sim/frv/pipeline.c 19 Sep 2005 19:49:02 -0000
*************** frv_vliw_setup_insn (SIM_CPU *current_cp
*** 61,67 ****
{
/* Clear the appropriate MSR fields depending on which slot
this insn is in. */
! CGEN_ATTR_VALUE_TYPE preserve_ovf;
SI msr0 = GET_MSR (0);
preserve_ovf = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_PRESERVE_OVF);
--- 61,67 ----
{
/* Clear the appropriate MSR fields depending on which slot
this insn is in. */
! CGEN_ATTR_VALUE_ENUM_TYPE preserve_ovf;
SI msr0 = GET_MSR (0);
preserve_ovf = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_PRESERVE_OVF);
Index: sim/frv/traps.c
===================================================================
RCS file: /cvs/src/src/sim/frv/traps.c,v
retrieving revision 1.4
diff -c -p -r1.4 traps.c
*** sim/frv/traps.c 1 Mar 2004 10:11:44 -0000 1.4
--- sim/frv/traps.c 19 Sep 2005 19:49:02 -0000
*************** with this program; if not, write to the
*** 30,36 ****
#include "bfd.h"
#include "libiberty.h"
! CGEN_ATTR_VALUE_TYPE frv_current_fm_slot;
/* The semantic code invokes this for invalid (unrecognized) instructions. */
--- 30,36 ----
#include "bfd.h"
#include "libiberty.h"
! CGEN_ATTR_VALUE_ENUM_TYPE frv_current_fm_slot;
/* The semantic code invokes this for invalid (unrecognized) instructions. */