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Re: SMP board : Bug in SID or configuration file ?
- From: fche at redhat dot com (Frank Ch. Eigler)
- To: "moris dong" <moris_dong at hotmail dot com>
- Cc: sid at sources dot redhat dot com
- Date: 30 Mar 2005 14:03:56 -0500
- Subject: Re: SMP board : Bug in SID or configuration file ?
- References: <BAY22-F288BFFC2A7BDC7B5A63068F8450@phx.gbl>
"moris dong" <email@example.com> writes:
> I tried to set a simple configuration file for a two-processor SMP
> board (see below). I use two loaders and two gloss (angel)
> instances, one per CPU.
> I use a remapper (MMU?) so the addresses generated by the second
> processor will not conflict with the addresses generated by the
> first [...]
You can also configure a hw-mapper-basic component to remap addresses
(see the "mapped_base" option).
> [...] But, when I enable the two CPUs (connect-pin target-sched
> 0-event -> cpu1 & connect-pin target-sched 1-event -> cpu2) I get a
> segmentation fault.
That's a bug. SID should not SEGV even on bad configuration. Could
run SID under a debugger and report the backtrace at the point of
> 1. What is wrong with my configuration file that is causing this
> core-dump ? [...]
Just glancing over it, nothing obvious is wrong.
> 3. [...]
> How can I get two processes to run in a thread-like manner, sharing
> the memory, doing locks etc. What is the programing model (pthreads
> ?), how do I write such a program for SID and how do I start it ?
Such functionality can only be layered above sid, within the OS you
would run on the simulator. GLOSS is the only piece that emulates
some aspect of the software layer, and extending it to implementing
multithreading system calls would be a big job.
Think of SID as primarily modelling hardware, its components like the
integrated circuits; its configuration like the pattern of connections
etched into a printed circuit board.