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RE: [Patch, mips]: Add support for FR=1/o32. Update implementation of setjmp/longjmp
- From: Matheus Almeida <Matheus dot Almeida at imgtec dot com>
- To: "newlib at sourceware dot org" <newlib at sourceware dot org>
- Cc: Doug Gilmore <Doug dot Gilmore at imgtec dot com>
- Date: Tue, 26 Nov 2013 11:33:42 +0000
- Subject: RE: [Patch, mips]: Add support for FR=1/o32. Update implementation of setjmp/longjmp
- Authentication-results: sourceware.org; auth=none
Fixed typo in subject line.
From: email@example.com [mailto:firstname.lastname@example.org] On Behalf Of Matheus Almeida
Sent: 26 November 2013 11:30
Cc: Doug Gilmore
Subject: [Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp
Mips allow the width of FPU registers to be controlled by specifying the FR configuration bit:
FR=0 -> 32-bit FPU registers
FR=1 -> 64-bit FPU registers
This can be controlled by -mfp32/-mfp64 command line options.
This patch updates the definition of setjmp, longjmp and jmp_buf so that on a call to setjmp/longjmp, all the required floating-point callee-saved registers are properly saved/restored.
We are aware that updating the size of jmp_buf can potentially break existing applications but we expect the number of applications built with FR=1 mode to be very small, possibly zero. Nevertheless this should be clearly stated in the release notes that existing applications built with FR=1 (-mfp64) need to be recompiled in order to use new versions of the library.
MIPS processor IP